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| author | Shilei Tian <i@tianshilei.me> | 2025-03-08 06:28:20 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-03-08 09:28:20 -0500 |
| commit | a779af3f882e1500ee6b9cb973e60c10ea0819b4 (patch) | |
| tree | c3f4b7cfd0378a308a1591a7ba235d27902be831 /llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | |
| parent | e86c5a7b9dbff5383cf9c81aa9eff38a92ce73aa (diff) | |
| download | llvm-a779af3f882e1500ee6b9cb973e60c10ea0819b4.zip llvm-a779af3f882e1500ee6b9cb973e60c10ea0819b4.tar.gz llvm-a779af3f882e1500ee6b9cb973e60c10ea0819b4.tar.bz2 | |
[AMDGPU] Change SGPR layout to striped caller/callee saved (#127353)
This PR updates the SGPR layout to a striped caller/callee-saved design,
similar
to the VGPR layout.
To ensure that s30-s31 (return address), s32 (stack pointer), s33 (frame
pointer), and s34 (base pointer) remain callee-saved, the striped layout
starts
from s40, with a stripe width of 8. The last stripe is 10 wide instead
of 8 to
avoid ending with a 2-wide stripe.
Fixes #113782.
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriter.cpp')
0 files changed, 0 insertions, 0 deletions