diff options
author | Jim Lin <jim@andestech.com> | 2025-08-28 09:36:10 +0800 |
---|---|---|
committer | GitHub <noreply@github.com> | 2025-08-28 01:36:10 +0000 |
commit | 717771e13da9ac8a46139ccd4510c7b4ff7f42b8 (patch) | |
tree | c7585dcc80af546071c15e87e24869d009ecb798 /llvm/docs/RISCVUsage.rst | |
parent | 9c994f54497b54d8c44d2c6979a4cdaa8e4d7833 (diff) | |
download | llvm-717771e13da9ac8a46139ccd4510c7b4ff7f42b8.zip llvm-717771e13da9ac8a46139ccd4510c7b4ff7f42b8.tar.gz llvm-717771e13da9ac8a46139ccd4510c7b4ff7f42b8.tar.bz2 |
[RISCV] Implement MC support for Zvfbfa extension (#151106)
This patch adds MC support for Zvfbfa
https://github.com/aswaterman/riscv-misc/blob/main/isa/zvfbfa.adoc
Since Zvfbfa implies Zve32f, vector floating-point instructions can be
used directly with Zvfbfa extension.
Diffstat (limited to 'llvm/docs/RISCVUsage.rst')
-rw-r--r-- | llvm/docs/RISCVUsage.rst | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst index f9f3e39..d6c7b46 100644 --- a/llvm/docs/RISCVUsage.rst +++ b/llvm/docs/RISCVUsage.rst @@ -231,6 +231,7 @@ on support follow. ``Zve64x`` Supported ``Zve64f`` Supported ``Zve64d`` Supported + ``Zvfbfa`` Assembly Support ``Zvfbfmin`` Supported ``Zvfbfwma`` Supported ``Zvfh`` Supported |