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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2025-09-03 10:27:18 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-03 01:27:18 +0000 |
| commit | c5d766236d2b550c093fe9d963f8d036b0fcfb0b (patch) | |
| tree | e6053b63e00e762f87c811d4cee22b7658a96d60 /clang/utils/TableGen/RISCVVEmitter.cpp | |
| parent | bfe150cdfc58feb0499f129b4be653340f98e1fe (diff) | |
| download | llvm-c5d766236d2b550c093fe9d963f8d036b0fcfb0b.zip llvm-c5d766236d2b550c093fe9d963f8d036b0fcfb0b.tar.gz llvm-c5d766236d2b550c093fe9d963f8d036b0fcfb0b.tar.bz2 | |
AMDGPU: Add tests for ds_write2 formation with agprs (#155765)
The current handling for write2 formation is overly conservative
and cannot form write2s with AGPR inputs.
Diffstat (limited to 'clang/utils/TableGen/RISCVVEmitter.cpp')
0 files changed, 0 insertions, 0 deletions