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| author | Christudasan Devadasan <christudasan.devadasan@amd.com> | 2023-10-27 17:24:10 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-10-27 17:24:10 +0530 |
| commit | f9cd7896581a56494fd2d07d5126e614de7d57d2 (patch) | |
| tree | 3d47d20fab641600c42d1bfac334f91870650596 /clang/lib/Lex/ModuleMap.cpp | |
| parent | 9bcb30d31813bbdea6b65789f64aed3f0e58d507 (diff) | |
| download | llvm-f9cd7896581a56494fd2d07d5126e614de7d57d2.zip llvm-f9cd7896581a56494fd2d07d5126e614de7d57d2.tar.gz llvm-f9cd7896581a56494fd2d07d5126e614de7d57d2.tar.bz2 | |
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
For a future patch, is it important to keep the lowered SGPR
spills to be recognized as spill instructions during regalloc.
Directly lowering them into V_WRITELANE/V_READLANE won't allow
us to attach the SPILL flag to their instructions.
This patch introduces the pseudo instructions with the SGPRSpill
flag set in their Desc. They will get lowered to equivalent
instructions later during post RA pseudo expansion.
Diffstat (limited to 'clang/lib/Lex/ModuleMap.cpp')
0 files changed, 0 insertions, 0 deletions