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| author | Igor Kirillov <igor.kirillov@arm.com> | 2023-10-27 12:41:08 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-10-27 12:41:08 +0100 |
| commit | 9bcb30d31813bbdea6b65789f64aed3f0e58d507 (patch) | |
| tree | 66d05b1af9b3ce2e586d8998de7f5c5ad43b6f54 /clang/lib/Lex/ModuleMap.cpp | |
| parent | 02ef12dd808f19191a4d0a9f511c4e5a5dda59b5 (diff) | |
| download | llvm-9bcb30d31813bbdea6b65789f64aed3f0e58d507.zip llvm-9bcb30d31813bbdea6b65789f64aed3f0e58d507.tar.gz llvm-9bcb30d31813bbdea6b65789f64aed3f0e58d507.tar.bz2 | |
[CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (#69942)
* Enhanced the logic of ExpandMemCmp pass to merge contiguous
subsequences
in LoadSequence, based on sizes allowed in `AllowedTailExpansions`.
* This enhancement seeks to minimize the number of basic blocks and
produce optimized code when using memcmp with non-register aligned sizes.
* Enable this feature for AArch64 with memcmp sizes modulo 8 equal to
3, 5, and 6.
Diffstat (limited to 'clang/lib/Lex/ModuleMap.cpp')
0 files changed, 0 insertions, 0 deletions