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| author | Zi Xuan Wu <zixuan.wu@linux.alibaba.com> | 2022-04-08 14:34:21 +0800 |
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| committer | Zi Xuan Wu <zixuan.wu@linux.alibaba.com> | 2022-04-08 14:37:07 +0800 |
| commit | 3d4ca8a8c39f772dd6c022220a6eef23238a77f6 (patch) | |
| tree | 3eb9d67103966fa43215f38d856d4b1636c99a12 /clang/lib/Frontend/TestModuleFileExtension.cpp | |
| parent | 0c789db541c236abf47265331a2f2b0945aa7b93 (diff) | |
| download | llvm-3d4ca8a8c39f772dd6c022220a6eef23238a77f6.zip llvm-3d4ca8a8c39f772dd6c022220a6eef23238a77f6.tar.gz llvm-3d4ca8a8c39f772dd6c022220a6eef23238a77f6.tar.bz2 | |
[CSKY] Correct the alignment of FPR register
The alignment of FPR64 and sFPR64 declared in RegisterClass should be 32 bit.
Diffstat (limited to 'clang/lib/Frontend/TestModuleFileExtension.cpp')
0 files changed, 0 insertions, 0 deletions