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AgeCommit message (Expand)AuthorFilesLines
2023-12-24sim: cgen: regenerate decode tablesMike Frysinger1-1121/+1121
2023-12-22sim: cgen: regenerate decode tables to avoid shadow warningsMike Frysinger1-50/+50
2023-12-21sim: mloop: add #line pragmas everywhereMike Frysinger1-0/+4
2023-12-21sim: or1k: fix -Wimplicit-fallthrough warningsMike Frysinger1-1/+1
2023-12-20sim: cgen: unify the genmloop logic a bitMike Frysinger1-4/+3
2023-08-19sim regenAlan Modra3-8/+10
2023-08-19sim --enable-cgen-maintAlan Modra1-2/+2
2023-01-15sim: modules.c: fix generation after recent refactorsMike Frysinger1-0/+3
2023-01-14sim: common: move modules.c to source trackingMike Frysinger1-1/+2
2023-01-14sim: build: drop most recursive build depsMike Frysinger1-2/+1
2023-01-14sim: common: move libcommon.a objects to sourcesMike Frysinger1-2/+2
2023-01-11sim: build: drop subdir Makefile.in filesMike Frysinger1-25/+0
2023-01-10sim: move arch-specific file compilation of common/ files to top-levelMike Frysinger1-2/+2
2023-01-10sim: or1k: move arch-specific file compilation to top-levelMike Frysinger1-3/+2
2023-01-10sim: build: drop support for creating libsim.a in subdirsMike Frysinger1-2/+0
2023-01-10sim: or1k: move libsim.a creation to top-levelMike Frysinger2-21/+35
2023-01-10sim: modules: trigger generation from top-levelMike Frysinger1-0/+1
2023-01-02sim: build: move generated headers to built sourcesMike Frysinger1-1/+2
2023-01-02sim: or1k: hoist cgen rules to top-levelMike Frysinger2-34/+11
2023-01-01sim: replace -I$srcroot/opcodes include with -I$srcrootMike Frysinger1-2/+2
2023-01-01sim: or1k: drop unused rulesMike Frysinger1-12/+0
2023-01-01Update copyright year range in header of all files managed by GDBJoel Brobecker18-18/+18
2022-12-25sim: cpu: change default init to handle all cpusMike Frysinger1-1/+1
2022-12-25sim: or1k: fix iterator typo when setting up cpusMike Frysinger1-1/+1
2022-12-23sim: or1k: move arch-specific settings to internal headerMike Frysinger3-30/+30
2022-12-23sim: cgen: move cgen-types.h include to cgen-defs.hMike Frysinger1-1/+0
2022-12-22sim: use bfd_vma when reading start addr from bfd infoMike Frysinger1-1/+1
2022-12-21sim: enable common sim_cpu usage everywhereMike Frysinger1-2/+0
2022-12-21sim: or1k: invert sim_cpu storageMike Frysinger5-30/+43
2022-11-07sim: or1k: drop subdir configure logicMike Frysinger4-2955/+2
2022-11-05sim: run: move linking into top-levelMike Frysinger1-0/+8
2022-11-04sim: build: remove various obsolete generation dep variablesMike Frysinger1-20/+3
2022-11-04sim: drop -lm from SIM_EXTRA_LIBSMike Frysinger1-2/+0
2022-11-04sim: cleanup unused SIM_EXTRA_CFLAGSMike Frysinger1-2/+0
2022-11-02sim: common: change sim_{fetch,store}_register helpers to use void* buffersMike Frysinger2-7/+4
2022-10-31sim: reg: constify store helperMike Frysinger2-3/+3
2022-02-21sim: gdbinit: hoist setup to common codeMike Frysinger1-9/+0
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker18-18/+18
2021-12-16sim: mips/or1k: drop redundant arg to bitsize macroMike Frysinger2-2/+2
2021-12-09sim: use ## for automake commentsMike Frysinger1-18/+18
2021-11-19sim: install various doc filesMike Frysinger1-0/+3
2021-11-15sim: split program path out of argv vectorMike Frysinger1-4/+1
2021-11-02sim: hoist cgen mloop rules up to common buildsMike Frysinger2-15/+38
2021-11-01sim: or1k: build with -WerrorMike Frysinger1-3/+0
2021-10-31sim: tighten up stamp rulesMike Frysinger1-1/+2
2021-10-31sim: silence stamp touch rulesMike Frysinger1-3/+3
2021-10-31sim: standardize move-if-change rulesMike Frysinger1-2/+2
2021-08-17sim: rename ChangeLog files to ChangeLog-2021Mike Frysinger1-0/+0
2021-07-01sim: unify reserved instruction bits settingsMike Frysinger2-2/+4
2021-06-30sim: unify scache settingsMike Frysinger4-26/+6
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