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| author | Mike Frysinger <vapier@gentoo.org> | 2022-12-26 22:20:09 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2023-01-10 01:15:25 -0500 |
| commit | 4d998e1559ab9728597971325738a246857f8f6c (patch) | |
| tree | bd74c8e3252067732d23e6796746cf7b51246cc0 /sim/or1k | |
| parent | bff048f587342253c09d5b5af1e47afc96a4452a (diff) | |
| download | gdb-4d998e1559ab9728597971325738a246857f8f6c.zip gdb-4d998e1559ab9728597971325738a246857f8f6c.tar.gz gdb-4d998e1559ab9728597971325738a246857f8f6c.tar.bz2 | |
sim: or1k: move libsim.a creation to top-level
The objects are still compiled in the subdir, but the creation of the
archive itself is in the top-level. This is a required step before we
can move compilation itself up, and makes it easier to review.
The downside is that each object compile is a recursive make instead of
a single one. On my 4 core system, it adds ~100msec to the build per
port, so it's not great, but it shouldn't be a big deal. This will go
away of course once the top-level compiles objects.
Diffstat (limited to 'sim/or1k')
| -rw-r--r-- | sim/or1k/Makefile.in | 22 | ||||
| -rw-r--r-- | sim/or1k/local.mk | 34 |
2 files changed, 35 insertions, 21 deletions
diff --git a/sim/or1k/Makefile.in b/sim/or1k/Makefile.in index ca5bf1a..19eed02 100644 --- a/sim/or1k/Makefile.in +++ b/sim/or1k/Makefile.in @@ -18,27 +18,7 @@ ## COMMON_PRE_CONFIG_FRAG -OR1K_OBJS = \ - or1k.o \ - arch.o \ - cpu.o \ - decode.o \ - model.o \ - sem.o \ - mloop.o \ - sim-if.o \ - traps.o - -SIM_OBJS = \ - $(SIM_NEW_COMMON_OBJS) \ - cgen-utils.o \ - cgen-trace.o \ - cgen-scache.o \ - cgen-run.o \ - cgen-fpu.o \ - cgen-accfp.o - -SIM_OBJS += $(OR1K_OBJS) +SIM_LIBSIM = SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31 diff --git a/sim/or1k/local.mk b/sim/or1k/local.mk index 7d999f6..a7412bf 100644 --- a/sim/or1k/local.mk +++ b/sim/or1k/local.mk @@ -15,6 +15,40 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see <http://www.gnu.org/licenses/>. +%C%_libsim_a_SOURCES = +%C%_libsim_a_LIBADD = \ + $(common_libcommon_a_OBJECTS) \ + $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ + $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ + %D%/modules.o \ + \ + %D%/cgen-accfp.o \ + %D%/cgen-fpu.o \ + %D%/cgen-run.o \ + %D%/cgen-scache.o \ + %D%/cgen-trace.o \ + %D%/cgen-utils.o \ + \ + %D%/arch.o \ + %D%/cpu.o \ + %D%/decode.o \ + %D%/mloop.o \ + %D%/model.o \ + %D%/sem.o \ + \ + %D%/or1k.o \ + %D%/sim-if.o \ + %D%/traps.o +$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h + +noinst_LIBRARIES += %D%/libsim.a + +%D%/%.o: %D%/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +%D%/%.o: common/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + %C%_run_SOURCES = %C%_run_LDADD = \ %D%/nrun.o \ |