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2019-06-05i386: Check vector length for EVEX vextractfXX and vinsertfXXH.J. Lu3-9/+92
2019-06-04i386: Check for reserved VEX.vvvv and EVEX.vvvvH.J. Lu2-10/+27
2019-06-04Enable Intel AVX512_VP2INTERSECT insnH.J. Lu8-4142/+4240
2019-06-04Add support for Intel ENQCMD[S] instructionsH.J. Lu7-4064/+4190
2019-06-04Remove an unnecessary set of parentheses in the arm-dis.c source file.Alan Hayward2-1/+5
2019-06-03Don't waste space in prefix_opcd_indicesAlan Modra2-1/+5
2019-05-28x86: Add CheckRegSize to AVX512_BF16 instructions with Disp8ShiftVLH.J. Lu3-4/+11
2019-05-24Regen POTFILES for bpfAlan Modra2-0/+11
2019-05-24PowerPC D-form prefixed loads and storesPeter Bergner2-4/+197
2019-05-24PowerPC add initial -mfuture instruction supportPeter Bergner3-1/+130
2019-05-23opcodes: add support for eBPFJose E. Marchesi14-3/+5837
2019-05-21[binutils, ARM] <spec_reg> changes for VMRS and VMSR instructionsSudakshina Das2-2/+27
2019-05-21[binutils, Arm] Add support for conditional instructions in Armv8.1-M MainlineSudakshina Das2-0/+99
2019-05-21[binutils, Arm] Add support for shift instructions in MVESudakshina Das2-0/+194
2019-05-21MIPS/gas: Reject $0 as source register for DAUI instructionFaraz Shahbazker2-1/+6
2019-05-20Updated translations for various binutils subdirectories.Nick Clifton2-584/+977
2019-05-16[PATCH 56/57][Arm][OBJDUMP] Add support for MVE instructions: vpnot, vpsel, v...Andre Vieira2-0/+154
2019-05-16[PATCH 55/57][Arm][OBJDUMP] Add support for MVE instructions: vmul, vmulh, vr...Andre Vieira2-0/+83
2019-05-16[PATCH 54/57][Arm][OBJDUMP] Add support for MVE instructions: vmax(a), vmax(a...Andre Vieira2-0/+163
2019-05-16[PATCH 53/57][Arm][OBJDUMP] Add support for MVE instructions: vand, vbrsr, vc...Andre Vieira2-0/+76
2019-05-16[PATCH 52/57][Arm][OBJDUMP] Add support for MVE instructions: vadc, vabav, va...Andre Vieira2-0/+154
2019-05-16[PATCH 51/57][Arm][OBJDUMP] Add support for MVE instructions: lctp, letp, wls...Andre Vieira2-3/+24
2019-05-16[PATCH 50/57][Arm][OBJDUMP] Add support for MVE shift instructionsAndre Vieira2-2/+422
2019-05-16[PATCH 49/57][Arm][OBJDUMP] Add support for MVE complex number instructionsAndre Vieira2-0/+152
2019-05-16[PATCH 48/57][Arm][OBJDUMP] Add support for MVE instructions: vddup, vdwdup, ...Andre Vieira2-1/+96
2019-05-16[PATCH 47/57][Arm][OBJDUMP] Add support for MVE instructions: vaddv, vmlaldav...Andre Vieira2-0/+298
2019-05-16[PATCH 46/57][Arm][OBJDUMP] Add support for MVE instructions: vmovl, vmull, v...Andre Vieira2-0/+206
2019-05-16[PATCH 45/57][Arm][OBJDUMP] Add support for MVE instructions: vmov, vmvn, vor...Andre Vieira2-5/+621
2019-05-16[PATCH 44/57][Arm][OBJDUMP] Add support for MVE instructions: vcvt and vrintAndre Vieira2-2/+383
2019-05-16[PATCH 43/57][Arm][OBJDUMP] Add support for MVE instructions: scatter stores ...Andre Vieira2-1/+368
2019-05-16[PATCH 42/57][Arm][OBJDUMP] Add support for MVE instructions: vldr[bhw] and v...Andre Vieira2-0/+278
2019-05-16[PATCH 41/57][Arm][OBJDUMP] Add support for MVE instructions: vld[24] and vst...Andre Vieira2-0/+191
2019-05-16[PATCH 40/57][Arm][OBJDUMP] Add support for MVE instructions: vdup, veor, vfm...Andre Vieira2-14/+222
2019-05-16[PATCH 39/57][Arm][OBJDUMP] Add support for MVE instructions: vpt, vpst and vcmpAndre Vieira2-12/+642
2019-05-16[PATCH 38/57][Arm][OBJDUMP] Disable the use of MVE reserved coproc numbers in...Andre Vieira2-0/+12
2019-05-16[PATCH 37/57][Arm][OBJDUMP] Add framework for MVE instructionsAndre Vieira2-4/+279
2019-05-14A series of fixes to addres problems detected by compiling the assembler with...Nick Clifton2-1/+10
2019-05-10Add macro expansions for ADD, SUB, DADD and DSUB for MIPS r6Faraz Shahbazker2-4/+9
2019-05-11PowerPC objdump -MrawAlan Modra2-3/+10
2019-05-09Update printing of optional operands during disassembly.Peter Bergner1-9/+8
2019-05-09[binutils][aarch64] Add SVE2 instructions.Matthew Malcomson3-941/+4569
2019-05-09[binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.Matthew Malcomson6-22/+41
2019-05-09[binutils][aarch64] New sve_size_tsz_bhs iclass.Matthew Malcomson3-0/+24
2019-05-09[binutils][aarch64] New SVE_Zm4_11_INDEX operand.Matthew Malcomson7-14/+36
2019-05-09[binutils][aarch64] New sve_shift_tsz_bhsd iclass.Matthew Malcomson3-0/+19
2019-05-09[binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.Matthew Malcomson8-32/+73
2019-05-09[binutils][aarch64] New sve_size_013 iclass.Matthew Malcomson3-0/+25
2019-05-09[binutils][aarch64] New sve_size_bh iclass.Matthew Malcomson3-0/+9
2019-05-09[binutils][aarch64] New sve_size_sd2 iclass.Matthew Malcomson5-0/+19
2019-05-09[binutils][aarch64] New SVE_ADDR_ZX operand.Matthew Malcomson6-66/+100
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