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Age	Commit message (Expand)	Author	Files	Lines
2023-04-11	Fix illegal memory access when disassembling corrupt NFP binaries.	Nick Clifton	2	-1/+9
2023-04-07	Support Intel AMX-COMPLEX	Haochen Jiang	7	-4711/+4808
2023-04-03	asan: csky floatformat_to_double uninitialised value	Alan Modra	1	-10/+6
2023-04-03	opcodes/arm: adjust whitespace in cpsie instruction	Andrew Burgess	1	-2/+2
2023-03-31	RISC-V: Allocate "various" operand type	Tsukasa OI	2	-8/+24
2023-03-31	x86: parse VEX and alike specifiers for .insn	Jan Beulich	1	-0/+2
2023-03-31	x86: introduce .insn directive	Jan Beulich	3	-0/+5
2023-03-30	aarch64: Add the RPRFM instruction	Richard Sandiford	6	-885/+925
2023-03-30	aarch64: Add the SVE FCLAMP instruction	Richard Sandiford	2	-759/+771
2023-03-30	aarch64: Add new SVE shift instructions	Richard Sandiford	2	-873/+909
2023-03-30	aarch64: Add new SVE saturating conversion instructions	Richard Sandiford	2	-752/+788
2023-03-30	aarch64: Add new SVE dot-product instructions	Richard Sandiford	6	-841/+923
2023-03-30	aarch64: Add the SVE BFMLSL instructions	Richard Sandiford	2	-742/+793
2023-03-30	aarch64: Add the SME2 UZP and ZIP instructions	Richard Sandiford	2	-338/+438
2023-03-30	aarch64: Add the SME2 UNPK instructions	Richard Sandiford	2	-709/+757
2023-03-30	aarch64: Add the SME2 shift instructions	Richard Sandiford	9	-505/+679
2023-03-30	aarch64: Add the SME2 saturating conversion instructions	Richard Sandiford	6	-468/+592
2023-03-30	aarch64: Add the SME2 FP<->FP conversion instructions	Richard Sandiford	2	-948/+1000
2023-03-30	aarch64: Add the SME2 FP<->int conversion instructions	Richard Sandiford	2	-749/+945
2023-03-30	aarch64: Add the SME2 CLAMP instructions	Richard Sandiford	2	-820/+892
2023-03-30	aarch64: Add the SME2 MOPA and MOPS instructions	Richard Sandiford	2	-717/+789
2023-03-30	aarch64: Add the SME2 vertical dot-product instructions	Richard Sandiford	2	-669/+789
2023-03-30	aarch64: Add the SME2 dot-product instructions	Richard Sandiford	2	-753/+1353
2023-03-30	aarch64: Add the SME2 MLALL and MLSLL instructions	Richard Sandiford	6	-851/+1599
2023-03-30	aarch64: Add the SME2 MLAL and MLSL instructions	Richard Sandiford	8	-665/+1485
2023-03-30	aarch64: Add the SME2 FMLA and FMLS instructions	Richard Sandiford	6	-529/+753
2023-03-30	aarch64: Add the SME2 maximum/minimum instructions	Richard Sandiford	4	-439/+979
2023-03-30	aarch64: Add the SME2 ADD and SUB instructions	Richard Sandiford	8	-487/+750
2023-03-30	aarch64: Add the SME2 ZT0 instructions	Richard Sandiford	8	-397/+686
2023-03-30	aarch64: Add the SME2 predicate-related instructions	Richard Sandiford	10	-821/+1270
2023-03-30	aarch64: Add the SME2 multivector LD1 and ST1 instructions	Richard Sandiford	10	-448/+2088
2023-03-30	aarch64: Add the SME2 MOVA instructions	Richard Sandiford	10	-312/+674
2023-03-30	aarch64: Add support for predicate-as-counter registers	Richard Sandiford	6	-1597/+1647
2023-03-30	aarch64; Add support for vector offset ranges	Richard Sandiford	1	-9/+48
2023-03-30	aarch64: Add support for vgx2 and vgx4	Richard Sandiford	1	-8/+41
2023-03-30	aarch64: Add _off4 suffix to AARCH64_OPND_SME_ZA_array	Richard Sandiford	3	-7/+7
2023-03-30	aarch64: Add a _10 suffix to FLD_imm3	Richard Sandiford	6	-8/+8
2023-03-30	aarch64: Prefer register ranges & support wrapping	Richard Sandiford	1	-1/+1
2023-03-30	aarch64: Add support for strided register lists	Richard Sandiford	2	-23/+56
2023-03-30	aarch64: Sort fields alphanumerically	Richard Sandiford	2	-163/+164
2023-03-30	aarch64: Resync field names	Richard Sandiford	1	-7/+7
2023-03-30	aarch64: Regularise FLD_* suffixes	Richard Sandiford	6	-55/+55
2023-03-30	aarch64: Add a aarch64_cpu_supports_inst_p helper	Richard Sandiford	1	-0/+13
2023-03-30	aarch64: Reorder some OP_SVE_* macros	Richard Sandiford	1	-16/+16
2023-03-30	aarch64: Rename aarch64-tbl.h OP_SME_* macros	Richard Sandiford	1	-81/+77
2023-03-30	aarch64: Try to report invalid variants against the closest match	Richard Sandiford	3	-19/+30
2023-03-30	aarch64: Make AARCH64_OPDE_REG_LIST take a bitfield	Richard Sandiford	1	-1/+1
2023-03-30	aarch64: Add an operand class for SVE register lists	Richard Sandiford	3	-14/+13
2023-03-30	aarch64: Commonise checks for index operands	Richard Sandiford	1	-18/+32
2023-03-30	aarch64: Add an error code for out-of-range registers	Richard Sandiford	1	-6/+14