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2017-05-18Don't compare boolean values against TRUE or FALSEAlan Modra5-8/+15
bfd/ * arc-got.h: Don't compare boolean values against TRUE or FALSE. * elf-m10300.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-bfin.c: Likewise. * elf32-m68k.c: Likewise. * elf32-nds32.c: Likewise. * elf32-tilepro.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-tilegx.c: Likewise. * mach-o.c: Likewise. * peXXigen.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. opcodes/ * aarch64-asm.c: Don't compare boolean values against TRUE or FALSE. * aarch64-dis.c: Likewise. * aarch64-gen.c: Likewise. * aarch64-opc.c: Likewise. binutils/ * strings.c: Don't compare boolean values against TRUE or FALSE. gas/ * config/tc-aarch64.c: Don't compare booleans against TRUE or FALSE. * config/tc-hppa.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-score7.c: Likewise. ld/ * emultempl/elf32.em: Don't compare boolean values against TRUE or FALSE. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2017-05-17S/390: Fix arch level of pckmo instruction.Andreas Krebbel4-2/+2
Fix wrong architecture level of PCKMO instruction. Committed to mainline. opcodes/ChangeLog: 2017-05-17 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390-opc.txt: PCKMO change arch level to z196. gas/ChangeLog: 2017-05-17 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * testsuite/gas/s390/zarch-z10.d: Remove pckmo. * testsuite/gas/s390/zarch-z10.s: Remove pckmo. * testsuite/gas/s390/zarch-z196.d: Add pckmo. * testsuite/gas/s390/zarch-z196.s: Add pckmo.
2017-05-16Allow target files access to default TC_FORCE_RELOCATION definesAlan Modra23-63/+103
* write.c (GENERIC_FORCE_RELOCATION_LOCAL): Define. (TC_FORCE_RELOCATION_LOCAL): Use it. (GENERIC_FORCE_RELOCATION_SUB_SAME): Define. (TC_FORCE_RELOCATION_SUB_SAME): Use it. * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL, TC_FORCE_RELOCATION_SUB_SAME): Use GENERIC defines. * config/tc-aarch64.h: Similarly. * config/tc-avr.h: Similarly. * config/tc-cris.h: Similarly. * config/tc-i386.h: Similarly. * config/tc-i960.h: Similarly. * config/tc-ia64.h: Similarly. * config/tc-microblaze.h: Similarly. * config/tc-mips.h: Similarly. * config/tc-msp430.h: Similarly. * config/tc-nds32.h: Similarly. * config/tc-pru.h: Similarly. * config/tc-riscv.h: Similarly. * config/tc-rl78.h: Similarly. * config/tc-s390.h: Similarly. * config/tc-sh.h: Similarly. * config/tc-sh64.h: Similarly. * config/tc-sparc.h: Similarly. * config/tc-xtensa.h: Similarly. * config/tc-mn10300.h: Similarly. (GENERIC_FORCE_RELOCATION_LOCAL): Define. * config/tc-msp430.c (msp430_force_relocation_local): Modify to be addition to rather than replacement of standard TC_FORCE_RELOCATION_LOCAL.
2017-05-15Fix use of ARM ADR and ADRl pseudo-instructions with thumb function symbols.Nick Clifton4-1/+95
PR gas/21458 * config/tc-arm.c (do_adr): If the ADR involves a thumb function symbol, ensure that the T bit will be set. (do_adrl): Likewise. (do_t_adr): Likewise. * testsuite/gas/arm/pr21458.s: New test. * testsuite/gas/arm/pr21458.d: New test driver.
2017-05-15MIPS16e2: Add new MIPS16e2 relaxation GAS and LD testsMaciej W. Rozycki86-114/+1338
Verify MIPS16 PC-relative instruction relaxation using the MIPS16e2 LUI instruction rather than an LI/SLL instruction pair. gas/ * testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as' flags. * testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d: Likewise. * testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers. * testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment preservation between MIPS16 and MIPS16e2 code. * testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over all MIPS16 architectures. ld/ * testsuite/ld-mips-elf/mips16e2-pcrel-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-1.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-05-15MIPS16e2: Add new MIPS16e2 ASE binutils and GAS testsMaciej W. Rozycki31-6/+3425
Verify MIPS16e2 ASE instruction assembly, disassembly and object file flags. binutils/ * testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3' to `as' flags. * testsuite/binutils-all/mips/mips16e2-undecoded.d: New test. * testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test. * testsuite/binutils-all/mips/mips16-undecoded.s: Remove `.module mips3'. * testsuite/binutils-all/mips/mips.exp: Run the new tests. gas/ * testsuite/gas/mips/mips16e2.d: New test. * testsuite/gas/mips/mips16e2-mt.d: New test. * testsuite/gas/mips/mips16e2-sub.d: New test. * testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test. * testsuite/gas/mips/mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2-hilo.d: New test. * testsuite/gas/mips/mips16e2-hilo-n32.d: New test. * testsuite/gas/mips/mips16e2-reloc-error.d: New test. * testsuite/gas/mips/mips16e2-imm-error.d: New test. * testsuite/gas/mips/elf_ase_mips16e2.d: New test. * testsuite/gas/mips/elf_ase_mips16e2-2.d: New test. * testsuite/gas/mips/elf-rel9-mips16e2.d: New test. * testsuite/gas/mips/mips16e2-lui.d: New test. * testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test. * testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test. * testsuite/gas/mips/mips16e2@lui-2.d: New test. * testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output. * testsuite/gas/mips/mips16e2-imm-error.l: New stderr output. * testsuite/gas/mips/mips16e2@lui-2.l: New stderr output. * testsuite/gas/mips/mips16e2.s: New test source. * testsuite/gas/mips/mips16e2-mt.s: New test source. * testsuite/gas/mips/mips16e2-sub.s: New test source. * testsuite/gas/mips/mips16e2-mt-sub.s: New test source. * testsuite/gas/mips/mips16e2-hilo.s: New test source. * testsuite/gas/mips/mips16e2-reloc-error.s: New test source. * testsuite/gas/mips/mips16e2-imm-error.s: New test source. * testsuite/gas/mips/elf-rel9-mips16e2.s: New test source. * testsuite/gas/mips/mips16e2-lui.s: New test source. * testsuite/gas/mips/mips.exp: Expand `mips32r2-sync', `mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2 architectures. Run the new tests.
2017-05-15MIPS16e2: Add MIPS16e2 ASE GAS test infrastructureMaciej W. Rozycki24-5/+410
Define a new 32-bit and 64-bit MIPS16e2 test architecture and adjust existing tests now run against these architectures accordingly. gas/ * testsuite/gas/mips/mips.exp (run_dump_test_arch): Add `mips16e2@' prefix. (run_list_test_arch): Likewise. (mips16e2-32, mips16e2-64): New architectures. * testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16e2@relax-swap3.d: New test. * testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source' tag. Add `-I$srcdir/$subdir' to `as' flags. * testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise. * testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'. * testsuite/gas/mips/mips16e-sub.s: Likewise. * testsuite/gas/mips/mips16e-64-sub.s: Likewise. * testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'. * testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test source. * testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test source.
2017-05-15MIPS16e2: Add MIPS16e2 ASE supportMaciej W. Rozycki4-44/+187
Add MIPS16e2 ASE support as per the architecture specification[1], including in particular: 1. A new ELF ASE flag to mark MIPS16e2 binaries. 2. MIPS16e2 instruction assembly support, including a relaxation update to use LUI rather than an LI/SLL instruction pair for loading the high part of 32-bit addresses. 3. MIPS16e2 instruction disassembly support, including updated rules for extended forms of instructions that are now subdecoded and therefore do not alias to the original MIPS16 ISA revision instructions even for encodings that are not valid in the MIPS16e2 instruction set. Add `-mmips16e2' and `-mno-mips16e2' GAS command-line options and their corresponding `mips16e2' and `no-mips16e2' settings for the `.set' and `.module' pseudo-ops. Control the availability of the MT ASE subset of the MIPS16e2 instruction set with a combination of these controls and the preexisting MT ASE controls. Parts of this change by Matthew Fortune and Andrew Bennett. References: [1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific Extension Technical Reference Manual", Imagination Technologies Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016 include/ * elf/mips.h (AFL_ASE_MIPS16E2): New macro. (AFL_ASE_MASK): Adjust accordingly. * opcode/mips.h: Document new operand codes defined. (mips_operand_type): Add OP_REG28 enum value. (INSN2_SHORT_ONLY): Update description. (ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros. bfd/ * elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE. opcodes/ * mips-dis.c (mips_arch_choices): Add ASE_MIPS16E2 and ASE_MIPS16E2_MT flags to the unnamed MIPS16 entry. (mips_convert_abiflags_ases): Handle the AFL_ASE_MIPS16E2 flag. (print_insn_arg) <OP_REG28>: Add handler. (validate_insn_args) <OP_REG28>: Handle. (print_mips16_insn_arg): Handle MIPS16 instructions that require 32-bit encoding and 9-bit immediates. (print_insn_mips16): Handle MIPS16 instructions that require 32-bit encoding and MFC0/MTC0 operand decoding. * mips16-opc.c (decode_mips16_operand) <'>', '9', 'G', 'N', 'O'> <'Q', 'T', 'b', 'c', 'd', 'r', 'u'>: Add handlers. (RD_C0, WR_C0, E2, E2MT): New macros. (mips16_opcodes): Add entries for MIPS16e2 instructions: GP-relative "addiu" and its "addu" spelling, "andi", "cache", "di", "ehb", "ei", "ext", "ins", GP-relative "lb", "lbu", "lh", "lhu", and "lw" instructions, "ll", "lui", "lwl", "lwr", "mfc0", "movn", "movtn", "movtz", "movz", "mtc0", "ori", "pause", "pref", "rdhwr", "sc", GP-relative "sb", "sh" and "sw" instructions, "swl", "swr", "sync" and its "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" aliases, "xori", "dmt", "dvpe", "emt" and "evpe". Add split regular/extended entries for original MIPS16 ISA revision instructions whose extended forms are subdecoded in the MIPS16e2 ISA revision: "li", "sll" and "srl". binutils/ * readelf.c (print_mips_ases): Handle MIPS16e2 ASE. * NEWS: Mention MIPS16e2 ASE support. gas/ * config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag. (RELAX_MIPS16_E2): New macro. (RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO) (RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT) (RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT) (RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED) (RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED) (RELAX_MIPS16_MARK_ALWAYS_EXTENDED) (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO) (RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits. (mips16_immed_extend): New prototype. (options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum values. (md_longopts): Add "mmips16e2" and "mno-mips16e2" options. (mips_ases): Add "mips16e2" entry. (mips_set_ase): Handle MIPS16e2 ASE. (insn_insert_operand): Explicitly handle immediates with MIPS16 instructions that require 32-bit encoding. (is_opcode_valid_16): Pass enabled ASE bitmask on to `opcode_is_member'. (validate_mips_insn): Explicitly handle immediates with MIPS16 instructions that require 32-bit encoding. (operand_reg_mask) <OP_REG28>: Add handler. (match_reg28_operand): New function. (match_operand) <OP_REG28>: Add handler. (append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE. (match_mips16_insn): Handle MIPS16 instructions that require 32-bit encoding and `V' and `u' operand codes. (mips16_ip): Allow any characters except from `.' in opcodes. (mips16_immed_extend): Handle 9-bit immediates. Do not shuffle immediates whose width is not one of these listed. (md_estimate_size_before_relax): Handle MIPS16e2 relaxation. (mips_relax_frag): Likewise. (md_convert_frag): Likewise. (mips_convert_ase_flags): Handle MIPS16e2 ASE. * doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and `-mno-mips16e2' options. (-mmips16e2, -mno-mips16e2): New options. * doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and `-mno-mips16e2' options. (MIPS ASE Instruction Generation Overrides): Add `.set mips16e2' and `.set nomips16e2'.
2017-05-15MIPS16/GAS: Improve [32768,65535] out-of-range operand error diagnosticsMaciej W. Rozycki2-1/+10
Improve out-of-range operand error diagnostics for invalid values in the [32768,65535] range used for a signed 16-bit immediate, making the message consistent with that used for other invalid values, e.g.: foo.s:1: Error: operand 2 must be an immediate expression `addiu $2,$gp,32768' foo.s:2: Error: invalid operands `lw $2,32768($gp)' vs: foo.s:3: Error: operand 3 out of range `addiu $2,$gp,-32769' foo.s:4: Error: operand 2 out of range `lw $2,-32769($gp)' This case does not currently trigger however, for two reasons. First, for regular MIPS and microMIPS assembly in the case of no match caused by `match_int_operand' here, the function is always called again from `mips_ip' via `match_insns', `match_insn' and then `match_operand' for the same opcode table's entry with `lax_match' set to TRUE, in which case the attempt to match succeeds and no error is issued. Second, in the case of MIPS16 assembly no call to `match_int_operand' is made at all for signed 16-bit immediates, because such immediates are currently only matched with extensible instructions, and these are handled in `match_mips16_insn' via `match_expression' directly rather than via `match_operand'. This will change for MIPS16 code with MIPS16e2 support introduced, where non-extensible instructions accepting signed 16-bit immediates will be added, so make the case work well right from the start: foo.s:1: Error: operand 3 out of range `addiu $2,$gp,32768' foo.s:2: Error: operand 2 out of range `lw $2,32768($gp)' gas/ * config/tc-mips.c (match_int_operand): Call `match_out_of_range' before returning failure for 0x8000-0xffff values conditionally allowed.
2017-05-15MIPS16/GAS: Improve non-constant operand error diagnosticsMaciej W. Rozycki2-1/+10
Improve operand error diagnostics for non-constant expressions used for a 16-bit immediate, making the message more descriptive and indicating the offending operand, e.g.: foo.s:1: Error: invalid operands `lui $2,foo-bar' will show as: foo.s:1: Error: operand 2 must be constant `lui $2,foo-bar' This case does not currently trigger however, for two reasons. First, for regular MIPS and microMIPS assembly in the case of no match caused by `match_int_operand' here, the function is always called again from `mips_ip' via `match_insns', `match_insn' and then `match_operand' for the same opcode table's entry with `lax_match' set to TRUE, in which case the attempt to match succeeds and no error is issued. Second, in the case of MIPS16 assembly no call to `match_int_operand' is made at all for 16-bit immediates, because such immediates are currently only matched with extensible instructions, and these are handled in `match_mips16_insn' via `match_expression' directly rather than via `match_operand'. This will change for MIPS16 code with MIPS16e2 support introduced, where non-extensible instructions accepting 16-bit immediates will be added, so make the case work well right from the start. gas/ * config/tc-mips.c (match_int_operand): Call `match_not_constant' before returning failure for a non-constant 16-bit immediate conditionally allowed.
2017-05-15MIPS/GAS: Improve bignum operand error diagnosticsMaciej W. Rozycki14-2/+109
Improve bignum operand error diagnostics for cases where a constant would be accepted and report them as range errors, also indicating the offending operand and instruction, e.g.: $ cat bignum.s addiu $2, 0x10000000000000000 break 0x10000000000000000 $ as -o bignum.o bignum.s bignum.s:1: Error: bignum invalid bignum.s:2: Error: operand 1 must be constant `break 0x10000000000000000' $ now show as: $ as -o bignum.o bignum.s bignum.s:1: Error: operand 2 out of range `addiu $2,0x10000000000000000' bignum.s:2: Error: operand 1 out of range `break 0x10000000000000000' $ gas/ * config/tc-mips.c (match_const_int): Call `match_out_of_range' rather than `match_not_constant' for unrelocated operands retrieved as an `O_big' expression. (match_int_operand): Call `match_out_of_range' for relocatable operands retrieved as an `O_big' expression. (match_mips16_insn): Call `match_out_of_range' for relaxable operands retrieved as an `O_big' expression. * testsuite/gas/mips/addiu-error.d: New test. * testsuite/gas/mips/mips16@addiu-error.d: New test. * testsuite/gas/mips/micromips@addiu-error.d: New test. * testsuite/gas/mips/break-error.d: New test. * testsuite/gas/mips/lui-1.l: Adjust error message. * testsuite/gas/mips/addiu-error.l: New stderr output. * testsuite/gas/mips/mips16@addiu-error.l: New stderr output. * testsuite/gas/mips/micromips@addiu-error.l: New stderr output. * testsuite/gas/mips/break-error.l: New stderr output. * testsuite/gas/mips/addiu-error.s: New test source. * testsuite/gas/mips/break-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2017-05-15MIPS16/GAS: Improve non-immediate operand error diagnosticsMaciej W. Rozycki10-40/+189
Improve non-immediate operand error diagnostics for extensible MIPS16 instructions and make it match corresponding regular MIPS and microMIPS handling, e.g: $ cat addiu.s addiu $4, $3, $2 $ as -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2' $ as -mips16 -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: invalid operands `addiu $4,$3,$2' $ To do so observe that for extensible MIPS16 instructions and a non-PC relative operand this case is handled by an explicit OT_INTEGER check in `match_mips16_insn' returning a failure right away and consequently preventing a call to `match_expression' from being made. As from commit d436c1c2e889 ("Improve error reporting for register expressions"), <https://sourceware.org/ml/binutils/2013-08/msg00134.html>, however the check has become redundant as `match_expression' now only ever returns success for OT_INTEGER argument tokens, and a special case of an OT_CHAR `(' token already handled by `match_mips16_insn' just ahead of the `match_expression' call. Previously it also returned success for OT_REG argument tokens. Let the call to `match_expression' always happen then, yielding the same failure for the affected cases, however with more accurate diagnostics provided by the call making reporting consistent: $ as -mips16 -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2' $ gas/ * config/tc-mips.c (match_mips16_insn): Remove the explicit OT_INTEGER check before the `match_expression' call. * testsuite/gas/mips/mips16-insn-e.l: Adjust messages. * testsuite/gas/mips/mips16-32@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16-64@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16e-32@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16-reg-error.d: New test. * testsuite/gas/mips/mips16-reg-error.l: New stderr output. * testsuite/gas/mips/mips16-reg-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test.
2017-05-15MIPS16/GAS: Improve disallowed relocation operand error diagnosticsMaciej W. Rozycki6-1/+98
Improve disallowed relocation operand error diagnostics for MIPS16 code and make it match corresponding regular MIPS and microMIPS handling, e.g: $ cat sltu.s sltu $2, %lo(foo) $ as -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)' $ as -mips16 -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: invalid operands `sltu $2,%lo(foo)' $ To do so call `match_not_constant' from `match_mips16_insn' whenever a disallowed relocation operation has been noticed, like `match_const_int' does, making reporting consistent: $ as -mips16 -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)' $ gas/ * config/tc-mips.c (match_mips16_insn): Call `match_not_constant' for a disallowed relocation operation. * testsuite/gas/mips/mips16-reloc-error.d: New test. * testsuite/gas/mips/mips16-reloc-error.l: New stderr output. * testsuite/gas/mips/mips16-reloc-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test.
2017-05-15MIPS/GAS/testsuite: Convert LUI list tests to dump testsMaciej W. Rozycki4-2/+15
gas/ * testsuite/gas/mips/lui-1.d: New test. * testsuite/gas/mips/lui-2.d: New test. * gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests into the new tests.
2017-05-15MIPS/GAS: Update `match_const_int' descriptionMaciej W. Rozycki2-2/+5
Remove a stale reference to FALLBACK parameter from the description of `match_const_int', matching commit 1a00e61226b3 ("Remove soft_match"), <https://sourceware.org/ml/binutils/2013-08/msg00133.html>. gas/ * config/tc-mips.c (match_const_int): Update description.
2017-05-15MIPS/GAS/doc: Refer to `.module' rather than `.set'Maciej W. Rozycki3-12/+26
Complement commit 919731affbef ("Add MIPS .module directive") and update the GAS manual to refer to the `.module' rather than `.set' directive in command-line option descriptions, following an observation that unlike `.set' and like the respective command-line option the use of the `.module' directive affects the ISA and ASE flags recorded in the object file produced, and therefore it is `.module' rather than `.set' that corresponds to the respective command-line option. gas/ * doc/as.texinfo (-mips16, -no-mips16): Refer to `.module mips16' rather than `.set mips16'. (-mmicromips, -mno-micromips): Refer to `.module micromips' and `.module nomicromips' rather than `.set micromips' and `.set nomicromips'. (-msmartmips, -mno-smartmips): Refer to `.module smartmips' rather than `.set smartmips'. * doc/c-mips.texi (MIPS Options): Refer to `.module mips16', `.module micromips', `.module nomicromips' and `.module smartmips' rather than `.set mips16', `.set micromips', `.set nomicromips' and `.set smartmips' respectively.
2017-05-12MIPS/GAS: Unify GP-relative percent-opsMaciej W. Rozycki6-1/+38
For a reason that is unclear commit d6f165938798 ("Support for MIPS16 HI16/LO16 relocations"), <https://sourceware.org/ml/binutils/2005-02/msg00332.html>, which has added support for the R_MIPS16_GPREL relocation, has spelled its corresponding MIPS16 percent-op as `%gprel', rather than `%gp_rel' which is how its regular MIPS counterpart is spelled. To make assembly code sharing easier between the regular MIPS and the MIPS16 ISA make both percent-op spellings acceptable in both kinds of code now. Parts of this change by Matthew Fortune. gas/ * config/tc-mips.c (mips_percent_op): Add "%gprel". (mips16_percent_op): Add "%gp_rel". * testsuite/gas/mips/elf-rel8.s:: Add `%gprel' forms. * testsuite/gas/mips/elf-rel8-mips16.s: Add `%gp_rel' forms. * testsuite/gas/mips/elf-rel8.d: Adjust accordingly. * testsuite/gas/mips/elf-rel8-mips16.d: Likewise.
2017-05-12MIPS16/opcodes: Make the handling of BREAK and SDBBP consistentMaciej W. Rozycki9-58/+69
Disassemble the MIPS16 BREAK and SDBBP instruction's immediate operand in the hexadecimal rather than decimal numeral system and add respective operandless variants with an implicit 0 operand, making our handling of these instructions consistent with how we have processed their regular MIPS and microMIPS counterparts since forever. opcodes/ * mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand type to hexadecimal. (mips16_opcodes): Add operandless "break" and "sdbbp" entries. binutils/ * testsuite/binutils-all/mips/mips16-extend-insn.d: Adjust BREAK and SDBBP disassembly. gas/ * testsuite/gas/mips/mips16.d: Adjust BREAK disassembly. * testsuite/gas/mips/mips16-64@mips16.d: Likewise. * testsuite/gas/mips/mips16-64.d: Likewise. * testsuite/gas/mips/mips16-64@mips16-64.d: Likewise. * testsuite/gas/mips/mips16-macro.d: Likewise. * testsuite/gas/mips/mips16-64@mips16-macro.d: Likewise. * testsuite/gas/mips/mips16-sub.d: Likewise. * testsuite/gas/mips/mips16-32@mips16-sub.d: Likewise.
2017-05-12MIPS/opcodes: Mark descriptive SYNC mnemonics as aliasesMaciej W. Rozycki4-0/+66
Following the way how descriptive SYNC mnemonics have been defined in the architecture[1][2] mark them as aliases, so that the generic SYNC instruction can be alternatively disassembled along with its immediate operand, as noted in the documents referred. References: [1] "MIPS Architecture For Programmers, Volume II-A: The MIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00086, Revision 5.04, December 11, 2013, Table 4.7 "Encodings of the Bits[10:6] of the SYNC instruction; the SType Field", p. 305 [2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00582, Revision 5.04, January 15, 2014, Table 5.28 "Encodings of the Bits[10:6] of the SYNC instruction; the SType Field", p. 481 opcodes/ * mips-opc.c (mips_builtin_opcodes): Mark "synciobdma", "syncs", "syncw", "syncws", "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases. * micromips-opc.c (micromips_opcodes): Mark "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases. gas/ * testsuite/gas/mips/mips32r2-sync-1.d: New test. * testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests.
2017-05-10MIPS/GAS/testsuite: Convert ISA override list tests to dump testsMaciej W. Rozycki24-185/+78
And remove the zillion duplicate sources. Also `mips1@isa-override-2.l' is the same as `r3000@isa-override-2.l', so remove the latter too, now that `r3000@isa-override-2.d' can name a file to match stderr output against. gas/ * testsuite/gas/mips/isa-override-2.d: New test. * testsuite/gas/mips/mips1@isa-override-2.d: New test. * testsuite/gas/mips/r3000@isa-override-2.d: New test. * testsuite/gas/mips/r3900@isa-override-2.d: New test. * testsuite/gas/mips/mips2@isa-override-2.d: New test. * testsuite/gas/mips/mips32@isa-override-2.d: New test. * testsuite/gas/mips/mips32r2@isa-override-2.d: New test. * testsuite/gas/mips/mips32r3@isa-override-2.d: New test. * testsuite/gas/mips/mips32r5@isa-override-2.d: New test. * testsuite/gas/mips/mips32r6@isa-override-2.d: New test. * testsuite/gas/mips/octeon3@isa-override-2.d: New test. * testsuite/gas/mips/r3000@isa-override-2.l: Remove list test. * testsuite/gas/mips/mips1@isa-override-2.s: Remove test source. * testsuite/gas/mips/r3000@isa-override-2.s: Remove test source. * testsuite/gas/mips/r3900@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips2@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r2@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r3@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r5@isa-override-2.s: Remove test source. * testsuite/gas/mips/mips32r6@isa-override-2.s: Remove test source. * testsuite/gas/mips/octeon3@isa-override-2.s: Remove test source. * gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests into the new tests.
2017-05-10MIPS/GAS/testsuite: Correct swapped MIPS16e subset test namesMaciej W. Rozycki8-7/+17
Correct the test names swapped between common and 64-bit MIPS16e subset tests. gas/ * testsuite/gas/mips/mips16e-sub.d: Correct test name. * testsuite/gas/mips/mips16-32@mips16e-sub.d: Likewise. * testsuite/gas/mips/mips16-64@mips16e-sub.d: Likewise. * testsuite/gas/mips/mips16e-64-sub.d: Likewise. * testsuite/gas/mips/mips16-32@mips16e-64-sub.d: Likewise. * testsuite/gas/mips/mips16-64@mips16e-64-sub.d: Likewise. * testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: Likewise.
2017-05-10MIPS/GAS/testsuite: Remove stale `mips16-macro' list test outputMaciej W. Rozycki2-12/+4
Complement commit c60aaac10f9a1 ("MIPS/GAS/testsuite: Extend MIPS16 testing over multiple ISAs") and remove a stale `mips16-macro' list test output replaced with the `mips16-32@mips16-macro' stderr output. gas/ * testsuite/gas/mips/mips16-macro.l: Remove list test.
2017-05-10MIPS/GAS/testsuite: Remove last remnants of ECOFF supportMaciej W. Rozycki21-100/+23
Complement commit 16e5e222b6ea ("Make gas/mips/mips.exp ELF-only"), <https://sourceware.org/ml/binutils/2013-06/msg00195.html>, and commit fcedb9f3ca87 ("MIPS/GAS/testsuite: Remove remnants of a.out/ECOFF support"), and remove stale ECOFF test dumps previously missed. gas/ * testsuite/gas/mips/r3900@ecoff@ld.d: Remove test. * testsuite/gas/mips/mips2@ecoff@ld.d: Remove test. * testsuite/gas/mips/mips32@ecoff@ld.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@ld.d: Remove test. * testsuite/gas/mips/r3900@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips2@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips32@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/mips1@ecoff@sd.d: Remove test. * testsuite/gas/mips/r3000@ecoff@sd.d: Remove test. * testsuite/gas/mips/r3900@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips2@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips32@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@sd.d: Remove test. * testsuite/gas/mips/mips1@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/r3000@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/r3900@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/mips2@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/mips32@ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/mips32r2@ecoff@sd-forward.d: Remove test.
2017-05-10[ARC] Object attributes.Claudiu Zissulescu46-69/+762
gas/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/attr-arc600.d: New file. * testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc600_norm.d: Likewise. * testsuite/gas/arc/attr-arc601.d: Likewise. * testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc601_mul64.d: Likewise. * testsuite/gas/arc/attr-arc601_norm.d: Likewise. * testsuite/gas/arc/attr-arc700.d: Likewise. * testsuite/gas/arc/attr-arcem.d: Likewise. * testsuite/gas/arc/attr-archs.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.s: Likewise. * testsuite/gas/arc/attr-cpu-a601.d: Likewise. * testsuite/gas/arc/attr-cpu-a601.s: Likewise. * testsuite/gas/arc/attr-cpu-a700.d: Likewise. * testsuite/gas/arc/attr-cpu-a700.s: Likewise. * testsuite/gas/arc/attr-cpu-em.d: Likewise. * testsuite/gas/arc/attr-cpu-em.s: Likewise. * testsuite/gas/arc/attr-cpu-hs.d: Likewise. * testsuite/gas/arc/attr-cpu-hs.s: Likewise. * testsuite/gas/arc/attr-em.d: Likewise. * testsuite/gas/arc/attr-em4.d: Likewise. * testsuite/gas/arc/attr-em4_dmips.d: Likewise. * testsuite/gas/arc/attr-em4_fpuda.d: Likewise. * testsuite/gas/arc/attr-em4_fpus.d: Likewise. * testsuite/gas/arc/attr-hs.d: Likewise. * testsuite/gas/arc/attr-hs34.d: Likewise. * testsuite/gas/arc/attr-hs38.d: Likewise. * testsuite/gas/arc/attr-hs38_linux.d: Likewise. * testsuite/gas/arc/attr-mul64.d: Likewise. * testsuite/gas/arc/attr-name.d: Likewise. * testsuite/gas/arc/attr-name.s: Likewise. * testsuite/gas/arc/attr-nps400.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.s * testsuite/gas/arc/attr-quarkse_em.d: Likewise. * testsuite/gas/arc/blank.s: Likewise. * testsuite/gas/elf/section2.e-arc: Likewise. * testsuite/gas/arc/cpu-pseudop-1.d: Update test. * testsuite/gas/arc/cpu-pseudop-2.d: Likewise. * testsuite/gas/arc/nps400-0.d: Likewise. * testsuite/gas/elf/elf.exp: Set target_machine for ARC. * config/tc-arc.c (opcode/arc-attrs.h): Include. (ARC_GET_FLAG, ARC_SET_FLAG, streq): Define. (arc_attribute): Declare new function. (md_pseudo_table): Add arc_attribute. (cpu_types): Rename default cpu features. (selected_cpu): Set the default OSABI flag. (mpy_option): New variable. (pic_option): Likewise. (sda_option): Likewise. (tls_option): Likewise. (feature_type, feature_list): Remove. (arc_initial_eflag): Likewise. (attributes_set_explicitly): New variable. (arc_check_feature): Check also for the conflicting features. (arc_select_cpu): Refactor assignment of selected_cpu.eflags. (arc_option): Remove setting of private flags and architecture. (check_cpu_feature): Refactor feature names. (autodetect_attributes): New function. (assemble_tokens): Use above function. (md_parse_option): Refactor feature names. (arc_attribute): New function. (arc_set_attribute_int): Likewise. (arc_set_attribute_string): Likewise. (arc_stralloc): Likewise. (arc_set_public_attributes): Likewise. (arc_md_end): Likewise. (arc_copy_symbol_attributes): Likewise. (rc_convert_symbolic_attribute): Likewise. * config/tc-arc.h (md_end): Define. (CONVERT_SYMBOLIC_ATTRIBUTE): Likewise. (TC_COPY_SYMBOL_ATTRIBUTES): Likewise. * doc/c-arc.texi: Document ARC object attributes. binutils/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * readelf.c (decode_ARC_machine_flags): Recognize OSABI v4. (get_arc_section_type_name): New function. (get_section_type_name): Use the above function. (display_arc_attribute): New function. (process_arc_specific): Likewise. (process_arch_specific): Handle ARC specific information. * testsuite/binutils-all/strip-3.d: Consider ARC.attributes section. include/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * elf/arc.h (SHT_ARC_ATTRIBUTES): Define. (Tag_ARC_*): Define. (E_ARC_OSABI_V4): Define. (E_ARC_OSABI_CURRENT): Reassign it. (TAG_CPU_*): Define. * opcode/arc-attrs.h: New file. * opcode/arc.h (insn_subclass_t): Assign enum values. (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64. (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT) (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP) (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW) (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC) (ARC_CRC): Delete. bfd/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * elf32-arc.c (FEATURE_LIST_NAME): Define. (CONFLICT_LIST): Likewise. (opcode/arc-attrs.h): Include. (arc_elf_print_private_bfd_data): Print OSABI v4 flag. (arc_extract_features): New file. (arc_stralloc): Likewise. (arc_elf_merge_attributes): Likewise. (arc_elf_merge_private_bfd_data): Use object attributes. (bfd_arc_get_mach_from_attributes): New function. (arc_elf_object_p): Use object attributes. (arc_elf_final_write_processing): Likewise. (elf32_arc_obj_attrs_arg_type): New function. (elf32_arc_obj_attrs_handle_unknown): Likewise. (elf32_arc_section_from_shdr): Likewise. (elf_backend_obj_attrs_vendor): Define. (elf_backend_obj_attrs_section): Likewise. (elf_backend_obj_attrs_arg_type): Likewise. (elf_backend_obj_attrs_section_type): Likewise. (elf_backend_obj_attrs_handle_unknown): Likewise. (elf_backend_section_from_shdr): Likewise. ld/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/ld-arc/attr-merge-0.d: New file. * testsuite/ld-arc/attr-merge-0.s: Likewise. * testsuite/ld-arc/attr-merge-0e.s: Likewise. * testsuite/ld-arc/attr-merge-1.d: Likewise. * testsuite/ld-arc/attr-merge-1.s: Likewise. * testsuite/ld-arc/attr-merge-1e.s: Likewise. * testsuite/ld-arc/attr-merge-2.d: Likewise. * testsuite/ld-arc/attr-merge-2.s: Likewise. * testsuite/ld-arc/attr-merge-3.d: Likewise. * testsuite/ld-arc/attr-merge-3.s: Likewise. * testsuite/ld-arc/attr-merge-3e.s: Likewise. * testsuite/ld-arc/attr-merge-4.s: Likewise. * testsuite/ld-arc/attr-merge-5.d: Likewise. * testsuite/ld-arc/attr-merge-5a.s: Likewise. * testsuite/ld-arc/attr-merge-5b.s: Likewise. * testsuite/ld-arc/attr-merge-conflict-isa.d: Likewise. * testsuite/ld-arc/attr-merge-err-isa.d: Likewise. * testsuite/ld-arc/attr-merge-incompatible-cpu.d: Likewise. * testsuite/ld-arc/got-01.d: Update test. * testsuite/ld-arc/attr-merge-err-quarkse.d: New file. * testsuite/ld-arc/attr-quarkse.s: Likewise. * testsuite/ld-arc/attr-quarkse2.s: Likewise. opcodes/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * arc-dis.c (parse_option): Update quarkse_em option.. * arc-ext-tbl.h (dsp_fp_flt2i, dsp_fp_i2flt): Change subclass to QUARKSE1. (dsp_fp_div, dsp_fp_cmp): Change subclass to QUARKSE2.
2017-05-03MIPS16/GAS: Relax 32-bit non-PIC PC-relative synthetic instructionsMaciej W. Rozycki106-109/+2349
Implement the relaxation of MIPS16 PC-relative synthetic LA, DLA, LW and LD instructions to an equivalent sequence of instructions produced where the address operand requested is out of range, absolute or requires linker relocation, for ABIs that use 32-bit addressing and non-PIC code. The sequence generated uses the register specified for the destination operand as a temporary and begins with LI to load the high 16-bit part of the address, then continues with SLL by 16 bits to move that part into place and finally completes with a suitable operation corresponding to the synthetic instruction used, one of: 2-argument ADDIU, 2-argument DADDIU, absolute LW, and absolute LD respectively, providing the low 16-bit part of the address. All instructions use the extended encoding. As a special exception accept absolute addresses for relaxation even in PIC code. For example: la $2, 0x12345678 produces code as: li $2, 0x1234 sll $2, $2, 16 addiu $2, 0x5678 would. Where linker relocation is required emit an R_MIPS16_HI16 relocation on the initial LI instruction and an R_MIPS16_LO16 relocation on the final operation. For example (where `foo' is not local): lw $3, foo produces code as: li $3, %hi(foo) sll $3, $3, 16 lw $3, %lo(foo)($3) would. Emit assembly warnings as appropriate where this new relaxation triggers in the `nomacro' mode or for an instruction manually placed in a branch delay slot in the `noreorder' mode. Refrain from relaxation where an explicit instruction size suffix has been used and in the `noautoextend' mode. gas/ * config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `pic', `sym32' and `nomacro' flags. (RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO): New macros. (RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT) (RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT) (RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED) (RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED) (RELAX_MIPS16_MARK_ALWAYS_EXTENDED) (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED): Shift bits. (RELAX_MIPS16_MACRO, RELAX_MIPS16_MARK_MACRO) (RELAX_MIPS16_CLEAR_MACRO): New macros. (append_insn): Pass `mips_pic', HAVE_32BIT_SYMBOLS and `mips_opts.warn_about_macros' settings to RELAX_MIPS16_ENCODE. (mips16_macro_frag): New function. (md_estimate_size_before_relax): Handle HI16/LO16 relaxation. (mips_relax_frag): Likewise. (md_convert_frag): Likewise. * testsuite/gas/mips/mips16@relax-swap3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16e@relax-swap3.d: New test subarchitecture. * testsuite/gas/mips/micromips@relax-swap3.d: Remove trailing NOP padding. * testsuite/gas/mips/mips16-pcrel-reloc-2.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-reloc-3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-reloc-6.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-reloc-7.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-addend-2.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-addend-3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-absolute.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-pcrel-absolute-1.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16@relax-swap3.l: Remove file. * testsuite/gas/mips/mips16-pcrel-reloc-2.l: Remove file. * testsuite/gas/mips/mips16-pcrel-reloc-3.l: Remove file. * testsuite/gas/mips/mips16-pcrel-reloc-6.l: Remove file. * testsuite/gas/mips/mips16-pcrel-reloc-7.l: Remove file. * testsuite/gas/mips/mips16-pcrel-addend-2.l: Remove file. * testsuite/gas/mips/mips16-pcrel-addend-3.l: Remove file. * testsuite/gas/mips/mips16-pcrel-absolute.l: Remove file. * testsuite/gas/mips/mips16-pcrel-absolute-1.l: Remove file. * testsuite/gas/mips/relax-swap3.s: Adjust trailing padding. * testsuite/gas/mips/mips16-pcrel-0.d: New test. * testsuite/gas/mips/mips16-pcrel-1.d: New test. * testsuite/gas/mips/mips16-pcrel-2.d: New test. * testsuite/gas/mips/mips16-pcrel-3.d: New test. * testsuite/gas/mips/mips16-pcrel-4.d: New test. * testsuite/gas/mips/mips16-pcrel-5.d: New test. * testsuite/gas/mips/mips16-pcrel-pic-0.d: New test. * testsuite/gas/mips/mips16-pcrel-pic-1.d: New test. * testsuite/gas/mips/mips16-pcrel-n32-0.d: New test. * testsuite/gas/mips/mips16-pcrel-n32-1.d: New test. * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: New test. * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: New test. * testsuite/gas/mips/mips16-pcrel-n64-0.d: New test. * testsuite/gas/mips/mips16-pcrel-n64-1.d: New test. * testsuite/gas/mips/mips16-pcrel-delay-0.d: New test. * testsuite/gas/mips/mips16-pcrel-delay-1.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-4.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-5.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-6.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-7.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-8.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-9.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-pic-8.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-2.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-3.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-5.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-7.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-0.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-1.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-2.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-3.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-4.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-5.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-delay-0.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-delay-1.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-addend-8.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-addend-9.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-absolute-4.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-absolute-6.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-0.s: New test source. * testsuite/gas/mips/mips16-pcrel-1.s: New test source. * testsuite/gas/mips/mips16-pcrel-2.s: New test source. * testsuite/gas/mips/mips16-pcrel-3.s: New test source. * testsuite/gas/mips/mips16-pcrel-4.s: New test source. * testsuite/gas/mips/mips16-pcrel-5.s: New test source. * testsuite/gas/mips/mips16-pcrel-delay-0.s: New test source. * testsuite/gas/mips/mips16-pcrel-delay-1.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-4.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-5.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-6.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-7.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-8.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-9.s: New test source. * testsuite/gas/mips/mips16-pcrel-absolute-2.s: New test. * testsuite/gas/mips/mips16-pcrel-absolute-3.s: New test. * testsuite/gas/mips/mips16-pcrel-absolute-4.s: New test. * testsuite/gas/mips/mips16-pcrel-absolute-5.s: New test. * testsuite/gas/mips/mips16-pcrel-absolute-6.s: New test. * testsuite/gas/mips/mips16-pcrel-absolute-7.s: New test. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips16-pcrel-0.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-1.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-addend-2.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-addend-6.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-n32-0.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-n32-1.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-0.d: New test. * testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-1.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-05-03Prevent a seg-fault in the assembler when provided with a bogus input source ↵Nick Clifton2-3/+23
file. PR gas/20941 * symbols.c (snapshot_symbol): Handle the case where resolve_expression returns a local symbol.
2017-05-03MIPS16/GAS: Fix absolute references with PC-relative synthetic instructionsMaciej W. Rozycki18-1/+193
Complement commit 88a7ef168927 ("MIPS16/GAS: Restore unsupported relocation diagnostics") and also propagate constant expressions, either already reduced from absolute symbol references or created from literals in the first place, used as a PC-relative operand with the MIPS16 LA, LW, DLA and LD synthetic instructions to relaxation, matching the way forward absolute symbol references have been handled as from the commit referred and letting relaxation produce any necessary relocations, if possible, for the absolute value requested to be reproduced at the run time. Call `symbol_append' for any expression symbol created for the purpose of MIPS16 relaxation as with constant expressions now propagated from earlier on such symbols may make it through and have R_MIPS16_PC16_S1 relocations emitted against, and therefore need to appear in the symbol table produced. gas/ * config/tc-mips.c (append_insn): Call `symbol_append' for any expression symbol created for MIPS16 relaxation. (match_mips16_insn): Don't encode a constant value as an immediate with a PC-relative operand. * testsuite/gas/mips/mips16-pcrel-absolute-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-2.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n32-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n32-2.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend-n32-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n64-1.d: New test. * testsuite/gas/mips/mips16-branch-absolute-n64-2.d: New test. * testsuite/gas/mips/mips16-branch-absolute-addend-n64-1.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute-1.l: New stderr output. * testsuite/gas/mips/mips16-pcrel-absolute-1.s: New test source. * testsuite/gas/mips/mips16-branch-absolute-1.s: New test source. * testsuite/gas/mips/mips16-branch-absolute-2.s: New test source. * testsuite/gas/mips/mips16-branch-absolute-addend-1.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips16-branch-absolute-1.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-1.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n32-1.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n32-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32-1.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n64-1.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n64-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64-1.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-04-27MIPS16/GAS: Factor out duplicate symbol value conversion codeMaciej W. Rozycki2-92/+94
Factor out and consolidate duplicate section-relative to PC-relative symbol value conversion in `mips16_extended_frag' and `md_convert_frag' used for MIPS16 relaxation, observing that the final calculation in the latter function implies `stretch == 0'. Sanitize the formatting of code moved. gas/ * config/tc-mips.c (mips16_pcrel_val): New function, factored out from... (mips16_extended_frag): ... here. (md_convert_frag): Use `mips16_pcrel_val' rather than repeated code in MIPS16 relaxation, with `stretch' hardcoded to 0.
2017-04-27MIPS16/GAS: Rename the LONG_BRANCH relaxation flagMaciej W. Rozycki2-6/+16
Following commit 177b4a6ad004 ("infinite loop in mips16 assembler relaxation"), <https://sourceware.org/ml/binutils/2002-03/msg00345.html> the LONG_BRANCH flag used in MIPS16 relaxation has lost its use for branches. Complement commit 88a7ef168927 ("MIPS16/GAS: Restore unsupported relocation diagnostics") then, which has removed the remains of code deactivated by the former commit, and rename the flag to ALWAYS_EXTENDED, more accurately reflecting its current use to select the extended form of PC-relative ADDIU, DADDIU, LD and LW instructions. gas/ * config/tc-mips.c (RELAX_MIPS16_LONG_BRANCH): Rename to... (RELAX_MIPS16_ALWAYS_EXTENDED): ... this. (RELAX_MIPS16_MARK_LONG_BRANCH): Rename to... (RELAX_MIPS16_MARK_ALWAYS_EXTENDED): ... this. (RELAX_MIPS16_CLEAR_LONG_BRANCH): Rename to... (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED): ... this. (mips16_extended_frag): Adjust accordingly.
2017-04-27Tidy S_FORCE_RELOCAlan Modra2-6/+14
Separate out symbol flag reasons from section reasons to force a reloc. Yes, this adds another section test to the local symbol case too. * symbols.c (S_FORCE_RELOC): Separate section and symbol tests.
2017-04-27MIPS/GAS: Fix `.option picX' handling with relaxationMaciej W. Rozycki20-52/+375
Correct the handling of `.option pic0' and `.option pic2' GAS pseudo-ops in relaxation and use the setting of `mips_pic' (which these directives control) as at the time a relaxed frag has been created rather than the final `mips_pic' setting at the end of the source file processed. To do so record whether `mips_pic' is NO_PIC or not in the frag itself and use this information throughout relaxation instead of `mips_pic' to decide which of NO_PIC or SVR4_PIC to produce machine code for, fixing code generation and removing a possible fatal failure reproducible with: $ as -32 --relax-branch -o option-pic-relax-3.o option-pic-relax-3.s option-pic-relax-3.s: Assembler messages: option-pic-relax-3.s:7: Warning: relaxed out-of-range branch into a jump option-pic-relax-3.s: Internal error in cvt_frag_to_fill at .../gas/write.c:490. Please report this bug. $ using the test source included, due to a buffer overrun in filling the variable part of a frag. Likewise use the `fx_tcbit2' flag of a BFD_RELOC_16_PCREL_S2 fixup to handle the simple case of substituting an out of range unconditional branch with an equivalent absolute jump in NO_PIC code. Retain the current way of VXWORKS_PIC use, which commit 41a1578ed17c ("MIPS/GAS: Sanitize `.option picX' pseudo-op") has forbidden the use of `.option picX' with. gas/ * config/tc-mips.c (RELAX_ENCODE): Add `PIC' flag. (RELAX_PIC): New macro. (RELAX_USE_SECOND, RELAX_SECOND_LONGER, RELAX_NOMACRO) (RELAX_DELAY_SLOT, RELAX_DELAY_SLOT_16BIT) (RELAX_DELAY_SLOT_SIZE_FIRST, RELAX_DELAY_SLOT_SIZE_SECOND): Shift bits. (RELAX_BRANCH_ENCODE): Add `pic' flag. (RELAX_BRANCH_UNCOND, RELAX_BRANCH_LIKELY, RELAX_BRANCH_LINK) (RELAX_BRANCH_TOOFAR): Shift bits. (RELAX_BRANCH_PIC): New macro. (RELAX_MICROMIPS_ENCODE): Add `pic' flag. (RELAX_MICROMIPS_PIC): New macro. (RELAX_MICROMIPS_UNCOND, RELAX_MICROMIPS_COMPACT) (RELAX_MICROMIPS_LINK, RELAX_MICROMIPS_NODS) (RELAX_MICROMIPS_RELAX32): Shift bits. (relax_close_frag): Pass `mips_pic' setting to RELAX_ENCODE. (append_insn): Pass `mips_pic' setting to RELAX_BRANCH_ENCODE and RELAX_MICROMIPS_ENCODE, and record it in `fx_tcbit2' of the first fixup created. (md_apply_fix) <BFD_RELOC_16_PCREL_S2>: Use `fx_tcbit2' of the fixup processed rather than `mips_pic' in choosing to relax an out of range branch to a jump. (relaxed_branch_length): Use the `pic' flag of the relaxed frag rather than `mips_pic'. (relaxed_micromips_32bit_branch_length): Likewise. (md_estimate_size_before_relax): Likewise. (md_convert_frag): Likewise. * testsuite/gas/mips/option-pic-relax-0.d: New test. * testsuite/gas/mips/option-pic-relax-1.d: New test. * testsuite/gas/mips/option-pic-relax-2.d: New test. * testsuite/gas/mips/option-pic-relax-3.d: New test. * testsuite/gas/mips/option-pic-relax-3a.d: New test. * testsuite/gas/mips/option-pic-relax-4.d: New test. * testsuite/gas/mips/option-pic-relax-5.d: New test. * testsuite/gas/mips/option-pic-relax-2.l: New stderr output. * testsuite/gas/mips/option-pic-relax-3.l: New stderr output. * testsuite/gas/mips/option-pic-relax-4.l: New stderr output. * testsuite/gas/mips/option-pic-relax-5.l: New stderr output. * testsuite/gas/mips/option-pic-relax-0.s: New test source. * testsuite/gas/mips/option-pic-relax-1.s: New test source. * testsuite/gas/mips/option-pic-relax-2.s: New test source. * testsuite/gas/mips/option-pic-relax-3.s: New test source. * testsuite/gas/mips/option-pic-relax-4.s: New test source. * testsuite/gas/mips/option-pic-relax-5.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2017-04-25[ARC] Enhance enter/leave mnemonics.Claudiu Zissulescu3-16/+41
enter/leave mnemonics are enhanced to not only accept register ranges but also single register (i.e., r13) or even no GPR register at all. gas/ 2017-04-25 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/leave_enter.d: Update test. * testsuite/gas/arc/leave_enter.s: Likewise. opcodes/ 2017-04-25 Claudiu Zissulescu <claziss@synopsys.com> * arc-dis.c (print_insn_arc): Smartly print enter/leave mnemonics. * arc-opc.c (insert_r13el): New function. (R13_EL): Define. * arc-tbl.h: Add new enter/leave variants.
2017-04-25[ARC] Prefer NOP instead of MOV 0,0Claudiu Zissulescu3-5/+10
NOP and MOV 0,0 are having the same encoding. As MOV mnemonic is located before NOP in the instruction table, the disassembler prints MOV 0,0 for NOP. Reorder the instructions such that NOP is first. gas/ 2017-04-25 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/b.d: Update test. * testsuite/gas/arc/noargs_hs.d: Likewise. opcode/ 2017-04-25 Claudiu Zissulescu <claziss@synopsys.com> * arc-tbl.h: Reorder NOP entry to be before MOV instructions.
2017-04-25MIPS/GAS: Correct BFD_RELOC_MIPS16_16_PCREL_S1 fixup sizeMaciej W. Rozycki8-5/+108
Correct the size of a BFD_RELOC_MIPS16_16_PCREL_S1 fixup made in `md_convert_frag', fixing a bug introduced with commit c9775dde3277 ("MIPS16: Add R_MIPS16_PC16_S1 branch relocation support)". Add test cases to verify that the overflow of this fixup's in-place addend is still correctly detected. gas/ * config/tc-mips.c (md_convert_frag): Correct BFD_RELOC_MIPS16_16_PCREL_S1 fixup size. * testsuite/gas/mips/mips16-branch-addend-4.d: New test. * testsuite/gas/mips/mips16-branch-addend-5.d: New test. * testsuite/gas/mips/mips16-branch-addend-5.l: New stderr output. * testsuite/gas/mips/mips16-branch-addend-4.s: New test source. * testsuite/gas/mips/mips16-branch-addend-5.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2017-04-25gas: sparc: fix relaxation of CALL instruction into branches in a.out targetsJose E. Marchesi6-2/+69
This patch avoids CALL instructions to be optimized into branches if the symbols referred to in the CALL instruction are not fully resolved at the time the assembler writes its output. Tested in sparc64-linux-gnu and sparc-sun-sunos4.1.3 targets. No regressions. gas/ChangeLog: 2017-04-25 Jose E. Marchesi <jose.marchesi@oracle.com> PR gas/21407 * config/tc-sparc.c (md_apply_fix): Do not transform `call' instructions into branch instructions in fixups generating additional relocations. * testsuite/gas/sparc/call-relax.s: New file. * testsuite/gas/sparc/call-relax.d: Likewise. * testsuite/gas/sparc/call-relax-aout.d: Likewise. * testsuite/gas/sparc/sparc.exp: Test call-relax and call-relax-aout.
2017-04-24[GAS/ARM] Fix expansion of ldr pseudo instructionThomas Preud'homme4-24/+40
The LDR rX, =cst pseudo-instruction suffers from two issues for loading integer constants in Thumb mode: - movs is used if the constant and register can be encoded using that instruction which leads to unexpected behavior due to its flag-setting behavior - mov.w, movw and mvn are used for r13 (sp) and r15 (pc) but these encoding are marked as UNPREDICTABLE This patch fixes those issues and update testing accordingly. 2017-04-24 Thomas Preud'homme <thomas.preudhomme@arm.com> gas/ * config/tc-arm.c (move_or_literal_pool): Remove code generating MOVS. Forbid MOV.W and MOVW if destination is SP or PC. * testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s: Explain expectation of LDR not generating a MOVS for low registers and small constants. Add tests of MOVW generation. * testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d: Update expected disassembly.
2017-04-22PowerPC VLE insn set additionsAlan Modra3-127/+140
opcodes/ * ppc-opc.c (ELEV): Define. (vle_opcodes): Add se_rfgi and e_sc. (powerpc_opcodes): Enable lbdx, lhdx, lwdx, stbdx, sthdx, stwdx for E200Z4. gas/ * testsuite/gas/ppc/vle.s: Format. Add se_rfgi and e_sc. * testsuite/gas/ppc/vle.d: Update.
2017-04-21Fix detection of illegal AArch64 opcodes that resemble LD1R, LD2R, LD3R and ↵Nick Clifton3-0/+29
LD4R. PR binutils/21380 opcodes * aarch64-tbl.h (aarch64_opcode_table): Fix masks for LD1R, LD2R, LD3R and LD4R. gas * testsuite/gas/aarch64/illegal-3.s: New file. * testsuite/gas/aarch64/illegal-3.d: New file.
2017-04-11Bye bye PPC_OPCODE_HTM and -mhtmAlan Modra3-3/+7
The -mhtm option is fairly useless too. include/ * opcode/ppc.h (PPC_OPCODE_HTM): Delete. gas/ * config/tc-ppc.c (md_show_usage): Delete mention of -mhtm. * testsuite/gas/ppc/htm.d: Pass -mpower8 and -Mpower8. opcodes/ * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_HTM and "htm". * ppc-opc.c (PPCHTM): Define as PPC_OPCODE_POWER8.
2017-04-10gas: xtensa: fix incorrect code generated with auto litpoolsMax Filippov8-32/+95
* config/tc-xtensa.c (xtensa_maybe_create_literal_pool_frag): Initialize lps->frag_count with auto_litpool_limit. (xg_promote_candidate_litpool): New function. (xtensa_move_literals): Extract candidate litpool promotion code into separate function. Call it for all possible found candidates. (xtensa_switch_to_literal_fragment): Drop 'recursive' flag and call to xtensa_mark_literal_pool_location that it guards. Replace it with call to xtensa_maybe_create_literal_pool_frag. Initialize pool_location with created literal pool candidate. * testsuite/gas/xtensa/all.exp: Add new tests. * testsuite/gas/xtensa/auto-litpools-first1.d: New test results. * testsuite/gas/xtensa/auto-litpools-first1.s: New test. * testsuite/gas/xtensa/auto-litpools-first2.d: New test results. * testsuite/gas/xtensa/auto-litpools-first2.s: New test. * testsuite/gas/xtensa/auto-litpools.d: Fix offsets changed due to additional jump instruction.
2017-04-07Remove E6500 insns from PPC_OPCODE_ALTIVEC2Alan Modra3-163/+72
This isn't losing anything from the testsuite. All of these insns appear in testsuite/gas/ppc/e6500.s opcodes/ * ppc-opc.c (powerpc_opcodes <mviwsplt, mvidsplt, lvexbx, lvepxl, lvexhx, lvepx, lvexwx, stvexbx, stvexhx, stvexwx, lvtrx, lvtlx, lvswx, stvfrx, stvflx, stvswx, lvsm, stvepxl, lvtrxl, stvepx, lvtlxl, lvswxl, stvfrxl, stvflxl, stvswxl>): Enable E6500 only vector instructions with E6500 not PPCVEC2. gas/ * testsuite/gas/ppc/altivec2.s: Delete E6500 vector insns. * testsuite/gas/ppc/altivec2.d: Adjust to suit.
2017-04-07MBIND gas test tweakAlan Modra2-2/+7
score-elf aligns text sections. * testsuite/gas/elf/section12a.d: Don't expect alignment of 1 for .mbind.text.
2017-04-06Add support for disassembling WebAssembly opcodes.Pip Cet9-38/+78
include * dis-asm.h: Add prototypes for wasm32 disassembler. opcodes * Makefile.am: Add wasm32-dis.c. * configure.ac: Add wasm32-dis.c to wasm32 target. * disassemble.c: Add wasm32 disassembler code. * wasm32-dis.c: New file. * Makefile.in: Regenerate. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/opcodes.pot: Regenerate. gas * testsuite/gas/wasm32/allinsn.d: Adjust test for disassembler changes. * testsuite/gas/wasm32/disass.d: New test. * testsuite/gas/wasm32/disass.s: New test. * testsuite/gas/wasm32/disass-2.d: New test. * testsuite/gas/wasm32/disass-2.s: New test. * testsuite/gas/wasm32/reloc.d: Adjust test for changed reloc names. * testsuite/gas/wasm32/reloc.s: Update test for changed assembler syntax. * testsuite/gas/wasm32/wasm32.exp: Run new tests. Expect allinsn test to succeed.
2017-04-04Support ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXXH.J. Lu21-25/+222
Mark an ALLOC section, which should be placed in special memory area, with SHF_GNU_MBIND. Its sh_info field indicates the special memory type. GNU_MBIND section names start with ".mbind" so that they are placed as orphan sections by linker. All input GNU_MBIND sections with the same sh_type, sh_flags and sh_info are placed in one output GNU_MBIND section. In executable and shared object, create a GNU_MBIND segment for each GNU_MBIND section and its segment type is PT_GNU_MBIND_LO plus the sh_info value. Each GNU_MBIND segment is aligned at page boundary. The assembler syntax: .section .mbind.foo,"adx",%progbits ^ 0: Special memory type. | 'd' for SHF_GNU_MBIND. .section .mbind.foo,"adx",%progbits,0x1 ^ 1: Special memory type. | 'd' for SHF_GNU_MBIND. .section .mbind.bar,"adG",%progbits,.foo_group,comdat,0x2 ^ 2: Special memory type. | 'd' for SHF_GNU_MBIND. bfd/ * elf.c (get_program_header_size): Add a GNU_MBIND segment for each GNU_MBIND section and align GNU_MBIND section to page size. (_bfd_elf_map_sections_to_segments): Create a GNU_MBIND segment for each GNU_MBIND section. (_bfd_elf_init_private_section_data): Copy sh_info from input for GNU_MBIND section. binutils/ * NEWS: Mention support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. * readelf.c (get_segment_type): Handle PT_GNU_MBIND_XXX. (get_elf_section_flags): Handle SHF_GNU_MBIND. (process_section_headers): Likewise. * testsuite/binutils-all/mbind1.s: New file. * testsuite/binutils-all/objcopy.exp: Run readelf test on mbind1.s. gas/ * NEWS: Mention support for ELF SHF_GNU_MBIND. * config/obj-elf.c (section_match): New. (get_section): Match both sh_info and group name. (obj_elf_change_section): Add argument for sh_info. Pass both sh_info and group name to get_section. Issue an error for SHF_GNU_MBIND section without SHF_ALLOC. Set sh_info. (obj_elf_parse_section_letters): Set SHF_GNU_MBIND for 'd'. (obj_elf_section): Support SHF_GNU_MBIND section info. * config/obj-elf.h (obj_elf_change_section): Add argument for sh_info. * config/tc-arm.c (start_unwind_section): Pass 0 as sh_info to obj_elf_change_section. * config/tc-ia64.c (obj_elf_vms_common): Likewise. * config/tc-microblaze.c (microblaze_s_data): Likewise. (microblaze_s_sdata): Likewise. (microblaze_s_rdata): Likewise. (microblaze_s_bss): Likewise. * config/tc-mips.c (s_change_section): Likewise. * config/tc-msp430.c (msp430_profiler): Likewise. * config/tc-rx.c (parse_rx_section): Likewise. * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise. * doc/as.texinfo: Document 'd' for SHF_GNU_MBIND. * testsuite/gas/elf/elf.exp: Run section12a, section12b and section13. * testsuite/gas/elf/section10.d: Updated. * testsuite/gas/elf/section10.s: Likewise. * testsuite/gas/elf/section12.s: New file. * testsuite/gas/elf/section12a.d: Likewise. * testsuite/gas/elf/section12b.d: Likewise. * testsuite/gas/elf/section13.l: Likewise. * testsuite/gas/elf/section13.d: Likewise. * testsuite/gas/elf/section13.s: Likewise. include/ * elf/common.h (PT_GNU_MBIND_NUM): New. (PT_GNU_MBIND_LO): Likewise. (PT_GNU_MBIND_HI): Likewise. (SHF_GNU_MBIND): Likewise. ld/ * NEWS: Mention support for ELF SHF_GNU_MBIND and PT_GNU_MBIND_XXX. * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Place input GNU_MBIND sections with the same type, attributes and sh_info field into a single output GNU_MBIND section. * testsuite/ld-elf/elf.exp: Run mbind2a and mbind2b. * testsuite/ld-elf/mbind1.s: New file. * testsuite/ld-elf/mbind1a.d: Likewise. * testsuite/ld-elf/mbind1b.d: Likewise. * testsuite/ld-elf/mbind1c.d: Likewise. * testsuite/ld-elf/mbind2a.s: Likewise. * testsuite/ld-elf/mbind2b.c: Likewise.
2017-04-03RISC-V: Avoid a const warningPalmer Dabbelt2-1/+6
2017-04-03 Palmer Dabbelt <palmer@dabbelt.com> * config/tc-riscv.c (riscv_clear_subsets): Cast argument to free to avoid const warnings.
2017-04-03 IA16 supportAndrew Jenner1-0/+3
* config.sub: Handle ia16 in $basic_machine. bfd/ * config.bfd: Handle ia16. gas/ * configure.tgt: Handle ia16. ld/ * configure.tgt: Handle ia16.
2017-03-31RISC-V: Allow ISA subsets to be disabledPalmer Dabbelt2-0/+21
Without this patch, passing "-march=rv64ic -march=rv64i" results in you getting a "RV64IC" toolchain, which isn't expected. gas/ChangeLog: 2017-03-30 Palmer Dabbelt <palmer@dabbelt.com> * config/tc-riscv.c (riscv_clear_subsets): New function. (riscv_add_subset): Call riscv_clear_subsets and riscv_set_rvc to clear RVC when it's been previously set.
2017-03-31Reduce the size of s390 symbol tables by allowing relocations in mergeable ↵Nick Clifton2-2/+10
string sections (eg .debug_str) to be made section relative rather than symbol relative. PR gas/21333 * config/tc-s390.c (tc_s390_fix_adjustable): Allow non pc-relative fixups in mergeable sections to be adjusted.
2017-03-30Add support for the WebAssembly file format and the wasm32 ELF conversion to ↵Pip Cet64-1662/+3502
gas and the binutils. binutils * readelf.c: Add support for wasm32 ELF format WebAssembly files. (guess_is_rela): Likewise. (dump_relocations): Likewise. (is_32bit_abs_reloc): Likewise. (is_none_reloc_): Likewise. * NEWS: Mention the new support. * testsuite/lib/binutils-common.exp (is_elf_format): Mark wasm32 as ELF target. (supports_gnu_unique): Mark wasm32 as supporting STB_GNU_UNIQUE. * testsuite/binutils-all/nm.exp: Mark wasm32 as requiring .size annotations. * testsuite/binutils-all/wasm32: New directory. * testsuite/binutils-all/wasm32/create-wasm.d: New file. * testsuite/binutils-all/wasm32/create-wasm.s: Likewise. * testsuite/binutils-all/wasm32/custom-section.d: Likewise. * testsuite/binutils-all/wasm32/custom-section.s: Likewise. * testsuite/binutils-all/wasm32/invalid-wasm-1.d: Likewise. * testsuite/binutils-all/wasm32/invalid-wasm-1.s: Likewise. * testsuite/binutils-all/wasm32/long-sections.d: Likewise. * testsuite/binutils-all/wasm32/long-sections.s: Likewise. * testsuite/binutils-all/wasm32/parse-wasm.d: Likewise. * testsuite/binutils-all/wasm32/parse-wasm.s: Likewise. * testsuite/binutils-all/wasm32/parse-wasm-2.d: Likewise. * testsuite/binutils-all/wasm32/parse-wasm-2.s: Likewise. * testsuite/binutils-all/wasm32/prepared-section.d: Likewise. * testsuite/binutils-all/wasm32/prepared-section.s: Likewise. * testsuite/binutils-all/wasm32/wasm32.exp: New file, run tests. gas * config/tc-wasm32.h: New file: Add WebAssembly assembler target. * config/tc-wasm32.c: New file: Add WebAssembly assembler target. * Makefile.am: Add WebAssembly assembler target. * configure.tgt: Add WebAssembly assembler target. * doc/c-wasm32.texi: New file: Start documenting WebAssembly assembler. * doc/all.texi: Define WASM32. * doc/as.texinfo: Add WebAssembly entries. * NEWS: Mention the new support. * Makefile.in: Regenerate. * po/gas.pot: Regenerate. * po/POTFILES.in: Regenerate. * testsuite/gas/wasm32: New directory. * testsuite/gas/wasm32/allinsn.d: New file. * testsuite/gas/wasm32/allinsn.s: New file. * testsuite/gas/wasm32/illegal.l: New file. * testsuite/gas/wasm32/illegal.s: New file. * testsuite/gas/wasm32/illegal-2.l: New file. * testsuite/gas/wasm32/illegal-2.s: New file. * testsuite/gas/wasm32/illegal-3.l: New file. * testsuite/gas/wasm32/illegal-3.s: New file. * testsuite/gas/wasm32/illegal-4.l: New file. * testsuite/gas/wasm32/illegal-4.s: New file. * testsuite/gas/wasm32/illegal-5.l: New file. * testsuite/gas/wasm32/illegal-5.s: New file. * testsuite/gas/wasm32/illegal-6.l: New file. * testsuite/gas/wasm32/illegal-6.s: New file. * testsuite/gas/wasm32/illegal-7.l: New file. * testsuite/gas/wasm32/illegal-7.s: New file. * testsuite/gas/wasm32/illegal-8.l: New file. * testsuite/gas/wasm32/illegal-8.s: New file. * testsuite/gas/wasm32/illegal-9.l: New file. * testsuite/gas/wasm32/illegal-9.s: New file. * testsuite/gas/wasm32/illegal-10.l: New file. * testsuite/gas/wasm32/illegal-10.s: New file. * testsuite/gas/wasm32/illegal-11.l: New file. * testsuite/gas/wasm32/illegal-11.s: New file. * testsuite/gas/wasm32/illegal-12.l: New file. * testsuite/gas/wasm32/illegal-12.s: New file. * testsuite/gas/wasm32/illegal-13.l: New file. * testsuite/gas/wasm32/illegal-13.s: New file. * testsuite/gas/wasm32/illegal-14.l: New file. * testsuite/gas/wasm32/illegal-14.s: New file. * testsuite/gas/wasm32/illegal-15.l: New file. * testsuite/gas/wasm32/illegal-15.s: New file. * testsuite/gas/wasm32/illegal-16.l: New file. * testsuite/gas/wasm32/illegal-16.s: New file. * testsuite/gas/wasm32/illegal-17.l: New file. * testsuite/gas/wasm32/illegal-17.s: New file. * testsuite/gas/wasm32/illegal-18.l: New file. * testsuite/gas/wasm32/illegal-18.s: New file. * testsuite/gas/wasm32/illegal-19.l: New file. * testsuite/gas/wasm32/illegal-19.s: New file. * testsuite/gas/wasm32/illegal-20.l: New file. * testsuite/gas/wasm32/illegal-20.s: New file. * testsuite/gas/wasm32/illegal-21.l: New file. * testsuite/gas/wasm32/illegal-21.s: New file. * testsuite/gas/wasm32/illegal-22.l: New file. * testsuite/gas/wasm32/illegal-22.s: New file. * testsuite/gas/wasm32/illegal-24.l: New file. * testsuite/gas/wasm32/illegal-24.s: New file. * testsuite/gas/wasm32/illegal-25.l: New file. * testsuite/gas/wasm32/illegal-25.s: New file. * testsuite/gas/wasm32/reloc.d: New file. * testsuite/gas/wasm32/reloc.s: New file. * testsuite/gas/wasm32/wasm32.exp: New tests for WebAssembly architecture. opcodes * configure.ac: Add (empty) bfd_wasm32_arch target. * configure: Regenerate * po/opcodes.pot: Regenerate. include * opcode/wasm.h: New file to support wasm32 architecture. * elf/wasm32.h: Add R_WASM32_32 relocation. bfd * elf32-wasm32.c: Add relocation code, two relocs. * reloc.c: Add wasm32 relocations. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * bfd/po/bfd.pot: Regenerate.
2017-03-29PowerPC -Mraw disassemblyAlan Modra2-1/+6
This adds -Mraw for PowerPC objdump, a disassembler option to display the underlying machine instruction rather than aliases. For example, "rlwinm" always rather than "rotlwi" when the instruction is performing a simple rotate. binutils/ * doc/binutils.texi (objdump): Document PowerPC -M options. gas/ * config/tc-ppc.c (md_parse_option): Reject -mraw. include/ * opcode/ppc.h (PPC_OPCODE_RAW): Define. (PPC_OPCODE_*): Make them all unsigned long long constants. opcodes/ * ppc-dis.c (ppc_opts): Set PPC_OPCODE_PPC for "any" flags. Add "raw" option. (lookup_powerpc): Don't special case -1 dialect. Handle PPC_OPCODE_RAW. (print_insn_powerpc): Mask out PPC_OPCODE_ANY on first lookup_powerpc call, pass it on second.
generated by cgit v1.1 at 2024-09-18 08:31:36 +0000