MIPS/opcodes: Mark descriptive SYNC mnemonics as aliases

Following the way how descriptive SYNC mnemonics have been defined in
the architecture[1][2] mark them as aliases, so that the generic SYNC
instruction can be alternatively disassembled along with its immediate
operand, as noted in the documents referred.

References:

[1] "MIPS Architecture For Programmers, Volume II-A: The MIPS32
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
    Revision 5.04, December 11, 2013, Table 4.7 "Encodings of the
    Bits[10:6] of the SYNC instruction; the SType Field", p. 305

[2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
    Revision 5.04, January 15, 2014, Table 5.28 "Encodings of the
    Bits[10:6] of the SYNC instruction; the SType Field", p. 481

	opcodes/
	* mips-opc.c (mips_builtin_opcodes): Mark "synciobdma", "syncs",
	"syncw", "syncws", "sync_acquire", "sync_mb", "sync_release",
	"sync_rmb" and "sync_wmb" as aliases.
	* micromips-opc.c (micromips_opcodes): Mark "sync_acquire",
	"sync_mb", "sync_release", "sync_rmb" and "sync_wmb" as aliases.

	gas/
	* testsuite/gas/mips/mips32r2-sync-1.d: New test.
	* testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test.
	* testsuite/gas/mips/mips.exp: Run the new tests.

4 files changed, 66 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index be2a658..63ca633 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2017-05-11  Maciej W. Rozycki  <macro@imgtec.com>
+
+	* testsuite/gas/mips/mips32r2-sync-1.d: New test.
+	* testsuite/gas/mips/micromips@mips32r2-sync-1.d: New test.
+	* testsuite/gas/mips/mips.exp: Run the new tests.
+
 2017-05-10  Maciej W. Rozycki  <macro@imgtec.com>
 
 	* testsuite/gas/mips/isa-override-2.d: New test.
diff --git a/gas/testsuite/gas/mips/micromips@mips32r2-sync-1.d b/gas/testsuite/gas/mips/micromips@mips32r2-sync-1.d
new file mode 100644
index 0000000..e68a492
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips@mips32r2-sync-1.d
@@ -0,0 +1,29 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M no-aliases
+#name: MIPS32r2 sync instructions
+#as: -32
+#source: mips32r2-sync.s
+
+# Check MIPS32r2 sync instructions assembly and disassembly (microMIPS).
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 0000 6b7c 	sync
+[0-9a-f]+ <[^>]*> 0002 6b7c 	sync	0x2
+[0-9a-f]+ <[^>]*> 0004 6b7c 	sync	0x4
+[0-9a-f]+ <[^>]*> 0008 6b7c 	sync	0x8
+[0-9a-f]+ <[^>]*> 0010 6b7c 	sync	0x10
+[0-9a-f]+ <[^>]*> 0011 6b7c 	sync	0x11
+[0-9a-f]+ <[^>]*> 0012 6b7c 	sync	0x12
+[0-9a-f]+ <[^>]*> 0013 6b7c 	sync	0x13
+[0-9a-f]+ <[^>]*> 0018 6b7c 	sync	0x18
+[0-9a-f]+ <[^>]*> 0000 6b7c 	sync
+[0-9a-f]+ <[^>]*> 0002 6b7c 	sync	0x2
+[0-9a-f]+ <[^>]*> 0004 6b7c 	sync	0x4
+[0-9a-f]+ <[^>]*> 0008 6b7c 	sync	0x8
+[0-9a-f]+ <[^>]*> 0010 6b7c 	sync	0x10
+[0-9a-f]+ <[^>]*> 0011 6b7c 	sync	0x11
+[0-9a-f]+ <[^>]*> 0012 6b7c 	sync	0x12
+[0-9a-f]+ <[^>]*> 0013 6b7c 	sync	0x13
+[0-9a-f]+ <[^>]*> 0018 6b7c 	sync	0x18
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 9574d22..e1fcce6 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -1403,6 +1403,8 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "mips32-sync"
     run_dump_test_arches "mips32r2-sync" \
 					[mips_arch_list_matching mips32r2]
+    run_dump_test_arches "mips32r2-sync-1" \
+					[mips_arch_list_matching mips32r2]
     run_dump_test_arches "alnv_ps-swap" [mips_arch_list_matching fpisa5 \
 						!mips32r6]
     run_dump_test_arches "cache" [lsort -dictionary -unique [concat \
diff --git a/gas/testsuite/gas/mips/mips32r2-sync-1.d b/gas/testsuite/gas/mips/mips32r2-sync-1.d
new file mode 100644
index 0000000..69c5c27
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips32r2-sync-1.d
@@ -0,0 +1,29 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M no-aliases
+#name: MIPS32r2 sync instructions 1
+#as: -32
+#source: mips32r2-sync.s
+
+# Check MIPS32r2 sync instructions assembly and disassembly
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 0000000f 	sync
+[0-9a-f]+ <[^>]*> 0000008f 	sync	0x2
+[0-9a-f]+ <[^>]*> 0000010f 	sync	0x4
+[0-9a-f]+ <[^>]*> 0000020f 	sync	0x8
+[0-9a-f]+ <[^>]*> 0000040f 	sync	0x10
+[0-9a-f]+ <[^>]*> 0000044f 	sync	0x11
+[0-9a-f]+ <[^>]*> 0000048f 	sync	0x12
+[0-9a-f]+ <[^>]*> 000004cf 	sync	0x13
+[0-9a-f]+ <[^>]*> 0000060f 	sync	0x18
+[0-9a-f]+ <[^>]*> 0000000f 	sync
+[0-9a-f]+ <[^>]*> 0000008f 	sync	0x2
+[0-9a-f]+ <[^>]*> 0000010f 	sync	0x4
+[0-9a-f]+ <[^>]*> 0000020f 	sync	0x8
+[0-9a-f]+ <[^>]*> 0000040f 	sync	0x10
+[0-9a-f]+ <[^>]*> 0000044f 	sync	0x11
+[0-9a-f]+ <[^>]*> 0000048f 	sync	0x12
+[0-9a-f]+ <[^>]*> 000004cf 	sync	0x13
+[0-9a-f]+ <[^>]*> 0000060f 	sync	0x18
+	\.\.\.