Add support for disassembling WebAssembly opcodes.

include	* dis-asm.h: Add prototypes for wasm32 disassembler.

opcodes	* Makefile.am: Add wasm32-dis.c.
	* configure.ac: Add wasm32-dis.c to wasm32 target.
	* disassemble.c: Add wasm32 disassembler code.
	* wasm32-dis.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
	* po/opcodes.pot: Regenerate.

gas	* testsuite/gas/wasm32/allinsn.d: Adjust test for disassembler
	changes.
	* testsuite/gas/wasm32/disass.d: New test.
	* testsuite/gas/wasm32/disass.s: New test.
	* testsuite/gas/wasm32/disass-2.d: New test.
	* testsuite/gas/wasm32/disass-2.s: New test.
	* testsuite/gas/wasm32/reloc.d: Adjust test for changed reloc
	names.
	* testsuite/gas/wasm32/reloc.s: Update test for changed assembler
	syntax.
	* testsuite/gas/wasm32/wasm32.exp: Run new tests.  Expect allinsn
	test to succeed.

9 files changed, 78 insertions, 38 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index cc5f349..0a0d207 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,18 @@
+2017-04-06  Pip Cet  <pipcet@gmail.com>
+
+	* testsuite/gas/wasm32/allinsn.d: Adjust test for disassembler
+	changes.
+	* testsuite/gas/wasm32/disass.d: New test.
+	* testsuite/gas/wasm32/disass.s: New test.
+	* testsuite/gas/wasm32/disass-2.d: New test.
+	* testsuite/gas/wasm32/disass-2.s: New test.
+	* testsuite/gas/wasm32/reloc.d: Adjust test for changed reloc
+	names.
+	* testsuite/gas/wasm32/reloc.s: Update test for changed assembler
+	syntax.
+	* testsuite/gas/wasm32/wasm32.exp: Run new tests.  Expect allinsn
+	test to succeed.
+
 2017-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* NEWS: Mention support for ELF SHF_GNU_MBIND.
diff --git a/gas/testsuite/gas/wasm32/allinsn.d b/gas/testsuite/gas/wasm32/allinsn.d
index 06124be..c594c72 100644
--- a/gas/testsuite/gas/wasm32/allinsn.d
+++ b/gas/testsuite/gas/wasm32/allinsn.d
@@ -11,7 +11,7 @@ Disassembly of section .text:
    0:	02 40       		block\[\]
    2:	0c 00       		br 0
    4:	0d 00       		br_if 0
-   6:	0e 01 01 01 		br_table 1 1
+   6:	0e 01 01 01 		br_table 1 1 1
    a:	10 00       		call 0x0
    c:	11 00 00    		call_indirect 0 0
    f:	1a          		drop
@@ -22,12 +22,12 @@ Disassembly of section .text:
   14:	8d          		f32.ceil
   15:	43 d0 0f 49 		f32.const 3.141590118408203125
   19:	40 
-  1a:	b2          		f32.convert_s_i32
-  1b:	b4          		f32.convert_s_i64
-  1c:	b3          		f32.convert_u_i32
-  1d:	b5          		f32.convert_u_i64
+  1a:	b2          		f32.convert_s/i32
+  1b:	b4          		f32.convert_s/i64
+  1c:	b3          		f32.convert_u/i32
+  1d:	b5          		f32.convert_u/i64
   1e:	98          		f32.copysign
-  1f:	b6          		f32.demote_f64
+  1f:	b6          		f32.demote/f64
   20:	95          		f32.div
   21:	5b          		f32.eq
   22:	8e          		f32.floor
@@ -42,7 +42,7 @@ Disassembly of section .text:
   2d:	5c          		f32.ne
   2e:	90          		f32.nearest
   2f:	8c          		f32.neg
-  30:	be          		f32.reinterpret_i32
+  30:	be          		f32.reinterpret/i32
   31:	91          		f32.sqrt
   32:	38 00 00    		f32.store a=0 0
   35:	93          		f32.sub
@@ -53,10 +53,10 @@ Disassembly of section .text:
   3a:	44 97 5f 4f 		f64.const 3.14158999999999976088e\+200
   3e:	fd bc 6a 90 
   42:	69 
-  43:	b7          		f64.convert_s_i32
-  44:	b9          		f64.convert_s_i64
-  45:	b8          		f64.convert_u_i32
-  46:	ba          		f64.convert_u_i64
+  43:	b7          		f64.convert_s/i32
+  44:	b9          		f64.convert_s/i64
+  45:	b8          		f64.convert_u/i32
+  46:	ba          		f64.convert_u/i64
   47:	a6          		f64.copysign
   48:	a3          		f64.div
   49:	61          		f64.eq
@@ -72,14 +72,14 @@ Disassembly of section .text:
   55:	62          		f64.ne
   56:	9e          		f64.nearest
   57:	9a          		f64.neg
-  58:	bb          		f64.promote_f32
-  59:	bf          		f64.reinterpret_i64
+  58:	bb          		f64.promote/f32
+  59:	bf          		f64.reinterpret/i64
   5a:	9f          		f64.sqrt
   5b:	39 00 00    		f64.store a=0 0
   5e:	a1          		f64.sub
   5f:	9d          		f64.trunc
-  60:	23 00       		get_global 0 <\$got>
-  62:	20 00       		get_local 0 <\$dpc>
+  60:	23 00       		get_global 0
+  62:	20 00       		get_local 0
   64:	6a          		i32.add
   65:	71          		i32.and
   66:	67          		i32.clz
@@ -107,7 +107,7 @@ Disassembly of section .text:
   8a:	47          		i32.ne
   8b:	72          		i32.or
   8c:	69          		i32.popcnt
-  8d:	bc          		i32.reinterpret_f32
+  8d:	bc          		i32.reinterpret/f32
   8e:	6f          		i32.rem_s
   8f:	70          		i32.rem_u
   90:	77          		i32.rotl
@@ -119,11 +119,11 @@ Disassembly of section .text:
   98:	3b 00 00    		i32.store16 a=0 0
   9b:	3a 00 00    		i32.store8 a=0 0
   9e:	6b          		i32.sub
-  9f:	a8          		i32.trunc_s_f32
-  a0:	aa          		i32.trunc_s_f64
-  a1:	a9          		i32.trunc_u_f32
-  a2:	ab          		i32.trunc_u_f64
-  a3:	a7          		i32.wrap_i64
+  9f:	a8          		i32.trunc_s/f32
+  a0:	aa          		i32.trunc_s/f64
+  a1:	a9          		i32.trunc_u/f32
+  a2:	ab          		i32.trunc_u/f64
+  a3:	a7          		i32.wrap/i64
   a4:	73          		i32.xor
   a5:	7c          		i64.add
   a6:	83          		i64.and
@@ -136,8 +136,8 @@ Disassembly of section .text:
   b4:	80          		i64.div_u
   b5:	51          		i64.eq
   b6:	50          		i64.eqz
-  b7:	ac          		i64.extend_s_i32
-  b8:	ad          		i64.extend_u_i32
+  b7:	ac          		i64.extend_s/i32
+  b8:	ad          		i64.extend_u/i32
   b9:	59          		i64.ge_s
   ba:	5a          		i64.ge_u
   bb:	55          		i64.gt_s
@@ -157,7 +157,7 @@ Disassembly of section .text:
   d7:	52          		i64.ne
   d8:	84          		i64.or
   d9:	7b          		i64.popcnt
-  da:	bd          		i64.reinterpret_f64
+  da:	bd          		i64.reinterpret/f64
   db:	81          		i64.rem_s
   dc:	82          		i64.rem_u
   dd:	89          		i64.rotl
@@ -170,20 +170,20 @@ Disassembly of section .text:
   e8:	3e 00 00    		i64.store32 a=0 0
   eb:	3c 00 00    		i64.store8 a=0 0
   ee:	7d          		i64.sub
-  ef:	ae          		i64.trunc_s_f32
-  f0:	b0          		i64.trunc_s_f64
-  f1:	af          		i64.trunc_u_f32
-  f2:	b1          		i64.trunc_u_f64
+  ef:	ae          		i64.trunc_s/f32
+  f0:	b0          		i64.trunc_s/f64
+  f1:	af          		i64.trunc_u/f32
+  f2:	b1          		i64.trunc_u/f64
   f3:	85          		i64.xor
   f4:	04 7f       		if\[i\]
   f6:	03 7e       		loop\[l\]
   f8:	01          		nop
   f9:	0f          		return
   fa:	1b          		select
-  fb:	24 00       		set_global 0 <\$got>
-  fd:	21 00       		set_local 0 <\$dpc>
+  fb:	24 00       		set_global 0
+  fd:	21 00       		set_local 0
   ff:	60          		f32.ge
- 100:	08          		.byte 08
+ 100:	08          		.byte 0x08
 
  101:	7f          		i64.div_s
  102:	7e          		i64.mul
@@ -194,5 +194,5 @@ Disassembly of section .text:
  107:	7e          		i64.mul
  108:	7f          		i64.div_s
  109:	00          		unreachable
- 10a:	22 00       		tee_local 0 <\$dpc>
+ 10a:	22 00       		tee_local 0
 	...
diff --git a/gas/testsuite/gas/wasm32/disass-2.d b/gas/testsuite/gas/wasm32/disass-2.d
new file mode 100644
index 0000000..b6aa795
--- /dev/null
+++ b/gas/testsuite/gas/wasm32/disass-2.d
@@ -0,0 +1,9 @@
+#as:
+#objdump: -d -Mglobals
+#name: disass-2.d
+^dump.o:     file format elf32-wasm32$
+
+^Disassembly of section .text:$
+^00000000 <.text>:$
+^   0:	20 00       		get_local 0$
+^   2:	23 00       		get_global 0 <\$got>$
diff --git a/gas/testsuite/gas/wasm32/disass-2.s b/gas/testsuite/gas/wasm32/disass-2.s
new file mode 100644
index 0000000..bed9410
--- /dev/null
+++ b/gas/testsuite/gas/wasm32/disass-2.s
@@ -0,0 +1,3 @@
+        .text
+        get_local 0
+        get_global 0
diff --git a/gas/testsuite/gas/wasm32/disass.d b/gas/testsuite/gas/wasm32/disass.d
new file mode 100644
index 0000000..2708137
--- /dev/null
+++ b/gas/testsuite/gas/wasm32/disass.d
@@ -0,0 +1,9 @@
+#as:
+#objdump: -d -Mregisters,globals
+#name: disass.d
+^dump.o:     file format elf32-wasm32$
+
+^Disassembly of section .text:$
+^00000000 <.text>:$
+^   0:	20 00       		get_local 0 <\$dpc>$
+^   2:	23 00       		get_global 0 <\$got>$
diff --git a/gas/testsuite/gas/wasm32/disass.s b/gas/testsuite/gas/wasm32/disass.s
new file mode 100644
index 0000000..bed9410
--- /dev/null
+++ b/gas/testsuite/gas/wasm32/disass.s
@@ -0,0 +1,3 @@
+        .text
+        get_local 0
+        get_global 0
diff --git a/gas/testsuite/gas/wasm32/reloc.d b/gas/testsuite/gas/wasm32/reloc.d
index 9317e6e..9dc54e7 100644
--- a/gas/testsuite/gas/wasm32/reloc.d
+++ b/gas/testsuite/gas/wasm32/reloc.d
@@ -9,10 +9,11 @@ Disassembly of section .text:
 00000000 <.text>:
    0:	41 80 80 80 		i32.const 0
    4:	80 00 
-			1: R_ASMJS_LEB128_PLT	f
+			1: R_WASM32_PLT_SIG	__sigchar_FiiiiiiiE
+			1: R_WASM32_LEB128_PLT	f
    6:	41 80 80 80 		i32.const 0
    a:	80 00 
-			7: R_ASMJS_LEB128_GOT	x
+			7: R_WASM32_LEB128_GOT	x
    c:	41 80 80 80 		i32.const 0
   10:	80 00 
-			d: R_ASMJS_LEB128_GOT_CODE	f
+			d: R_WASM32_LEB128_GOT_CODE	f
diff --git a/gas/testsuite/gas/wasm32/reloc.s b/gas/testsuite/gas/wasm32/reloc.s
index 8cdfd58..cd34591 100644
--- a/gas/testsuite/gas/wasm32/reloc.s
+++ b/gas/testsuite/gas/wasm32/reloc.s
@@ -1,3 +1,3 @@
-        i32.const f@plt
+        i32.const f@plt{__sigchar_FiiiiiiiE}
         i32.const x@got
         i32.const f@gotcode
diff --git a/gas/testsuite/gas/wasm32/wasm32.exp b/gas/testsuite/gas/wasm32/wasm32.exp
index e6d1819..49c14e4 100644
--- a/gas/testsuite/gas/wasm32/wasm32.exp
+++ b/gas/testsuite/gas/wasm32/wasm32.exp
@@ -21,8 +21,6 @@
 # wasm32 assembler testsuite.
 
 if [istarget wasm32-*-*] {
-    # no disassembler support yet
-    setup_xfail "wasm32-*-*"
     run_dump_test "allinsn"
     # no GOT/PLT relocs yet.
     setup_xfail "wasm32-*-*"
@@ -55,4 +53,6 @@ if [istarget wasm32-*-*] {
     # illegal-23 has become legal
     run_list_test "illegal-24"
     run_list_test "illegal-25"
+    run_dump_test "disass"
+    run_dump_test "disass-2"
 }