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-rw-r--r--opcodes/ChangeLog7
-rw-r--r--opcodes/aarch64-opc.c14
2 files changed, 21 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 8b59032..df76c56 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,12 @@
2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
+ * aarch64-opc.c (aarch64_sys_regs): Add "uao".
+ (aarch64_sys_reg_supported_p): Add comment. Add checks for "uao".
+ (aarch64_pstatefields): Add "uao".
+ (aarch64_pstatefield_supported_p): Add checks for "uao".
+
+2015-12-10 Matthew Wahab <matthew.wahab@arm.com>
+
* aarch64-opc.c (aarch64_sys_regs): Add "vsesr_el2", "erridr_el1",
"errselr_el1", "erxfr_el1", "erxctlr", "erxaddr_el1",
"erxmisc0_el1", "erxmisc1_el1", "disr_el1" and "vdisr_el2".
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 0c1d17d..7477a38 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -2771,6 +2771,7 @@ const aarch64_sys_reg aarch64_sys_regs [] =
{ "daif", CPEN_(3,C2,1), 0 },
{ "currentel", CPEN_(0,C2,2), 0 }, /* RO */
{ "pan", CPEN_(0,C2,3), F_ARCHEXT },
+ { "uao", CPEN_ (0, C2, 4), F_ARCHEXT },
{ "nzcv", CPEN_(3,C2,0), 0 },
{ "fpcr", CPEN_(3,C4,0), 0 },
{ "fpsr", CPEN_(3,C4,1), 0 },
@@ -3169,10 +3170,17 @@ aarch64_sys_reg_supported_p (const aarch64_feature_set features,
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_1))
/* ARMv8.2 features. */
+
+ /* ID_AA64MMFR2_EL1. */
if (reg->value == CPENC (3, 0, C0, C7, 2)
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
return FALSE;
+ /* PSTATE.UAO. */
+ if (reg->value == CPEN_ (0, C2, 4)
+ && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
+ return FALSE;
+
/* RAS extension. */
/* ERRIDR_EL1 and ERRSELR_EL1. */
@@ -3208,6 +3216,7 @@ const aarch64_sys_reg aarch64_pstatefields [] =
{ "daifset", 0x1e, 0 },
{ "daifclr", 0x1f, 0 },
{ "pan", 0x04, F_ARCHEXT },
+ { "uao", 0x03, F_ARCHEXT },
{ 0, CPENC(0,0,0,0,0), 0 },
};
@@ -3223,6 +3232,11 @@ aarch64_pstatefield_supported_p (const aarch64_feature_set features,
&& !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_PAN))
return FALSE;
+ /* UAO. Values are from aarch64_pstatefields. */
+ if (reg->value == 0x03
+ && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_2))
+ return FALSE;
+
return TRUE;
}