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authorVictor Do Nascimento <victor.donascimento@arm.com>2023-11-09 11:19:47 +0000
committerVictor Do Nascimento <victor.donascimento@arm.com>2023-11-09 13:37:33 +0000
commitf11f256f5638679548cd7e1fb189135575cb7b5f (patch)
treed57308d764775f2138ade244b17674c68659c48d /opcodes
parente7d74879870833fb0c42282da940e60fee13948e (diff)
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aarch64: Fix error in THE system register checking
The erroneous omission of a "reg_value == " in the THE system register encoding check added in [1] led to an error which was not picked up in GCC but which was flagged in Clang due to its use of [-Werror,-Wconstant-logical-operand] check. Together with this fix we add a new test for the THE registers to pick up their illegal use, adding an extra and important layer of validation. Furthermore, in separating system register from instruction implementation (with which only the former was of concern in the cited patch), additions made to `aarch64-tbl.h' are rolled back so that these can be added later when adding THE instructions to the codebase, a more natural place for these changes. [1] https://sourceware.org/pipermail/binutils/2023-November/130314.html opcodes/ChangeLog: * aarch64-opc.c (aarch64_sys_ins_reg_supported_p): Fix typo. * aarch64-tbl.h (THE): Remove. (aarch64_feature_set aarch64_feature_the): Likewise. gas/ChangeLog: * testsuite/gas/aarch64/illegal-sysreg-8.l: Add tests for THE system registers. * testsuite/gas/aarch64/illegal-sysreg-8.s: Likewise.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/aarch64-opc.c2
-rw-r--r--opcodes/aarch64-tbl.h3
2 files changed, 1 insertions, 4 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 5a0f0e9..f8d4c1a 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -5037,7 +5037,7 @@ aarch64_sys_ins_reg_supported_p (const aarch64_feature_set features,
return true;
if ((reg_value == CPENC (3,0,13,0,3)
- || CPENC (3,0,13,0,6))
+ || reg_value == CPENC (3,0,13,0,6))
&& AARCH64_CPU_HAS_FEATURE (features, THE))
return true;
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index feea209..74fd669 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2578,8 +2578,6 @@ static const aarch64_feature_set aarch64_feature_chk =
AARCH64_FEATURE (CHK);
static const aarch64_feature_set aarch64_feature_gcs =
AARCH64_FEATURE (GCS);
-static const aarch64_feature_set aarch64_feature_the =
- AARCH64_FEATURE (THE);
#define CORE &aarch64_feature_v8
#define FP &aarch64_feature_fp
@@ -2641,7 +2639,6 @@ static const aarch64_feature_set aarch64_feature_the =
#define CSSC &aarch64_feature_cssc
#define CHK &aarch64_feature_chk
#define GCS &aarch64_feature_gcs
-#define THE &aarch64_feature_the
#define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
{ NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL }