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authorJiong Wang <jiong.wang@arm.com>2014-09-03 14:40:41 +0100
committerJiong Wang <jiong.wang@arm.com>2014-09-03 14:53:53 +0100
commitee804238f097e91088a340c15891170f2748b4fd (patch)
tree22d92253b206d824681e73039fe861f8d20ec8df /opcodes
parent97ea6506c45ab5519483a0221fdc049038496492 (diff)
downloadgdb-ee804238f097e91088a340c15891170f2748b4fd.zip
gdb-ee804238f097e91088a340c15891170f2748b4fd.tar.gz
gdb-ee804238f097e91088a340c15891170f2748b4fd.tar.bz2
[PATCH/AArch64] Implement LSE feature
2014-09-03 Jiong Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.c (parse_operands): Recognize PAIRREG. (aarch64_features): Add entry for lse extension. include/opcode/ * aarch64.h (AARCH64_FEATURE_LSE): New feature added. (aarch64_opnd): Add AARCH64_OPND_PAIRREG. (aarch64_insn_class): Add lse_atomic. (F_LSE_SZ): New field added. (opcode_has_special_coder): Recognize F_LSE_SZ. opcode/ * aarch64-tbl.h (QL_R4NIL): New qualifiers. (aarch64_feature_lse): New feature added. (LSE): New Added. (aarch64_opcode_table): New LSE instructions added. Improve descriptions for ldarb/ldarh/ldar. (aarch64_opcode_table): Describe PAIRREG. * aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz. * aarch64-opc.c (fields): Add entry for F_LSE_SZ. (aarch64_print_operand): Recognize PAIRREG. (operand_general_constraint_met_p): Check reg pair constraints for CASP instructions. * aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg. (do_special_decoding): Recognize F_LSE_SZ. * aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ. gas/testsuite/ * gas/aarch64/lse-atomic.d: New. * gas/aarch64/lse-atomic.s: Likewise. * gas/aarch64/illegal-lse.d: Likewise. * gas/aarch64/illegal-lse.l: Likewise. * gas/aarch64/illegal-lse.s: Likewise. * gas/aarch64/diagnostic.s: Check processor feature detect for lse instruction. * gas/aarch64/diagnostic.l: Likewise.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog17
-rw-r--r--opcodes/aarch64-asm-2.c246
-rw-r--r--opcodes/aarch64-asm.c8
-rw-r--r--opcodes/aarch64-dis-2.c1742
-rw-r--r--opcodes/aarch64-dis.c18
-rw-r--r--opcodes/aarch64-dis.h1
-rw-r--r--opcodes/aarch64-opc-2.c11
-rw-r--r--opcodes/aarch64-opc.c21
-rw-r--r--opcodes/aarch64-opc.h1
-rw-r--r--opcodes/aarch64-tbl.h191
10 files changed, 2033 insertions, 223 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ca42dc9..a0b4e19 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,20 @@
+2014-09-03 Jiong Wang <jiong.wang@arm.com>
+
+ * aarch64-tbl.h (QL_R4NIL): New qualifiers.
+ (aarch64_feature_lse): New feature added.
+ (LSE): New Added.
+ (aarch64_opcode_table): New LSE instructions added. Improve
+ descriptions for ldarb/ldarh/ldar.
+ (aarch64_opcode_table): Describe PAIRREG.
+ * aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz.
+ * aarch64-opc.c (fields): Add entry for F_LSE_SZ.
+ (aarch64_print_operand): Recognize PAIRREG.
+ (operand_general_constraint_met_p): Check reg pair constraints for CASP
+ instructions.
+ * aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg.
+ (do_special_decoding): Recognize F_LSE_SZ.
+ * aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ.
+
2014-08-26 Maciej W. Rozycki <macro@codesourcery.com>
* micromips-opc.c (decode_micromips_operand): Rename `B' to `+J'.
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index aa3343f..b5cf12c 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -210,25 +210,169 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 774: /* tst */
value = 773; /* --> ands. */
break;
- case 777: /* mov */
- value = 776; /* --> movn. */
- break;
- case 779: /* mov */
- value = 778; /* --> movz. */
- break;
- case 790: /* sevl */
- case 789: /* sev */
- case 788: /* wfi */
- case 787: /* wfe */
- case 786: /* yield */
- case 785: /* nop */
- value = 784; /* --> hint. */
- break;
- case 799: /* tlbi */
- case 798: /* ic */
- case 797: /* dc */
- case 796: /* at */
- value = 795; /* --> sys. */
+ case 900: /* staddb */
+ value = 804; /* --> ldaddb. */
+ break;
+ case 901: /* staddh */
+ value = 805; /* --> ldaddh. */
+ break;
+ case 902: /* stadd */
+ value = 806; /* --> ldadd. */
+ break;
+ case 903: /* staddlb */
+ value = 808; /* --> ldaddlb. */
+ break;
+ case 904: /* staddlh */
+ value = 811; /* --> ldaddlh. */
+ break;
+ case 905: /* staddl */
+ value = 814; /* --> ldaddl. */
+ break;
+ case 906: /* stclrb */
+ value = 816; /* --> ldclrb. */
+ break;
+ case 907: /* stclrh */
+ value = 817; /* --> ldclrh. */
+ break;
+ case 908: /* stclr */
+ value = 818; /* --> ldclr. */
+ break;
+ case 909: /* stclrlb */
+ value = 820; /* --> ldclrlb. */
+ break;
+ case 910: /* stclrlh */
+ value = 823; /* --> ldclrlh. */
+ break;
+ case 911: /* stclrl */
+ value = 826; /* --> ldclrl. */
+ break;
+ case 912: /* steorb */
+ value = 828; /* --> ldeorb. */
+ break;
+ case 913: /* steorh */
+ value = 829; /* --> ldeorh. */
+ break;
+ case 914: /* steor */
+ value = 830; /* --> ldeor. */
+ break;
+ case 915: /* steorlb */
+ value = 832; /* --> ldeorlb. */
+ break;
+ case 916: /* steorlh */
+ value = 835; /* --> ldeorlh. */
+ break;
+ case 917: /* steorl */
+ value = 838; /* --> ldeorl. */
+ break;
+ case 918: /* stsetb */
+ value = 840; /* --> ldsetb. */
+ break;
+ case 919: /* stseth */
+ value = 841; /* --> ldseth. */
+ break;
+ case 920: /* stset */
+ value = 842; /* --> ldset. */
+ break;
+ case 921: /* stsetlb */
+ value = 844; /* --> ldsetlb. */
+ break;
+ case 922: /* stsetlh */
+ value = 847; /* --> ldsetlh. */
+ break;
+ case 923: /* stsetl */
+ value = 850; /* --> ldsetl. */
+ break;
+ case 924: /* stsmaxb */
+ value = 852; /* --> ldsmaxb. */
+ break;
+ case 925: /* stsmaxh */
+ value = 853; /* --> ldsmaxh. */
+ break;
+ case 926: /* stsmax */
+ value = 854; /* --> ldsmax. */
+ break;
+ case 927: /* stsmaxlb */
+ value = 856; /* --> ldsmaxlb. */
+ break;
+ case 928: /* stsmaxlh */
+ value = 859; /* --> ldsmaxlh. */
+ break;
+ case 929: /* stsmaxl */
+ value = 862; /* --> ldsmaxl. */
+ break;
+ case 930: /* stsminb */
+ value = 864; /* --> ldsminb. */
+ break;
+ case 931: /* stsminh */
+ value = 865; /* --> ldsminh. */
+ break;
+ case 932: /* stsmin */
+ value = 866; /* --> ldsmin. */
+ break;
+ case 933: /* stsminlb */
+ value = 868; /* --> ldsminlb. */
+ break;
+ case 934: /* stsminlh */
+ value = 871; /* --> ldsminlh. */
+ break;
+ case 935: /* stsminl */
+ value = 874; /* --> ldsminl. */
+ break;
+ case 936: /* stumaxb */
+ value = 876; /* --> ldumaxb. */
+ break;
+ case 937: /* stumaxh */
+ value = 877; /* --> ldumaxh. */
+ break;
+ case 938: /* stumax */
+ value = 878; /* --> ldumax. */
+ break;
+ case 939: /* stumaxlb */
+ value = 880; /* --> ldumaxlb. */
+ break;
+ case 940: /* stumaxlh */
+ value = 883; /* --> ldumaxlh. */
+ break;
+ case 941: /* stumaxl */
+ value = 886; /* --> ldumaxl. */
+ break;
+ case 942: /* stuminb */
+ value = 888; /* --> lduminb. */
+ break;
+ case 943: /* stuminh */
+ value = 889; /* --> lduminh. */
+ break;
+ case 944: /* stumin */
+ value = 890; /* --> ldumin. */
+ break;
+ case 945: /* stuminlb */
+ value = 892; /* --> lduminlb. */
+ break;
+ case 946: /* stuminlh */
+ value = 895; /* --> lduminlh. */
+ break;
+ case 947: /* stuminl */
+ value = 898; /* --> lduminl. */
+ break;
+ case 949: /* mov */
+ value = 948; /* --> movn. */
+ break;
+ case 951: /* mov */
+ value = 950; /* --> movz. */
+ break;
+ case 962: /* sevl */
+ case 961: /* sev */
+ case 960: /* wfi */
+ case 959: /* wfe */
+ case 958: /* yield */
+ case 957: /* nop */
+ value = 956; /* --> hint. */
+ break;
+ case 971: /* tlbi */
+ case 970: /* ic */
+ case 969: /* dc */
+ case 968: /* at */
+ value = 967; /* --> sys. */
break;
default: return NULL;
}
@@ -255,11 +399,10 @@ aarch64_insert_operand (const aarch64_operand *self,
case 8:
case 9:
case 10:
- case 13:
case 14:
case 15:
case 16:
- case 18:
+ case 17:
case 19:
case 20:
case 21:
@@ -268,29 +411,29 @@ aarch64_insert_operand (const aarch64_operand *self,
case 24:
case 25:
case 26:
- case 34:
+ case 27:
case 35:
+ case 36:
return aarch64_ins_regno (self, info, code, inst);
- case 11:
- return aarch64_ins_reg_extended (self, info, code, inst);
case 12:
+ return aarch64_ins_reg_extended (self, info, code, inst);
+ case 13:
return aarch64_ins_reg_shifted (self, info, code, inst);
- case 17:
+ case 18:
return aarch64_ins_ft (self, info, code, inst);
- case 27:
case 28:
case 29:
- return aarch64_ins_reglane (self, info, code, inst);
case 30:
- return aarch64_ins_reglist (self, info, code, inst);
+ return aarch64_ins_reglane (self, info, code, inst);
case 31:
- return aarch64_ins_ldst_reglist (self, info, code, inst);
+ return aarch64_ins_reglist (self, info, code, inst);
case 32:
- return aarch64_ins_ldst_reglist_r (self, info, code, inst);
+ return aarch64_ins_ldst_reglist (self, info, code, inst);
case 33:
+ return aarch64_ins_ldst_reglist_r (self, info, code, inst);
+ case 34:
return aarch64_ins_ldst_elemlist (self, info, code, inst);
- case 36:
- case 45:
+ case 37:
case 46:
case 47:
case 48:
@@ -303,55 +446,56 @@ aarch64_insert_operand (const aarch64_operand *self,
case 55:
case 56:
case 57:
- case 66:
+ case 58:
case 67:
case 68:
case 69:
+ case 70:
return aarch64_ins_imm (self, info, code, inst);
- case 37:
case 38:
- return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
case 39:
+ return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
case 40:
case 41:
+ case 42:
return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
- case 58:
- return aarch64_ins_limm (self, info, code, inst);
case 59:
- return aarch64_ins_aimm (self, info, code, inst);
+ return aarch64_ins_limm (self, info, code, inst);
case 60:
- return aarch64_ins_imm_half (self, info, code, inst);
+ return aarch64_ins_aimm (self, info, code, inst);
case 61:
+ return aarch64_ins_imm_half (self, info, code, inst);
+ case 62:
return aarch64_ins_fbits (self, info, code, inst);
- case 63:
case 64:
+ case 65:
return aarch64_ins_cond (self, info, code, inst);
- case 70:
- case 76:
- return aarch64_ins_addr_simple (self, info, code, inst);
case 71:
- return aarch64_ins_addr_regoff (self, info, code, inst);
+ case 77:
+ return aarch64_ins_addr_simple (self, info, code, inst);
case 72:
+ return aarch64_ins_addr_regoff (self, info, code, inst);
case 73:
case 74:
- return aarch64_ins_addr_simm (self, info, code, inst);
case 75:
+ return aarch64_ins_addr_simm (self, info, code, inst);
+ case 76:
return aarch64_ins_addr_uimm12 (self, info, code, inst);
- case 77:
- return aarch64_ins_simd_addr_post (self, info, code, inst);
case 78:
- return aarch64_ins_sysreg (self, info, code, inst);
+ return aarch64_ins_simd_addr_post (self, info, code, inst);
case 79:
- return aarch64_ins_pstatefield (self, info, code, inst);
+ return aarch64_ins_sysreg (self, info, code, inst);
case 80:
+ return aarch64_ins_pstatefield (self, info, code, inst);
case 81:
case 82:
case 83:
- return aarch64_ins_sysins_op (self, info, code, inst);
case 84:
+ return aarch64_ins_sysins_op (self, info, code, inst);
case 85:
- return aarch64_ins_barrier (self, info, code, inst);
case 86:
+ return aarch64_ins_barrier (self, info, code, inst);
+ case 87:
return aarch64_ins_prfop (self, info, code, inst);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 5b5790f..d28d955 100644
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -856,6 +856,14 @@ do_special_encoding (struct aarch64_inst *inst)
if (inst->opcode->flags & F_N)
insert_field (FLD_N, &inst->value, value, inst->opcode->mask);
}
+ if (inst->opcode->flags & F_LSE_SZ)
+ {
+ idx = select_operand_for_sf_field_coding (inst->opcode);
+ value = (inst->operands[idx].qualifier == AARCH64_OPND_QLF_X
+ || inst->operands[idx].qualifier == AARCH64_OPND_QLF_SP)
+ ? 1 : 0;
+ insert_field (FLD_lse_sz, &inst->value, value, 0);
+ }
if (inst->opcode->flags & F_SIZEQ)
encode_sizeq (inst);
if (inst->opcode->flags & F_FPTYPE)
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 06a84ab..a0f1a38 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -40,7 +40,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxxxxxxx0000xxx0
adr. */
- return 781;
+ return 953;
}
else
{
@@ -48,7 +48,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxxxxxxx0000xxx1
adrp. */
- return 782;
+ return 954;
}
}
else
@@ -137,11 +137,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxxxxxxx0xxxxx100x00100xx
- stxp. */
- return 731;
+ if (((word >> 31) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx0xxxxx100x00100x0
+ casp. */
+ return 788;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx0xxxxx100x00100x1
+ stxp. */
+ return 731;
+ }
}
}
else
@@ -178,11 +189,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxxxxxxx1xxxxx100x00100xx
- stlxp. */
- return 732;
+ if (((word >> 31) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx100x00100x0
+ caspl. */
+ return 790;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx100x00100x1
+ stlxp. */
+ return 732;
+ }
}
}
}
@@ -199,32 +221,98 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 29) & 0x1) == 0)
{
- if (((word >> 31) & 0x1) == 0)
+ if (((word >> 15) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
+ if (((word >> 31) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxxxxxxxxxxxxxx01x0010000
- stlrb. */
- return 721;
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx0xxxxxx01x0010000
+ casb. */
+ return 776;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx0xxxxxx01x0010010
+ cash. */
+ return 777;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxxxxxxxxxxxxxxxxxxxxx01x0010010
- stlrh. */
- return 727;
+ xxxxxxxxxxxxxxx0xxxxxx01x00100x1
+ cas. */
+ return 778;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxxxxxxxxxxxxxx01x00100x1
- stlr. */
- return 737;
+ if (((word >> 21) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx001x0010000
+ stlrb. */
+ return 721;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx001x0010010
+ stlrh. */
+ return 727;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx001x00100x1
+ stlr. */
+ return 737;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx101x0010000
+ caslb. */
+ return 780;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx101x0010010
+ caslh. */
+ return 783;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx101x00100x1
+ casl. */
+ return 786;
+ }
+ }
}
}
else
@@ -277,11 +365,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxxxxxxx0xxxxx110x00100xx
- ldxp. */
- return 735;
+ if (((word >> 31) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx0xxxxx110x00100x0
+ caspa. */
+ return 789;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx0xxxxx110x00100x1
+ ldxp. */
+ return 735;
+ }
}
}
else
@@ -318,11 +417,22 @@ aarch64_opcode_lookup_1 (uint32_t word)
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxxxxxxx1xxxxx110x00100xx
- ldaxp. */
- return 736;
+ if (((word >> 31) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx110x00100x0
+ caspal. */
+ return 791;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx110x00100x1
+ ldaxp. */
+ return 736;
+ }
}
}
}
@@ -350,32 +460,98 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 29) & 0x1) == 0)
{
- if (((word >> 31) & 0x1) == 0)
+ if (((word >> 15) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
+ if (((word >> 31) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxxxxxxxxxxxxxx11x0010000
- ldarb. */
- return 722;
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx0xxxxxx11x0010000
+ casab. */
+ return 779;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx0xxxxxx11x0010010
+ casah. */
+ return 782;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxxxxxxxxxxxxxxxxxxxxx11x0010010
- ldarh. */
- return 728;
+ xxxxxxxxxxxxxxx0xxxxxx11x00100x1
+ casa. */
+ return 785;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxxxxxxxxxxxxxx11x00100x1
- ldar. */
- return 738;
+ if (((word >> 21) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx011x0010000
+ ldarb. */
+ return 722;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx011x0010010
+ ldarh. */
+ return 728;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx011x00100x1
+ ldar. */
+ return 738;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx111x0010000
+ casalb. */
+ return 781;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx111x0010010
+ casalh. */
+ return 784;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxxxxxxx1xxxxx111x00100x1
+ casal. */
+ return 787;
+ }
+ }
}
}
else
@@ -440,107 +616,1295 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 11) & 0x1) == 0)
{
- if (((word >> 23) & 0x1) == 0)
+ if (((word >> 21) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 23) & 0x1) == 0)
{
- if (((word >> 31) & 0x1) == 0)
+ if (((word >> 22) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
+ if (((word >> 31) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxx00xxxxxxxxxx0000011100
- sturb. */
- return 693;
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00xxxxxxxxx00000011100
+ sturb. */
+ return 693;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00xxxxxxxxx00000011110
+ sturh. */
+ return 703;
+ }
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxxxxxxxxx00xxxxxxxxxx0000011110
- sturh. */
- return 703;
+ xxxxxxxxxx00xxxxxxxxx000000111x1
+ stur. */
+ return 709;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxx00xxxxxxxxxx00000111x1
- stur. */
- return 709;
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00xxxxxxxxx01000011100
+ ldurb. */
+ return 694;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00xxxxxxxxx01000011110
+ ldurh. */
+ return 704;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00xxxxxxxxx010000111x1
+ ldur. */
+ return 710;
+ }
}
}
else
{
- if (((word >> 31) & 0x1) == 0)
+ if (((word >> 30) & 0x1) == 0)
{
- if (((word >> 30) & 0x1) == 0)
+ if (((word >> 31) & 0x1) == 0)
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxxxxxxxxx00xxxxxxxxxx1000011100
- ldurb. */
- return 694;
+ xxxxxxxxxx00xxxxxxxxx0x100011100
+ ldursb. */
+ return 697;
}
else
{
/* 33222222222211111111110000000000
10987654321098765432109876543210
- xxxxxxxxxx00xxxxxxxxxx1000011110
- ldurh. */
- return 704;
+ xxxxxxxxxx00xxxxxxxxx0x100011101
+ ldursw. */
+ return 713;
}
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxx00xxxxxxxxxx10000111x1
- ldur. */
- return 710;
+ if (((word >> 31) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00xxxxxxxxx0x100011110
+ ldursh. */
+ return 707;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00xxxxxxxxx0x100011111
+ prfum. */
+ return 715;
+ }
}
}
}
else
{
- if (((word >> 30) & 0x1) == 0)
+ if (((word >> 12) & 0x1) == 0)
{
- if (((word >> 31) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxx00xxxxxxxxxxx100011100
- ldursb. */
- return 697;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 15) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx10000011100
+ ldaddb. */
+ return 804;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx10000011110
+ ldaddh. */
+ return 805;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx100000111x1
+ ldadd. */
+ return 806;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx10100011100
+ ldaddab. */
+ return 807;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx10100011110
+ ldaddah. */
+ return 810;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx101000111x1
+ ldadda. */
+ return 813;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx11000011100
+ ldaddlb. */
+ return 808;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx11000011110
+ ldaddlh. */
+ return 811;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx110000111x1
+ ldaddl. */
+ return 814;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx11100011100
+ ldaddalb. */
+ return 809;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx11100011110
+ ldaddalh. */
+ return 812;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000000xxxxx111000111x1
+ ldaddal. */
+ return 815;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx10000011100
+ swpb. */
+ return 792;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx10000011110
+ swph. */
+ return 793;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx100000111x1
+ swp. */
+ return 794;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx10100011100
+ swpab. */
+ return 795;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx10100011110
+ swpah. */
+ return 798;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx101000111x1
+ swpa. */
+ return 801;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx11000011100
+ swplb. */
+ return 796;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx11000011110
+ swplh. */
+ return 799;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx110000111x1
+ swpl. */
+ return 802;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx11100011100
+ swpalb. */
+ return 797;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx11100011110
+ swpalh. */
+ return 800;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx000001xxxxx111000111x1
+ swpal. */
+ return 803;
+ }
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx10000011100
+ ldsmaxb. */
+ return 852;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx10000011110
+ ldsmaxh. */
+ return 853;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx100000111x1
+ ldsmax. */
+ return 854;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx10100011100
+ ldsmaxab. */
+ return 855;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx10100011110
+ ldsmaxah. */
+ return 858;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx101000111x1
+ ldsmaxa. */
+ return 861;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx11000011100
+ ldsmaxlb. */
+ return 856;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx11000011110
+ ldsmaxlh. */
+ return 859;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx110000111x1
+ ldsmaxl. */
+ return 862;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx11100011100
+ ldsmaxalb. */
+ return 857;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx11100011110
+ ldsmaxalh. */
+ return 860;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00001xxxxxx111000111x1
+ ldsmaxal. */
+ return 863;
+ }
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxx00xxxxxxxxxxx100011101
- ldursw. */
- return 713;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx10000011100
+ ldeorb. */
+ return 828;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx10000011110
+ ldeorh. */
+ return 829;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx100000111x1
+ ldeor. */
+ return 830;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx10100011100
+ ldeorab. */
+ return 831;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx10100011110
+ ldeorah. */
+ return 834;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx101000111x1
+ ldeora. */
+ return 837;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx11000011100
+ ldeorlb. */
+ return 832;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx11000011110
+ ldeorlh. */
+ return 835;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx110000111x1
+ ldeorl. */
+ return 838;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx11100011100
+ ldeoralb. */
+ return 833;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx11100011110
+ ldeoralh. */
+ return 836;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00010xxxxxx111000111x1
+ ldeoral. */
+ return 839;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx10000011100
+ ldumaxb. */
+ return 876;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx10000011110
+ ldumaxh. */
+ return 877;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx100000111x1
+ ldumax. */
+ return 878;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx10100011100
+ ldumaxab. */
+ return 879;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx10100011110
+ ldumaxah. */
+ return 882;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx101000111x1
+ ldumaxa. */
+ return 885;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx11000011100
+ ldumaxlb. */
+ return 880;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx11000011110
+ ldumaxlh. */
+ return 883;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx110000111x1
+ ldumaxl. */
+ return 886;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx11100011100
+ ldumaxalb. */
+ return 881;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx11100011110
+ ldumaxalh. */
+ return 884;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00011xxxxxx111000111x1
+ ldumaxal. */
+ return 887;
+ }
+ }
+ }
+ }
}
}
else
{
- if (((word >> 31) & 0x1) == 0)
+ if (((word >> 13) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxx00xxxxxxxxxxx100011110
- ldursh. */
- return 707;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx10000011100
+ ldclrb. */
+ return 816;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx10000011110
+ ldclrh. */
+ return 817;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx100000111x1
+ ldclr. */
+ return 818;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx10100011100
+ ldclrab. */
+ return 819;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx10100011110
+ ldclrah. */
+ return 822;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx101000111x1
+ ldclra. */
+ return 825;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx11000011100
+ ldclrlb. */
+ return 820;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx11000011110
+ ldclrlh. */
+ return 823;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx110000111x1
+ ldclrl. */
+ return 826;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx11100011100
+ ldclralb. */
+ return 821;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx11100011110
+ ldclralh. */
+ return 824;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00100xxxxxx111000111x1
+ ldclral. */
+ return 827;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx10000011100
+ ldsminb. */
+ return 864;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx10000011110
+ ldsminh. */
+ return 865;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx100000111x1
+ ldsmin. */
+ return 866;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx10100011100
+ ldsminab. */
+ return 867;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx10100011110
+ ldsminah. */
+ return 870;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx101000111x1
+ ldsmina. */
+ return 873;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx11000011100
+ ldsminlb. */
+ return 868;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx11000011110
+ ldsminlh. */
+ return 871;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx110000111x1
+ ldsminl. */
+ return 874;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx11100011100
+ ldsminalb. */
+ return 869;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx11100011110
+ ldsminalh. */
+ return 872;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00101xxxxxx111000111x1
+ ldsminal. */
+ return 875;
+ }
+ }
+ }
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- xxxxxxxxxx00xxxxxxxxxxx100011111
- prfum. */
- return 715;
+ if (((word >> 14) & 0x1) == 0)
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx10000011100
+ ldsetb. */
+ return 840;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx10000011110
+ ldseth. */
+ return 841;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx100000111x1
+ ldset. */
+ return 842;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx10100011100
+ ldsetab. */
+ return 843;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx10100011110
+ ldsetah. */
+ return 846;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx101000111x1
+ ldseta. */
+ return 849;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx11000011100
+ ldsetlb. */
+ return 844;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx11000011110
+ ldsetlh. */
+ return 847;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx110000111x1
+ ldsetl. */
+ return 850;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx11100011100
+ ldsetalb. */
+ return 845;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx11100011110
+ ldsetalh. */
+ return 848;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00110xxxxxx111000111x1
+ ldsetal. */
+ return 851;
+ }
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 22) & 0x1) == 0)
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx10000011100
+ lduminb. */
+ return 888;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx10000011110
+ lduminh. */
+ return 889;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx100000111x1
+ ldumin. */
+ return 890;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx10100011100
+ lduminab. */
+ return 891;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx10100011110
+ lduminah. */
+ return 894;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx101000111x1
+ ldumina. */
+ return 897;
+ }
+ }
+ }
+ else
+ {
+ if (((word >> 23) & 0x1) == 0)
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx11000011100
+ lduminlb. */
+ return 892;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx11000011110
+ lduminlh. */
+ return 895;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx110000111x1
+ lduminl. */
+ return 898;
+ }
+ }
+ else
+ {
+ if (((word >> 31) & 0x1) == 0)
+ {
+ if (((word >> 30) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx11100011100
+ lduminalb. */
+ return 893;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx11100011110
+ lduminalh. */
+ return 896;
+ }
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ xxxxxxxxxx00111xxxxxx111000111x1
+ lduminal. */
+ return 899;
+ }
+ }
+ }
+ }
}
}
}
@@ -1017,7 +2381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxxxxxx10100x00x
movn. */
- return 776;
+ return 948;
}
else
{
@@ -1025,7 +2389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxxxxxx10100x01x
movz. */
- return 778;
+ return 950;
}
}
else
@@ -1034,7 +2398,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxxxxxx10100x1xx
movk. */
- return 780;
+ return 952;
}
}
}
@@ -1898,7 +3262,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxx00xxxxx00xxx1x10x01x
msr. */
- return 783;
+ return 955;
}
else
{
@@ -1906,7 +3270,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxx01xxxxx00xxx1x10x01x
hint. */
- return 784;
+ return 956;
}
}
else
@@ -1919,7 +3283,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxx00xxxxx1xxxxxx00xxx1x10x01x
dsb. */
- return 792;
+ return 964;
}
else
{
@@ -1929,7 +3293,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxx010xxxx1xxxxxx00xxx1x10x01x
clrex. */
- return 791;
+ return 963;
}
else
{
@@ -1937,7 +3301,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxx011xxxx1xxxxxx00xxx1x10x01x
isb. */
- return 794;
+ return 966;
}
}
}
@@ -1947,7 +3311,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxx1xxxxxx1xxxxxx00xxx1x10x01x
dmb. */
- return 793;
+ return 965;
}
}
}
@@ -1959,7 +3323,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxx100xx1x10x01x
sys. */
- return 795;
+ return 967;
}
else
{
@@ -1967,7 +3331,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxx101xx1x10x01x
sysl. */
- return 801;
+ return 973;
}
}
}
@@ -1979,7 +3343,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxxx10xx1x10x01x
msr. */
- return 800;
+ return 972;
}
else
{
@@ -1987,7 +3351,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxxx11xx1x10x01x
mrs. */
- return 802;
+ return 974;
}
}
}
@@ -2011,7 +3375,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxxxxxxx0110x1xx
tbz. */
- return 803;
+ return 975;
}
}
else
@@ -2030,7 +3394,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxxxxxxxxxxxxxxxxxxxxxxx1110x1xx
tbnz. */
- return 804;
+ return 976;
}
}
}
@@ -7575,10 +8939,58 @@ aarch64_find_alias_opcode (const aarch64_opcode *opcode)
case 766: value = 768; break; /* orr --> uxtw. */
case 769: value = 770; break; /* orn --> mvn. */
case 773: value = 774; break; /* ands --> tst. */
- case 776: value = 777; break; /* movn --> mov. */
- case 778: value = 779; break; /* movz --> mov. */
- case 784: value = 790; break; /* hint --> sevl. */
- case 795: value = 799; break; /* sys --> tlbi. */
+ case 804: value = 900; break; /* ldaddb --> staddb. */
+ case 805: value = 901; break; /* ldaddh --> staddh. */
+ case 806: value = 902; break; /* ldadd --> stadd. */
+ case 808: value = 903; break; /* ldaddlb --> staddlb. */
+ case 811: value = 904; break; /* ldaddlh --> staddlh. */
+ case 814: value = 905; break; /* ldaddl --> staddl. */
+ case 816: value = 906; break; /* ldclrb --> stclrb. */
+ case 817: value = 907; break; /* ldclrh --> stclrh. */
+ case 818: value = 908; break; /* ldclr --> stclr. */
+ case 820: value = 909; break; /* ldclrlb --> stclrlb. */
+ case 823: value = 910; break; /* ldclrlh --> stclrlh. */
+ case 826: value = 911; break; /* ldclrl --> stclrl. */
+ case 828: value = 912; break; /* ldeorb --> steorb. */
+ case 829: value = 913; break; /* ldeorh --> steorh. */
+ case 830: value = 914; break; /* ldeor --> steor. */
+ case 832: value = 915; break; /* ldeorlb --> steorlb. */
+ case 835: value = 916; break; /* ldeorlh --> steorlh. */
+ case 838: value = 917; break; /* ldeorl --> steorl. */
+ case 840: value = 918; break; /* ldsetb --> stsetb. */
+ case 841: value = 919; break; /* ldseth --> stseth. */
+ case 842: value = 920; break; /* ldset --> stset. */
+ case 844: value = 921; break; /* ldsetlb --> stsetlb. */
+ case 847: value = 922; break; /* ldsetlh --> stsetlh. */
+ case 850: value = 923; break; /* ldsetl --> stsetl. */
+ case 852: value = 924; break; /* ldsmaxb --> stsmaxb. */
+ case 853: value = 925; break; /* ldsmaxh --> stsmaxh. */
+ case 854: value = 926; break; /* ldsmax --> stsmax. */
+ case 856: value = 927; break; /* ldsmaxlb --> stsmaxlb. */
+ case 859: value = 928; break; /* ldsmaxlh --> stsmaxlh. */
+ case 862: value = 929; break; /* ldsmaxl --> stsmaxl. */
+ case 864: value = 930; break; /* ldsminb --> stsminb. */
+ case 865: value = 931; break; /* ldsminh --> stsminh. */
+ case 866: value = 932; break; /* ldsmin --> stsmin. */
+ case 868: value = 933; break; /* ldsminlb --> stsminlb. */
+ case 871: value = 934; break; /* ldsminlh --> stsminlh. */
+ case 874: value = 935; break; /* ldsminl --> stsminl. */
+ case 876: value = 936; break; /* ldumaxb --> stumaxb. */
+ case 877: value = 937; break; /* ldumaxh --> stumaxh. */
+ case 878: value = 938; break; /* ldumax --> stumax. */
+ case 880: value = 939; break; /* ldumaxlb --> stumaxlb. */
+ case 883: value = 940; break; /* ldumaxlh --> stumaxlh. */
+ case 886: value = 941; break; /* ldumaxl --> stumaxl. */
+ case 888: value = 942; break; /* lduminb --> stuminb. */
+ case 889: value = 943; break; /* lduminh --> stuminh. */
+ case 890: value = 944; break; /* ldumin --> stumin. */
+ case 892: value = 945; break; /* lduminlb --> stuminlb. */
+ case 895: value = 946; break; /* lduminlh --> stuminlh. */
+ case 898: value = 947; break; /* lduminl --> stuminl. */
+ case 948: value = 949; break; /* movn --> mov. */
+ case 950: value = 951; break; /* movz --> mov. */
+ case 956: value = 962; break; /* hint --> sevl. */
+ case 967: value = 971; break; /* sys --> tlbi. */
default: return NULL;
}
@@ -7608,14 +9020,14 @@ aarch64_find_next_alias_opcode (const aarch64_opcode *opcode)
case 527: value = 526; break; /* cset --> cinc. */
case 530: value = 529; break; /* csetm --> cinv. */
case 768: value = 767; break; /* uxtw --> mov. */
- case 790: value = 789; break; /* sevl --> sev. */
- case 789: value = 788; break; /* sev --> wfi. */
- case 788: value = 787; break; /* wfi --> wfe. */
- case 787: value = 786; break; /* wfe --> yield. */
- case 786: value = 785; break; /* yield --> nop. */
- case 799: value = 798; break; /* tlbi --> ic. */
- case 798: value = 797; break; /* ic --> dc. */
- case 797: value = 796; break; /* dc --> at. */
+ case 962: value = 961; break; /* sevl --> sev. */
+ case 961: value = 960; break; /* sev --> wfi. */
+ case 960: value = 959; break; /* wfi --> wfe. */
+ case 959: value = 958; break; /* wfe --> yield. */
+ case 958: value = 957; break; /* yield --> nop. */
+ case 971: value = 970; break; /* tlbi --> ic. */
+ case 970: value = 969; break; /* ic --> dc. */
+ case 969: value = 968; break; /* dc --> at. */
default: return NULL;
}
@@ -7640,11 +9052,10 @@ aarch64_extract_operand (const aarch64_operand *self,
case 7:
case 9:
case 10:
- case 13:
case 14:
case 15:
case 16:
- case 18:
+ case 17:
case 19:
case 20:
case 21:
@@ -7653,31 +9064,33 @@ aarch64_extract_operand (const aarch64_operand *self,
case 24:
case 25:
case 26:
- case 34:
+ case 27:
case 35:
+ case 36:
return aarch64_ext_regno (self, info, code, inst);
case 8:
return aarch64_ext_regrt_sysins (self, info, code, inst);
case 11:
- return aarch64_ext_reg_extended (self, info, code, inst);
+ return aarch64_ext_regno_pair (self, info, code, inst);
case 12:
+ return aarch64_ext_reg_extended (self, info, code, inst);
+ case 13:
return aarch64_ext_reg_shifted (self, info, code, inst);
- case 17:
+ case 18:
return aarch64_ext_ft (self, info, code, inst);
- case 27:
case 28:
case 29:
- return aarch64_ext_reglane (self, info, code, inst);
case 30:
- return aarch64_ext_reglist (self, info, code, inst);
+ return aarch64_ext_reglane (self, info, code, inst);
case 31:
- return aarch64_ext_ldst_reglist (self, info, code, inst);
+ return aarch64_ext_reglist (self, info, code, inst);
case 32:
- return aarch64_ext_ldst_reglist_r (self, info, code, inst);
+ return aarch64_ext_ldst_reglist (self, info, code, inst);
case 33:
+ return aarch64_ext_ldst_reglist_r (self, info, code, inst);
+ case 34:
return aarch64_ext_ldst_elemlist (self, info, code, inst);
- case 36:
- case 45:
+ case 37:
case 46:
case 47:
case 48:
@@ -7690,58 +9103,59 @@ aarch64_extract_operand (const aarch64_operand *self,
case 55:
case 56:
case 57:
- case 65:
+ case 58:
case 66:
case 67:
case 68:
case 69:
+ case 70:
return aarch64_ext_imm (self, info, code, inst);
- case 37:
case 38:
- return aarch64_ext_advsimd_imm_shift (self, info, code, inst);
case 39:
+ return aarch64_ext_advsimd_imm_shift (self, info, code, inst);
case 40:
case 41:
- return aarch64_ext_advsimd_imm_modified (self, info, code, inst);
case 42:
+ return aarch64_ext_advsimd_imm_modified (self, info, code, inst);
+ case 43:
return aarch64_ext_shll_imm (self, info, code, inst);
- case 58:
- return aarch64_ext_limm (self, info, code, inst);
case 59:
- return aarch64_ext_aimm (self, info, code, inst);
+ return aarch64_ext_limm (self, info, code, inst);
case 60:
- return aarch64_ext_imm_half (self, info, code, inst);
+ return aarch64_ext_aimm (self, info, code, inst);
case 61:
+ return aarch64_ext_imm_half (self, info, code, inst);
+ case 62:
return aarch64_ext_fbits (self, info, code, inst);
- case 63:
case 64:
+ case 65:
return aarch64_ext_cond (self, info, code, inst);
- case 70:
- case 76:
- return aarch64_ext_addr_simple (self, info, code, inst);
case 71:
- return aarch64_ext_addr_regoff (self, info, code, inst);
+ case 77:
+ return aarch64_ext_addr_simple (self, info, code, inst);
case 72:
+ return aarch64_ext_addr_regoff (self, info, code, inst);
case 73:
case 74:
- return aarch64_ext_addr_simm (self, info, code, inst);
case 75:
+ return aarch64_ext_addr_simm (self, info, code, inst);
+ case 76:
return aarch64_ext_addr_uimm12 (self, info, code, inst);
- case 77:
- return aarch64_ext_simd_addr_post (self, info, code, inst);
case 78:
- return aarch64_ext_sysreg (self, info, code, inst);
+ return aarch64_ext_simd_addr_post (self, info, code, inst);
case 79:
- return aarch64_ext_pstatefield (self, info, code, inst);
+ return aarch64_ext_sysreg (self, info, code, inst);
case 80:
+ return aarch64_ext_pstatefield (self, info, code, inst);
case 81:
case 82:
case 83:
- return aarch64_ext_sysins_op (self, info, code, inst);
case 84:
+ return aarch64_ext_sysins_op (self, info, code, inst);
case 85:
- return aarch64_ext_barrier (self, info, code, inst);
case 86:
+ return aarch64_ext_barrier (self, info, code, inst);
+ case 87:
return aarch64_ext_prfop (self, info, code, inst);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index c3670fe..589fa84 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -224,6 +224,17 @@ aarch64_ext_regno (const aarch64_operand *self, aarch64_opnd_info *info,
return 1;
}
+int
+aarch64_ext_regno_pair (const aarch64_operand *self ATTRIBUTE_UNUSED, aarch64_opnd_info *info,
+ const aarch64_insn code ATTRIBUTE_UNUSED,
+ const aarch64_inst *inst ATTRIBUTE_UNUSED)
+{
+ assert (info->idx == 1
+ || info->idx ==3);
+ info->reg.regno = inst->operands[info->idx - 1].reg.regno + 1;
+ return 1;
+}
+
/* e.g. IC <ic_op>{, <Xt>}. */
int
aarch64_ext_regrt_sysins (const aarch64_operand *self, aarch64_opnd_info *info,
@@ -1360,6 +1371,13 @@ do_special_decoding (aarch64_inst *inst)
&& extract_field (FLD_N, inst->value, 0) != value)
return 0;
}
+ /* 'sf' field. */
+ if (inst->opcode->flags & F_LSE_SZ)
+ {
+ idx = select_operand_for_sf_field_coding (inst->opcode);
+ value = extract_field (FLD_lse_sz, inst->value, 0);
+ inst->operands[idx].qualifier = get_greg_qualifier_from_value (value);
+ }
/* size:Q fields. */
if (inst->opcode->flags & F_SIZEQ)
return decode_sizeq (inst);
diff --git a/opcodes/aarch64-dis.h b/opcodes/aarch64-dis.h
index c4221b0..9ff158c1 100644
--- a/opcodes/aarch64-dis.h
+++ b/opcodes/aarch64-dis.h
@@ -60,6 +60,7 @@ int aarch64_extract_operand (const aarch64_operand *, aarch64_opnd_info *,
const aarch64_insn, const aarch64_inst *)
AARCH64_DECL_OPD_EXTRACTOR (ext_regno);
+AARCH64_DECL_OPD_EXTRACTOR (ext_regno_pair);
AARCH64_DECL_OPD_EXTRACTOR (ext_regrt_sysins);
AARCH64_DECL_OPD_EXTRACTOR (ext_reglane);
AARCH64_DECL_OPD_EXTRACTOR (ext_reglist);
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index 1831fe4..3d84d37 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -35,6 +35,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_INT_REG, "Rt_SYS", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rt}, "an integer register"},
{AARCH64_OPND_CLASS_INT_REG, "Rd_SP", OPD_F_MAYBE_SP | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rd}, "an integer or stack pointer register"},
{AARCH64_OPND_CLASS_INT_REG, "Rn_SP", OPD_F_MAYBE_SP | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an integer or stack pointer register"},
+ {AARCH64_OPND_CLASS_INT_REG, "PAIRREG", OPD_F_HAS_EXTRACTOR, {}, "the second reg of a pair"},
{AARCH64_OPND_CLASS_MODIFIED_REG, "Rm_EXT", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an integer register with optional extension"},
{AARCH64_OPND_CLASS_MODIFIED_REG, "Rm_SFT", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "an integer register with optional shift"},
{AARCH64_OPND_CLASS_FP_REG, "Fd", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rd}, "a floating-point register"},
@@ -151,12 +152,12 @@ static const unsigned op_enum_table [] =
12,
510,
511,
- 776,
- 778,
- 780,
+ 948,
+ 950,
+ 952,
760,
- 779,
- 777,
+ 951,
+ 949,
259,
499,
509,
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index be01ab3..430cf5b 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -192,6 +192,7 @@ const aarch64_field fields[] =
{ 11, 1 }, /* index: in ld/st inst deciding the pre/post-index. */
{ 24, 1 }, /* index2: in ld/st pair inst deciding the pre/post-index. */
{ 31, 1 }, /* sf: in integer data processing instructions. */
+ { 30, 1 }, /* lse_size: in LSE extension atomic instructions. */
{ 11, 1 }, /* H: in advsimd scalar x indexed element instructions. */
{ 21, 1 }, /* L: in advsimd scalar x indexed element instructions. */
{ 20, 1 }, /* M: in advsimd scalar x indexed element instructions. */
@@ -1254,6 +1255,25 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
switch (aarch64_operands[type].op_class)
{
case AARCH64_OPND_CLASS_INT_REG:
+ /* Check pair reg constraints for cas* instructions. */
+ if (type == AARCH64_OPND_PAIRREG)
+ {
+ assert (idx == 1 || idx == 3);
+ if (opnds[idx - 1].reg.regno % 2 != 0)
+ {
+ set_syntax_error (mismatch_detail, idx - 1,
+ _("reg pair must start from even reg"));
+ return 0;
+ }
+ if (opnds[idx].reg.regno != opnds[idx - 1].reg.regno + 1)
+ {
+ set_syntax_error (mismatch_detail, idx,
+ _("reg pair must be contiguous"));
+ return 0;
+ }
+ break;
+ }
+
/* <Xt> may be optional in some IC and TLBI instructions. */
if (type == AARCH64_OPND_Rt_SYS)
{
@@ -2327,6 +2347,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_Rs:
case AARCH64_OPND_Ra:
case AARCH64_OPND_Rt_SYS:
+ case AARCH64_OPND_PAIRREG:
/* The optional-ness of <Xt> in e.g. IC <ic_op>{, <Xt>} is determined by
the <ic_op>, therefore we we use opnd->present to override the
generic optional-ness information. */
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 81d61fa..8f452d0 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -84,6 +84,7 @@ enum aarch64_field_kind
FLD_index,
FLD_index2,
FLD_sf,
+ FLD_lse_sz,
FLD_H,
FLD_L,
FLD_M,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index e8ba4a7..13a205f 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -981,6 +981,13 @@
QLF3(X, X, NIL), \
}
+/* e.g. CASP <Xt1>, <Xt1+1>, <Xt2>, <Xt2+1>, [<Xn|SP>{,#0}]. */
+#define QL_R4NIL \
+{ \
+ QLF5(W, W, W, W, NIL), \
+ QLF5(X, X, X, X, NIL), \
+}
+
/* e.g. STXP <Ws>, <Xt1>, <Xt2>, [<Xn|SP>{,#0}]. */
#define QL_R3_LDST_EXC \
{ \
@@ -1213,12 +1220,15 @@ static const aarch64_feature_set aarch64_feature_crypto =
AARCH64_FEATURE (AARCH64_FEATURE_CRYPTO, 0);
static const aarch64_feature_set aarch64_feature_crc =
AARCH64_FEATURE (AARCH64_FEATURE_CRC, 0);
+static const aarch64_feature_set aarch64_feature_lse =
+ AARCH64_FEATURE (AARCH64_FEATURE_LSE, 0);
#define CORE &aarch64_feature_v8
#define FP &aarch64_feature_fp
#define SIMD &aarch64_feature_simd
#define CRYPTO &aarch64_feature_crypto
#define CRC &aarch64_feature_crc
+#define LSE &aarch64_feature_lse
struct aarch64_opcode aarch64_opcode_table[] =
{
@@ -2002,13 +2012,13 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"ldxrb", 0x85f7c00, 0xffe08000, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_W1_LDST_EXC, 0},
{"ldaxrb", 0x85ffc00, 0xffe08000, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_W1_LDST_EXC, 0},
{"stlrb", 0x89ffc00, 0xffe08000, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_W1_LDST_EXC, 0},
- {"ldarb", 0x8dffc00, 0xffe08000, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_W1_LDST_EXC, 0},
+ {"ldarb", 0x8dffc00, 0xffeffc00, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_W1_LDST_EXC, 0},
{"stxrh", 0x48007c00, 0xffe08000, ldstexcl, 0, CORE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
{"stlxrh", 0x4800fc00, 0xffe08000, ldstexcl, 0, CORE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
{"ldxrh", 0x485f7c00, 0xffe08000, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_W1_LDST_EXC, 0},
{"ldaxrh", 0x485ffc00, 0xffe08000, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_W1_LDST_EXC, 0},
{"stlrh", 0x489ffc00, 0xffe08000, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_W1_LDST_EXC, 0},
- {"ldarh", 0x48dffc00, 0xffe08000, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_W1_LDST_EXC, 0},
+ {"ldarh", 0x48dffc00, 0xffeffc00, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_W1_LDST_EXC, 0},
{"stxr", 0x88007c00, 0xbfe08000, ldstexcl, 0, CORE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2_LDST_EXC, F_GPRSIZE_IN_Q},
{"stlxr", 0x8800fc00, 0xbfe08000, ldstexcl, 0, CORE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2_LDST_EXC, F_GPRSIZE_IN_Q},
{"stxp", 0x88200000, 0xbfe08000, ldstexcl, 0, CORE, OP4 (Rs, Rt, Rt2, ADDR_SIMPLE), QL_R3_LDST_EXC, F_GPRSIZE_IN_Q},
@@ -2018,7 +2028,7 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"ldxp", 0x887f0000, 0xbfe08000, ldstexcl, 0, CORE, OP3 (Rt, Rt2, ADDR_SIMPLE), QL_R2NIL, F_GPRSIZE_IN_Q},
{"ldaxp", 0x887f8000, 0xbfe08000, ldstexcl, 0, CORE, OP3 (Rt, Rt2, ADDR_SIMPLE), QL_R2NIL, F_GPRSIZE_IN_Q},
{"stlr", 0x889ffc00, 0xbfe08000, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_R1NIL, F_GPRSIZE_IN_Q},
- {"ldar", 0x88dffc00, 0xbfe08000, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_R1NIL, F_GPRSIZE_IN_Q},
+ {"ldar", 0x88dffc00, 0xbfeffc00, ldstexcl, 0, CORE, OP2 (Rt, ADDR_SIMPLE), QL_R1NIL, F_GPRSIZE_IN_Q},
/* Load/store no-allocate pair (offset). */
{"stnp", 0x28000000, 0x7fc00000, ldstnapair_offs, 0, CORE, OP3 (Rt, Rt2, ADDR_SIMM7), QL_LDST_PAIR_R, F_SF},
{"ldnp", 0x28400000, 0x7fc00000, ldstnapair_offs, 0, CORE, OP3 (Rt, Rt2, ADDR_SIMM7), QL_LDST_PAIR_R, F_SF},
@@ -2062,6 +2072,179 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"ands", 0x6a000000, 0x7f200000, log_shift, 0, CORE, OP3 (Rd, Rn, Rm_SFT), QL_I3SAMER, F_HAS_ALIAS | F_SF},
{"tst", 0x6a00001f, 0x7f20001f, log_shift, 0, CORE, OP2 (Rn, Rm_SFT), QL_I2SAMER, F_ALIAS | F_SF},
{"bics", 0x6a200000, 0x7f200000, log_shift, 0, CORE, OP3 (Rd, Rn, Rm_SFT), QL_I3SAMER, F_SF},
+ /* LSE extension (atomic). */
+ {"casb", 0x8a07c00, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"cash", 0x48a07c00, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"cas", 0x88a07c00, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"casab", 0x8e07c00, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"caslb", 0x8a0fc00, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"casalb", 0x8e0fc00, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"casah", 0x48e07c00, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"caslh", 0x48a0fc00, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"casalh", 0x48e0fc00, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"casa", 0x88e07c00, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"casl", 0x88a0fc00, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"casal", 0x88e0fc00, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"casp", 0x8207c00, 0xbfe0fc00, lse_atomic, 0, LSE, OP5 (Rs, PAIRREG, Rt, PAIRREG, ADDR_SIMPLE), QL_R4NIL, F_LSE_SZ},
+ {"caspa", 0x8607c00, 0xbfe0fc00, lse_atomic, 0, LSE, OP5 (Rs, PAIRREG, Rt, PAIRREG, ADDR_SIMPLE), QL_R4NIL, F_LSE_SZ},
+ {"caspl", 0x820fc00, 0xbfe0fc00, lse_atomic, 0, LSE, OP5 (Rs, PAIRREG, Rt, PAIRREG, ADDR_SIMPLE), QL_R4NIL, F_LSE_SZ},
+ {"caspal", 0x860fc00, 0xbfe0fc00, lse_atomic, 0, LSE, OP5 (Rs, PAIRREG, Rt, PAIRREG, ADDR_SIMPLE), QL_R4NIL, F_LSE_SZ},
+ {"swpb", 0x38208000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"swph", 0x78208000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"swp", 0xb8208000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"swpab", 0x38a08000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"swplb", 0x38608000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"swpalb", 0x38e08000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"swpah", 0x78a08000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"swplh", 0x78608000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"swpalh", 0x78e08000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"swpa", 0xb8a08000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"swpl", 0xb8608000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"swpal", 0xb8e08000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldaddb", 0x38200000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldaddh", 0x78200000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldadd", 0xb8200000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldaddab", 0x38a00000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldaddlb", 0x38600000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldaddalb", 0x38e00000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldaddah", 0x78a00000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldaddlh", 0x78600000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldaddalh", 0x78e00000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldadda", 0xb8a00000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldaddl", 0xb8600000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldaddal", 0xb8e00000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldclrb", 0x38201000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldclrh", 0x78201000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldclr", 0xb8201000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldclrab", 0x38a01000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldclrlb", 0x38601000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldclralb", 0x38e01000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldclrah", 0x78a01000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldclrlh", 0x78601000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldclralh", 0x78e01000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldclra", 0xb8a01000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldclrl", 0xb8601000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldclral", 0xb8e01000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldeorb", 0x38202000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldeorh", 0x78202000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldeor", 0xb8202000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldeorab", 0x38a02000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldeorlb", 0x38602000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldeoralb", 0x38e02000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldeorah", 0x78a02000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldeorlh", 0x78602000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldeoralh", 0x78e02000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldeora", 0xb8a02000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldeorl", 0xb8602000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldeoral", 0xb8e02000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldsetb", 0x38203000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldseth", 0x78203000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldset", 0xb8203000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldsetab", 0x38a03000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsetlb", 0x38603000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldsetalb", 0x38e03000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsetah", 0x78a03000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsetlh", 0x78603000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldsetalh", 0x78e03000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldseta", 0xb8a03000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldsetl", 0xb8603000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldsetal", 0xb8e03000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldsmaxb", 0x38204000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldsmaxh", 0x78204000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldsmax", 0xb8204000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldsmaxab", 0x38a04000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsmaxlb", 0x38604000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldsmaxalb", 0x38e04000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsmaxah", 0x78a04000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsmaxlh", 0x78604000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldsmaxalh", 0x78e04000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsmaxa", 0xb8a04000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldsmaxl", 0xb8604000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldsmaxal", 0xb8e04000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldsminb", 0x38205000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldsminh", 0x78205000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldsmin", 0xb8205000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldsminab", 0x38a05000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsminlb", 0x38605000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldsminalb", 0x38e05000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsminah", 0x78a05000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsminlh", 0x78605000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldsminalh", 0x78e05000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldsmina", 0xb8a05000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldsminl", 0xb8605000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldsminal", 0xb8e05000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldumaxb", 0x38206000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldumaxh", 0x78206000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldumax", 0xb8206000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldumaxab", 0x38a06000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldumaxlb", 0x38606000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldumaxalb", 0x38e06000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldumaxah", 0x78a06000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldumaxlh", 0x78606000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldumaxalh", 0x78e06000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldumaxa", 0xb8a06000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"ldumaxl", 0xb8606000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"ldumaxal", 0xb8e06000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"lduminb", 0x38207000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"lduminh", 0x78207000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"ldumin", 0xb8207000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"lduminab", 0x38a07000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"lduminlb", 0x38607000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"lduminalb", 0x38e07000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"lduminah", 0x78a07000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"lduminlh", 0x78607000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, F_HAS_ALIAS},
+ {"lduminalh", 0x78e07000, 0xffe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
+ {"ldumina", 0xb8a07000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"lduminl", 0xb8607000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ | F_HAS_ALIAS},
+ {"lduminal", 0xb8e07000, 0xbfe0fc00, lse_atomic, 0, LSE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_R2NIL, F_LSE_SZ},
+ {"staddb", 0x3820001f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"staddh", 0x7820001f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stadd", 0xb820001f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"staddlb", 0x3860001f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"staddlh", 0x7860001f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"staddl", 0xb860001f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stclrb", 0x3820101f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stclrh", 0x7820101f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stclr", 0xb820101f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stclrlb", 0x3860101f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stclrlh", 0x7860101f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stclrl", 0xb860101f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"steorb", 0x3820201f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"steorh", 0x7820201f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"steor", 0xb820201f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"steorlb", 0x3860201f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"steorlh", 0x7860201f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"steorl", 0xb860201f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stsetb", 0x3820301f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stseth", 0x7820301f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stset", 0xb820301f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stsetlb", 0x3860301f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stsetlh", 0x7860301f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stsetl", 0xb860301f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stsmaxb", 0x3820401f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stsmaxh", 0x7820401f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stsmax", 0xb820401f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stsmaxlb", 0x3860401f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stsmaxlh", 0x7860401f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stsmaxl", 0xb860401f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stsminb", 0x3820501f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stsminh", 0x7820501f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stsmin", 0xb820501f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stsminlb", 0x3860501f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stsminlh", 0x7860501f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stsminl", 0xb860501f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stumaxb", 0x3820601f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stumaxh", 0x7820601f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stumax", 0xb820601f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stumaxlb", 0x3860601f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stumaxlh", 0x7860601f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stumaxl", 0xb860601f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stuminb", 0x3820701f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stuminh", 0x7820701f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stumin", 0xb820701f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
+ {"stuminlb", 0x3860701f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stuminlh", 0x7860701f, 0xffe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_W1_LDST_EXC, F_ALIAS},
+ {"stuminl", 0xb860701f, 0xbfe0fc1f, lse_atomic, 0, LSE, OP2 (Rs, ADDR_SIMPLE), QL_R1NIL, F_LSE_SZ | F_ALIAS},
/* Move wide (immediate). */
{"movn", 0x12800000, 0x7f800000, movewide, OP_MOVN, CORE, OP2 (Rd, HALF), QL_DST_R, F_SF | F_HAS_ALIAS},
{"mov", 0x12800000, 0x7f800000, movewide, OP_MOV_IMM_WIDEN, CORE, OP2 (Rd, IMM_MOV), QL_DST_R, F_SF | F_ALIAS | F_CONV},
@@ -2147,6 +2330,8 @@ struct aarch64_opcode aarch64_opcode_table[] =
"an integer or stack pointer register") \
Y(INT_REG, regno, "Rn_SP", OPD_F_MAYBE_SP, F(FLD_Rn), \
"an integer or stack pointer register") \
+ X(INT_REG, 0, ext_regno_pair, "PAIRREG", 0, F(), \
+ "the second reg of a pair") \
Y(MODIFIED_REG, reg_extended, "Rm_EXT", 0, F(), \
"an integer register with optional extension") \
Y(MODIFIED_REG, reg_shifted, "Rm_SFT", 0, F(), \