diff options
author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-04-19 14:54:46 +0100 |
---|---|---|
committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-04-19 14:56:34 +0100 |
commit | cd6608e49d884f01536b5948ed3a64241dbb4a1f (patch) | |
tree | 94520d967448ea6a7e515a48a338072087c32250 /opcodes | |
parent | fe1640ff8ecc95beeab88f9aa6141bbeec149485 (diff) | |
download | gdb-cd6608e49d884f01536b5948ed3a64241dbb4a1f.zip gdb-cd6608e49d884f01536b5948ed3a64241dbb4a1f.tar.gz gdb-cd6608e49d884f01536b5948ed3a64241dbb4a1f.tar.bz2 |
aarch64: Add new data cache maintenance operations
This patch adds support to two new system registers (CIPAPA, CIGDPAPA) in
conjunction with DC instruction. This change is part of RME (Realm Management
Extension).
gas/ChangeLog:
2021-04-19 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* testsuite/gas/aarch64/rme.d: Update test.
* testsuite/gas/aarch64/rme.s: Update test.
opcodes/ChangeLog:
2021-04-19 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* aarch64-opc.c: Add new register (CIPAPA, CIGDPAPA) support for
DC instruction.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 5 | ||||
-rw-r--r-- | opcodes/aarch64-opc.c | 2 |
2 files changed, 7 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5dc51cd..5bae9d0 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2021-04-19 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> + + * aarch64-opc.c: Add new register (CIPAPA, CIGDPAPA) support for + DC instruction. + 2021-04-19 Jan Beulich <jbeulich@suse.com> * aarch64-asm.c (encode_asimd_fcvt): Add initializer for diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 8727def..b315a82 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -4763,6 +4763,8 @@ const aarch64_sys_ins_reg aarch64_sys_regs_dc[] = { "cisw", CPENS (0, C7, C14, 2), F_HASXT }, { "cigsw", CPENS (0, C7, C14, 4), F_HASXT | F_ARCHEXT }, { "cigdsw", CPENS (0, C7, C14, 6), F_HASXT | F_ARCHEXT }, + { "cipapa", CPENS (6, C7, C14, 1), F_HASXT }, + { "cigdpapa", CPENS (6, C7, C14, 5), F_HASXT }, { 0, CPENS(0,0,0,0), 0 } }; |