diff options
author | Alan Modra <amodra@gmail.com> | 2020-09-02 10:35:10 +0930 |
---|---|---|
committer | Alan Modra <amodra@gmail.com> | 2020-09-02 16:30:44 +0930 |
commit | ae3e98b418c6f31cc1999d67fc2422429d88de6f (patch) | |
tree | 87743aa47935a0e3fe6efaf8959bb0fe62240128 /opcodes | |
parent | 427202d96790f1b659e0fa9485b8128c95dc48db (diff) | |
download | gdb-ae3e98b418c6f31cc1999d67fc2422429d88de6f.zip gdb-ae3e98b418c6f31cc1999d67fc2422429d88de6f.tar.gz gdb-ae3e98b418c6f31cc1999d67fc2422429d88de6f.tar.bz2 |
ubsan: *-ibld.c
bfin-dis.c:160 shift exponent 32 is too large for 32-bit type 'long unsigned int'
bpf-ibld.c:196 left shift of 1 by 31 places cannot be represented in type 'long int'
bpf-ibld.c:196 negation of -2147483648 cannot be represented in type 'long int'; cast to an unsigned type to negate this
itself
bpf-ibld.c:197 left shift of 1 by 31 places cannot be represented in type 'long int'
bpf-ibld.c:197 signed integer overflow: -2147483648 - 1 cannot be represented in type 'long int'
bpf-ibld.c:501 left shift of 1 by 31 places cannot be represented in type 'long int'
* cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift.
* bpf-ibld.c: Regenerate.
* epiphany-ibld.c: Regenerate.
* fr30-ibld.c: Regenerate.
* frv-ibld.c: Regenerate.
* ip2k-ibld.c: Regenerate.
* iq2000-ibld.c: Regenerate.
* lm32-ibld.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32r-ibld.c: Regenerate.
* mep-ibld.c: Regenerate.
* mt-ibld.c: Regenerate.
* or1k-ibld.c: Regenerate.
* xc16x-ibld.c: Regenerate.
* xstormy16-ibld.c: Regenerate.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 18 | ||||
-rw-r--r-- | opcodes/bpf-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/cgen-ibld.in | 8 | ||||
-rw-r--r-- | opcodes/epiphany-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/fr30-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/frv-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/ip2k-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/iq2000-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/lm32-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/m32c-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/m32r-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/mep-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/mt-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/or1k-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/xc16x-ibld.c | 8 | ||||
-rw-r--r-- | opcodes/xstormy16-ibld.c | 8 |
16 files changed, 78 insertions, 60 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 1c7e4cb..0cb0491 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,23 @@ 2020-09-02 Alan Modra <amodra@gmail.com> + * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift. + * bpf-ibld.c: Regenerate. + * epiphany-ibld.c: Regenerate. + * fr30-ibld.c: Regenerate. + * frv-ibld.c: Regenerate. + * ip2k-ibld.c: Regenerate. + * iq2000-ibld.c: Regenerate. + * lm32-ibld.c: Regenerate. + * m32c-ibld.c: Regenerate. + * m32r-ibld.c: Regenerate. + * mep-ibld.c: Regenerate. + * mt-ibld.c: Regenerate. + * or1k-ibld.c: Regenerate. + * xc16x-ibld.c: Regenerate. + * xstormy16-ibld.c: Regenerate. + +2020-09-02 Alan Modra <amodra@gmail.com> + * bfin-dis.c (MASKBITS): Use SIGNBIT. 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com> diff --git a/opcodes/bpf-ibld.c b/opcodes/bpf-ibld.c index 0070e41..32260f8 100644 --- a/opcodes/bpf-ibld.c +++ b/opcodes/bpf-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/cgen-ibld.in b/opcodes/cgen-ibld.in index 7829822..b06d5c2 100644 --- a/opcodes/cgen-ibld.in +++ b/opcodes/cgen-ibld.in @@ -154,7 +154,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -192,8 +192,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -497,7 +497,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/epiphany-ibld.c b/opcodes/epiphany-ibld.c index 27f0fab..6e594d3 100644 --- a/opcodes/epiphany-ibld.c +++ b/opcodes/epiphany-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/fr30-ibld.c b/opcodes/fr30-ibld.c index 8cc7020..aa5f846 100644 --- a/opcodes/fr30-ibld.c +++ b/opcodes/fr30-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/frv-ibld.c b/opcodes/frv-ibld.c index 2a7fcb8..8bc6962 100644 --- a/opcodes/frv-ibld.c +++ b/opcodes/frv-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/ip2k-ibld.c b/opcodes/ip2k-ibld.c index 18c2fed..0d7b447 100644 --- a/opcodes/ip2k-ibld.c +++ b/opcodes/ip2k-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/iq2000-ibld.c b/opcodes/iq2000-ibld.c index cad26e2..ce0b15a 100644 --- a/opcodes/iq2000-ibld.c +++ b/opcodes/iq2000-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/lm32-ibld.c b/opcodes/lm32-ibld.c index 48e894a..04d3c9e 100644 --- a/opcodes/lm32-ibld.c +++ b/opcodes/lm32-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/m32c-ibld.c b/opcodes/m32c-ibld.c index 67bfb48..228fa0d 100644 --- a/opcodes/m32c-ibld.c +++ b/opcodes/m32c-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/m32r-ibld.c b/opcodes/m32r-ibld.c index 8e1a7de..e4080ef 100644 --- a/opcodes/m32r-ibld.c +++ b/opcodes/m32r-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/mep-ibld.c b/opcodes/mep-ibld.c index 8f03813..47611dd 100644 --- a/opcodes/mep-ibld.c +++ b/opcodes/mep-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/mt-ibld.c b/opcodes/mt-ibld.c index 924fc90..bd8b545 100644 --- a/opcodes/mt-ibld.c +++ b/opcodes/mt-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/or1k-ibld.c b/opcodes/or1k-ibld.c index 576a139..828aae8 100644 --- a/opcodes/or1k-ibld.c +++ b/opcodes/or1k-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/xc16x-ibld.c b/opcodes/xc16x-ibld.c index ed51a1b..9b87c3b 100644 --- a/opcodes/xc16x-ibld.c +++ b/opcodes/xc16x-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/xstormy16-ibld.c b/opcodes/xstormy16-ibld.c index 06f036f..5784b58 100644 --- a/opcodes/xstormy16-ibld.c +++ b/opcodes/xstormy16-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; |