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authorJan Beulich <jbeulich@suse.com>2022-03-24 09:38:19 +0100
committerJan Beulich <jbeulich@suse.com>2022-03-24 09:38:19 +0100
commit526ca202fca70b29167e3dc85f602529183dd3e1 (patch)
treec75ec11f46939968705cc602de0e86414e80a8b4 /opcodes
parented084cdcc83664494617dfe0dcb984a36a76cf5c (diff)
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x86: drop L1OM special case from disassembler
There wasn't any real support anyway: None of the sub-architecture specific insns were ever supported.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/i386-dis.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index a30bda0..db13eea 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -9423,12 +9423,8 @@ print_insn (bfd_vma pc, instr_info *ins)
}
/* The output looks better if we put 7 bytes on a line, since that
- puts most long word instructions on a single line. Use 8 bytes
- for Intel L1OM. */
- if ((ins->info->mach & bfd_mach_l1om) != 0)
- ins->info->bytes_per_line = 8;
- else
- ins->info->bytes_per_line = 7;
+ puts most long word instructions on a single line. */
+ ins->info->bytes_per_line = 7;
ins->info->private_data = &priv;
priv.max_fetched = priv.the_buffer;