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author | David Faust <david.faust@oracle.com> | 2023-08-21 09:07:11 -0700 |
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committer | David Faust <david.faust@oracle.com> | 2023-08-21 10:07:25 -0700 |
commit | 41aa80c5440ff24fc931fa2a3e681213dc1dbdec (patch) | |
tree | eeda5e5d2a14d7f6927af428599c89d089a259d8 /opcodes | |
parent | 11e3488d3f787d51196a115fd9c6085e57bd9626 (diff) | |
download | gdb-41aa80c5440ff24fc931fa2a3e681213dc1dbdec.zip gdb-41aa80c5440ff24fc931fa2a3e681213dc1dbdec.tar.gz gdb-41aa80c5440ff24fc931fa2a3e681213dc1dbdec.tar.bz2 |
bpf: correct neg and neg32 instruction encoding
The neg/neg32 BPF instructions always use BPF_SRC_K (=0) in their header
source bit, despite operating on registers. If BPF_SRC_X (=1) is set,
the instructions are rejected by the kernel.
Because of this there are also no neg/neg32 instructions which operate
on immediates, so remove them.
bd434cc4d94ec3d2f9fc1e7c00c27b074f962bc1 was a similar fix in the old
CGEN-based port, but was not carried forward in the new port.
include/
* opcode/bpf.h (enum bpf_insn_id): Remove spurious entries
BPF_INSN_NEGI and BPF_INSN_NEG32I.
opcodes/
* bpf-opc.c (bpf_opcodes): Remove erroneous NEGI and NEG32I
instructions.
gas/
* doc/c-bpf.texi (BPF Instructions): Remove erroneous neg and
neg32 instructions operating on immediates.
* testsuite/gas/bpf/alu.s: Adapt accordingly.
* testsuite/gas/bpf/alu.d: Likewise.
* testsuite/gas/bpf/alu-be.d: Likewise
* testsuite/gas/bpf/alu32.s: Likewise.
* testsuite/gas/bpf/alu32.d: Likewise.
* testsuite/gas/bpf/alu32-be.d: Likewise.
* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/bpf-opc.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c index 3d6dccb..7fcec62 100644 --- a/opcodes/bpf-opc.c +++ b/opcodes/bpf-opc.c @@ -74,8 +74,6 @@ const struct bpf_opcode bpf_opcodes[] = {BPF_INSN_XORI, "xor%W%dr , %i32", "%dr ^= %i32", BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_XOR|BPF_SRC_K}, {BPF_INSN_NEGR, "neg%W%dr", "%dr = - %dr", - BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_NEG|BPF_SRC_X}, - {BPF_INSN_NEGI, "neg%W%dr , %i32", "%dr = -%W%i32", BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_NEG|BPF_SRC_K}, {BPF_INSN_LSHR, "lsh%W%dr , %sr", "%dr <<= %sr", BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_LSH|BPF_SRC_X}, @@ -142,8 +140,6 @@ const struct bpf_opcode bpf_opcodes[] = {BPF_INSN_XOR32I, "xor32%W%dr , %i32", "%dw ^= %i32", BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_XOR|BPF_SRC_K}, {BPF_INSN_NEG32R, "neg32%W%dr", "%dw = - %dw", - BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_NEG|BPF_SRC_X}, - {BPF_INSN_NEG32I, "neg32%W%dr , %i32", "%dw = -%W%i32", BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_NEG|BPF_SRC_K}, {BPF_INSN_LSH32R, "lsh32%W%dr , %sr", "%dw <<= %sw", BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_LSH|BPF_SRC_X}, |