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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-11-27 15:47:53 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-11-27 15:47:53 +0000 |
| commit | 3bd894a7147feacf6a8ab388b1b1e0d685abfcdc (patch) | |
| tree | 349ea1ecee89cede87a8d5377ab799e511180928 /opcodes | |
| parent | 64357d2e04994ba161b4a99ef2bc45db0c180ea0 (diff) | |
| download | gdb-3bd894a7147feacf6a8ab388b1b1e0d685abfcdc.zip gdb-3bd894a7147feacf6a8ab388b1b1e0d685abfcdc.tar.gz gdb-3bd894a7147feacf6a8ab388b1b1e0d685abfcdc.tar.bz2 | |
[AArch64][PATCH 1/3] Support ARMv8.2 FP16 floating point instructions.
ARMv8.2 adds 16-bit floating point operations as an optional extension
to the ARMv8 FP support. This patch set adds support for the 16-bit FP
instructions to binutils, enabling the instructions when both +fp and
+fp16 architecture extensions are enabled.
The patches in this series:
- Add a feature macro for use by the encoding/decoding mechanism.
- Adjust a utility function, used when disassembling, to support 16-bit
floating point values.
- Add the new scalar floating-point instructions.
This patch adds the feature macro FP_F16 to the AArch64 encoding/decoding
mechanism, enabling it when both +fp and +fp16 are selected.
opcodes/
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-tbl.h (aarch64_feature_fp_f16): New.
(FP_F16): New.
Change-Id: Ie370e43e3d77a7d54b4416b4be901b363a37f3d5
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/aarch64-tbl.h | 3 |
2 files changed, 8 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 18be8f4..afdd7e7 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2015-11-27 Matthew Wahab <matthew.wahab@arm.com> + * aarch64-tbl.h (aarch64_feature_fp_f16): New. + (FP_F16): New. + +2015-11-27 Matthew Wahab <matthew.wahab@arm.com> + * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 6371193..6b77b36 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -1235,6 +1235,8 @@ static const aarch64_feature_set aarch64_feature_rdma = AARCH64_FEATURE (AARCH64_FEATURE_RDMA, 0); static const aarch64_feature_set aarch64_feature_v8_2 = AARCH64_FEATURE (AARCH64_FEATURE_V8_2, 0); +static const aarch64_feature_set aarch64_feature_fp_f16 = + AARCH64_FEATURE (AARCH64_FEATURE_F16 | AARCH64_FEATURE_FP, 0); #define CORE &aarch64_feature_v8 #define FP &aarch64_feature_fp @@ -1244,6 +1246,7 @@ static const aarch64_feature_set aarch64_feature_v8_2 = #define LSE &aarch64_feature_lse #define LOR &aarch64_feature_lor #define RDMA &aarch64_feature_rdma +#define FP_F16 &aarch64_feature_fp_f16 #define ARMV8_2 &aarch64_feature_v8_2 struct aarch64_opcode aarch64_opcode_table[] = |