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| author | Jan Beulich <jbeulich@suse.com> | 2022-04-19 09:23:49 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2022-04-19 09:23:49 +0200 |
| commit | 2f399d995b59a522c2739c0ab163c501c082cafb (patch) | |
| tree | a44cb461c11fc3b0f25c4646223cdbb0af908c0f /opcodes | |
| parent | a17a212139296b7b0f32d4535640d779c396acef (diff) | |
| download | gdb-2f399d995b59a522c2739c0ab163c501c082cafb.zip gdb-2f399d995b59a522c2739c0ab163c501c082cafb.tar.gz gdb-2f399d995b59a522c2739c0ab163c501c082cafb.tar.bz2 | |
x86: correct and simplify NOP disassembly
It's not just REX.W which is ignored with opcode 0x90. The same goes for
REX.R and REX.X as well as empty REX. None of these are forms of
"xchg %eax,%eax" (which would mean zero-extending %eax to %rax), so they
also shouldn't be disassembled this way.
While there simplify things: A single hook function suffices, thus
making it unnecessary to keep two expressions in sync. And checking
ins->address_mode for mode_64bit also is unnecessary, as "rex" can be
non-zero only in that case anyway.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/i386-dis.c | 30 |
1 files changed, 9 insertions, 21 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 101eeea..1e32663 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -98,8 +98,7 @@ static void VPCOM_Fixup (instr_info *, int, int); static void OP_0f07 (instr_info *, int, int); static void OP_Monitor (instr_info *, int, int); static void OP_Mwait (instr_info *, int, int); -static void NOP_Fixup1 (instr_info *, int, int); -static void NOP_Fixup2 (instr_info *, int, int); +static void NOP_Fixup (instr_info *, int, int); static void OP_3DNowSuffix (instr_info *, int, int); static void CMP_Fixup (instr_info *, int, int); static void BadOp (instr_info *); @@ -2913,9 +2912,9 @@ static const struct dis386 reg_table[][8] = { static const struct dis386 prefix_table[][4] = { /* PREFIX_90 */ { - { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } }, 0 }, + { "xchgS", { { NOP_Fixup, 0 }, { NOP_Fixup, 1 } }, 0 }, { "pause", { XX }, 0 }, - { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } }, 0 }, + { "xchgS", { { NOP_Fixup, 0 }, { NOP_Fixup, 1 } }, 0 }, { NULL, { { NULL, 0 } }, PREFIX_IGNORED } }, @@ -12724,25 +12723,14 @@ OP_0f07 (instr_info *ins, int bytemode, int sizeflag) 32bit mode and "xchg %rax,%rax" in 64bit mode. */ static void -NOP_Fixup1 (instr_info *ins, int bytemode, int sizeflag) +NOP_Fixup (instr_info *ins, int opnd, int sizeflag) { - if ((ins->prefixes & PREFIX_DATA) != 0 - || (ins->rex != 0 - && ins->rex != 0x48 - && ins->address_mode == mode_64bit)) - OP_REG (ins, bytemode, sizeflag); - else + if ((ins->prefixes & PREFIX_DATA) == 0 && (ins->rex & REX_B) == 0) strcpy (ins->obuf, "nop"); -} - -static void -NOP_Fixup2 (instr_info *ins, int bytemode, int sizeflag) -{ - if ((ins->prefixes & PREFIX_DATA) != 0 - || (ins->rex != 0 - && ins->rex != 0x48 - && ins->address_mode == mode_64bit)) - OP_IMREG (ins, bytemode, sizeflag); + else if (opnd == 0) + OP_REG (ins, eAX_reg, sizeflag); + else + OP_IMREG (ins, eAX_reg, sizeflag); } static const char *const Suffix3DNow[] = { |