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| author | Jan Beulich <jbeulich@novell.com> | 2019-06-27 08:50:28 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2019-06-27 08:50:28 +0200 |
| commit | 2b7bcc8740dda3f314284169aaf1759a9f56025f (patch) | |
| tree | 265576874ee97d7639281d6ce247b4df7f5edf91 /opcodes | |
| parent | c1dc7af52143966da8065b527e7a7000cf9f7705 (diff) | |
| download | gdb-2b7bcc8740dda3f314284169aaf1759a9f56025f.zip gdb-2b7bcc8740dda3f314284169aaf1759a9f56025f.tar.gz gdb-2b7bcc8740dda3f314284169aaf1759a9f56025f.tar.bz2 | |
x86: fold AVX scalar to/from int conversion insns
There's no point doing a separate decode of the VEX.L bit - both decoded
forms are identical.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 9 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 54 |
2 files changed, 15 insertions, 48 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5a88657..abf77be 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,14 @@ 2019-06-27 Jan Beulich <jbeulich@suse.com> + * i386-dis.c (VEX_LEN_0F2A_P_1, VEX_LEN_0F2A_P_3, + VEX_LEN_0F2C_P_1, VEX_LEN_0F2C_P_3, VEX_LEN_0F2D_P_1, + VEX_LEN_0F2D_P_3): Delete. + (vex_len_table): Move vcvtsi2ss, vcvtsi2sd, vcvttss2si, + vcvttsd2si, vcvtss2si, and vcvtsd2si leaf entries ... + (prefix_table): ... here. + +2019-06-27 Jan Beulich <jbeulich@suse.com> + * i386-dis.c (Iq): Delete. (Id): New. (reg_table): Use it for lwpins, lwpval, and bextr. Use Edq for diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index d892eab..281d02c 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -1818,12 +1818,6 @@ enum VEX_LEN_0F16_P_0_M_1, VEX_LEN_0F16_P_2, VEX_LEN_0F17_M_0, - VEX_LEN_0F2A_P_1, - VEX_LEN_0F2A_P_3, - VEX_LEN_0F2C_P_1, - VEX_LEN_0F2C_P_3, - VEX_LEN_0F2D_P_1, - VEX_LEN_0F2D_P_3, VEX_LEN_0F41_P_0, VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_0, @@ -4696,25 +4690,25 @@ static const struct dis386 prefix_table[][4] = { /* PREFIX_VEX_0F2A */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2A_P_1) }, + { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2A_P_3) }, + { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 }, }, /* PREFIX_VEX_0F2C */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2C_P_1) }, + { "vcvttss2si", { Gdq, EXdScalar }, 0 }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2C_P_3) }, + { "vcvttsd2si", { Gdq, EXqScalar }, 0 }, }, /* PREFIX_VEX_0F2D */ { { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2D_P_1) }, + { "vcvtss2si", { Gdq, EXdScalar }, 0 }, { Bad_Opcode }, - { VEX_LEN_TABLE (VEX_LEN_0F2D_P_3) }, + { "vcvtsd2si", { Gdq, EXqScalar }, 0 }, }, /* PREFIX_VEX_0F2E */ @@ -9341,42 +9335,6 @@ static const struct dis386 vex_len_table[][2] = { { "vmovhpX", { EXq, XM }, 0 }, }, - /* VEX_LEN_0F2A_P_1 */ - { - { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 }, - { "vcvtsi2ss%LQ", { XMScalar, VexScalar, Edq }, 0 }, - }, - - /* VEX_LEN_0F2A_P_3 */ - { - { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 }, - { "vcvtsi2sd%LQ", { XMScalar, VexScalar, Edq }, 0 }, - }, - - /* VEX_LEN_0F2C_P_1 */ - { - { "vcvttss2si", { Gdq, EXdScalar }, 0 }, - { "vcvttss2si", { Gdq, EXdScalar }, 0 }, - }, - - /* VEX_LEN_0F2C_P_3 */ - { - { "vcvttsd2si", { Gdq, EXqScalar }, 0 }, - { "vcvttsd2si", { Gdq, EXqScalar }, 0 }, - }, - - /* VEX_LEN_0F2D_P_1 */ - { - { "vcvtss2si", { Gdq, EXdScalar }, 0 }, - { "vcvtss2si", { Gdq, EXdScalar }, 0 }, - }, - - /* VEX_LEN_0F2D_P_3 */ - { - { "vcvtsd2si", { Gdq, EXqScalar }, 0 }, - { "vcvtsd2si", { Gdq, EXqScalar }, 0 }, - }, - /* VEX_LEN_0F41_P_0 */ { { Bad_Opcode }, |