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| author | Jan Beulich <jbeulich@suse.com> | 2023-09-14 08:42:43 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2023-09-14 08:42:43 +0200 |
| commit | 2548c261604611b5c72f5a28ae54b6d9a15617ac (patch) | |
| tree | 3844d9e81dc7dcf87b9a1a76c856fd734e21e459 /opcodes | |
| parent | d5f9027c4c263a15d812c35fe0241cdc109df71f (diff) | |
| download | gdb-2548c261604611b5c72f5a28ae54b6d9a15617ac.zip gdb-2548c261604611b5c72f5a28ae54b6d9a15617ac.tar.gz gdb-2548c261604611b5c72f5a28ae54b6d9a15617ac.tar.bz2 | |
x86: support AVX10.1/512
Since this is merely a re-branding of certain AVX512* features, there's
little code to be added.
The main aspect here are new testcases. In order to be able to re-use
some of the existing testcases, several of them need their start symbols
adjusted. Note that 256- and 128-bit tests want adding here, as these
need to work right away. Subsequently they'll gain vector length
constraints.
Since it was missing and is wanted here, also add an AVX512VL+VPOPCNTDQ
test.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/i386-gen.c | 3 | ||||
| -rw-r--r-- | opcodes/i386-init.h | 10 |
2 files changed, 13 insertions, 0 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 68427b0..8b6eb2e 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -232,6 +232,9 @@ static const dependency isa_dependencies[] = "AVX2|AES" }, { "VPCLMULQDQ", "AVX2|PCLMULQDQ" }, + { "AVX10_1", + "AVX512VL|AVX512DQ|AVX512CD|AVX512VBMI|AVX512_VBMI2|AVX512IFMA" + "|AVX512_VNNI|AVX512_BF16|AVX512_FP16|AVX512_VPOPCNTDQ|AVX512_BITALG" }, { "SEV_ES", "SVME" }, { "SNP", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index 6c6af65..17e0a83 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -1718,6 +1718,16 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0 } } +#define CPU_AVX10_1_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \ + 0, 0, 1, 0, 0, 1, 0, 1, 1, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, \ + 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ + 1, 1, 0, 0, 0 } } + #define CPU_TSX_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |