diff options
| author | Jan Beulich <jbeulich@suse.com> | 2023-07-04 17:00:15 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2023-07-04 17:00:15 +0200 |
| commit | 07d618b91f50816f198abac7df116e83d47ca1be (patch) | |
| tree | 17ebc7e92cc911720a1304a3171414bf133da041 /opcodes | |
| parent | bb2bd584f31a25ba1cfe5bdac4d07d8cffe87c3d (diff) | |
| download | gdb-07d618b91f50816f198abac7df116e83d47ca1be.zip gdb-07d618b91f50816f198abac7df116e83d47ca1be.tar.gz gdb-07d618b91f50816f198abac7df116e83d47ca1be.tar.bz2 | |
x86: re-work EVEX-z-without-masking check
Rather than corrupting disassmbly altogether, flag EVEX.z set as bad
when masking isn't in effect in the first place at the time the
destination operand is actually processed.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/i386-dis.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 15a0e1b..690e336 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -9905,9 +9905,15 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax) oappend (&ins, "{"); oappend_register (&ins, reg_name); oappend (&ins, "}"); + + if (ins.vex.zeroing) + oappend (&ins, "{z}"); + } + else if (ins.vex.zeroing) + { + oappend (&ins, "{bad}"); + continue; } - if (ins.vex.zeroing) - oappend (&ins, "{z}"); /* S/G insns require a mask and don't allow zeroing-masking. */ @@ -9985,14 +9991,6 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax) goto out; } - /* If EVEX.z is set, there must be an actual mask register in use. */ - if (ins.vex.zeroing && ins.vex.mask_register_specifier == 0) - { - i386_dis_printf (info, dis_style_text, "(bad)"); - ret = ins.end_codep - priv.the_buffer; - goto out; - } - switch (dp->prefix_requirement) { case PREFIX_DATA: |