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| author | Jan Beulich <jbeulich@suse.com> | 2019-11-08 09:04:09 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2019-11-08 09:04:09 +0100 |
| commit | 00cee14fbad24453ff56656c5726ef5e4b0de588 (patch) | |
| tree | 1b4bbeafdf3970582fbe95e092b178bacf070cd2 /opcodes/i386-opc.h | |
| parent | bab6aec1255ba2ec8de3ae0363958e2ff26ce25d (diff) | |
| download | gdb-00cee14fbad24453ff56656c5726ef5e4b0de588.zip gdb-00cee14fbad24453ff56656c5726ef5e4b0de588.tar.gz gdb-00cee14fbad24453ff56656c5726ef5e4b0de588.tar.bz2 | |
x86: convert SReg from bitfield to enumerator
This is to further shrink the operand type representation.
Diffstat (limited to 'opcodes/i386-opc.h')
| -rw-r--r-- | opcodes/i386-opc.h | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 5c49ac1..e8cf895 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -709,6 +709,7 @@ enum operand_class { ClassNone, Reg, /* GPRs and FP regs, distinguished by operand size */ + SReg, /* Segment register */ }; /* Position of operand_type bits. */ @@ -729,8 +730,6 @@ enum Debug, /* Test register */ Test, - /* Segment register */ - SReg, /* 1 bit immediate */ Imm1, /* 8 bit immediate */ @@ -824,7 +823,6 @@ typedef union i386_operand_type unsigned int control:1; unsigned int debug:1; unsigned int test:1; - unsigned int sreg:1; unsigned int imm1:1; unsigned int imm8:1; unsigned int imm8s:1; |