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author | Jan Beulich <jbeulich@suse.com> | 2019-11-08 09:03:23 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2019-11-08 09:03:23 +0100 |
commit | bab6aec1255ba2ec8de3ae0363958e2ff26ce25d (patch) | |
tree | efe48ee35c00c178caec897d69237980ef1f83cf /opcodes/i386-opc.h | |
parent | 831bd6aa3b2d5e36c94b89756f58bb99f35026ca (diff) | |
download | gdb-bab6aec1255ba2ec8de3ae0363958e2ff26ce25d.zip gdb-bab6aec1255ba2ec8de3ae0363958e2ff26ce25d.tar.gz gdb-bab6aec1255ba2ec8de3ae0363958e2ff26ce25d.tar.bz2 |
x86: introduce operand type "class"
Many operand types, in particular the various kinds of registers, can't
be combined with one another (neither in templates nor in register
entries), and hence it is not a good use of resources (memory as well as
execution time) to represent them as individual bits of a bit field.
Diffstat (limited to 'opcodes/i386-opc.h')
-rw-r--r-- | opcodes/i386-opc.h | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index e9b1f92..5c49ac1 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -702,12 +702,21 @@ typedef struct i386_opcode_modifier unsigned int intel64:1; } i386_opcode_modifier; +/* Operand classes. */ + +#define CLASS_WIDTH 4 +enum operand_class +{ + ClassNone, + Reg, /* GPRs and FP regs, distinguished by operand size */ +}; + /* Position of operand_type bits. */ enum { - /* Register (qualified by Byte, Word, etc) */ - Reg = 0, + /* Class */ + Class = CLASS_WIDTH - 1, /* MMX register */ RegMMX, /* Vector registers */ @@ -791,7 +800,7 @@ enum /* Bound register. */ RegBND, - /* The number of bitfields in i386_operand_type. */ + /* The number of bits in i386_operand_type. */ OTNum }; @@ -808,7 +817,7 @@ typedef union i386_operand_type { struct { - unsigned int reg:1; + unsigned int class:CLASS_WIDTH; unsigned int regmmx:1; unsigned int regsimd:1; unsigned int regmask:1; |