AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373)

The Cortex-A53 erratum currently has two ways it can resolve the erratum when
using the flag --fix-cortex-a53-843419:

1) If the address is within the range of an ADR instruction it rewrites the ADRP
   into an ADR, and those doesn't need the use of a veneer.

2) If the address is not within range, it adds a branch to a veneer which will
   execute the final bit of the erratum workaround and branch back to the call
   site.

When we do this we always generate the veneers and we always align the size of
the text section to 4KB.  This is because we only know which workaround we can
use after all linking has finished and all addresses are known.  This means even
though the veneers are not used, we still generate the section and we still
change the size of the input section.

This is problematic for small memory devices as this would require the user to
take about a ~4KB hit in memory even though it's not even used.

Since there's no real way to restart the linking process from the final write
phase this patch solves the issue by allowing the user more control over which
erratum workaround gets used.

Concretely this changes the option --fix-cortex-a53-843419 to take optional
arguments --fix-cortex-a53-843419[=full|adr|adrp]

- full (default): Use both ADRP and ADR workaround. This is equivalent to not
		  specifying any options and is the default behavior before this
		  patch.

- adr: Only use the ADR workaround, this will not cause any increase in binary
       size but linking will fail if the referenced address is out of range of
       an ADR instruction.

- adrp: Use only the ADRP workaround, this will never rewrite your ADRP.

In the cases where the user knows how big their binaries are the `adr` option
would prevent the unneeded overhead.

bfd/ChangeLog:

	PR ld/24373
	* bfd-in.h (enum erratum_84319_opts): New
	(bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change
	int to enum erratum_84319_opts.
	* bfd-in2.h: Regenerate.
	* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change
	fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr.
	(_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub.
	(aarch64_size_one_stub): Conditionally size erratum 843419 stubs.
	(_bfd_aarch64_resize_stubs): Amend comment.
	(elfNN_aarch64_size_stubs): Don't generate stubs when no workaround
	requested.
	(bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum.
	(_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of
	erratum workaround.
	(clear_erratum_843419_entry): Update erratum conditional.

ld/ChangeLog:

	PR ld/24373
	* emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args
	to flags.
	* NEWS: Add changes to flag.
	(PARSE_AND_LIST_OPTIONS): Update help descriptions.
	(PARSE_AND_LIST_ARGS_CASES): Add new options to parser.
	* testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests.
	* testsuite/ld-aarch64/erratum843419-adr.d: New test.
	* testsuite/ld-aarch64/erratum843419-adrp.d: New test.
	* testsuite/ld-aarch64/erratum843419-far-adr.d: New test.
	* testsuite/ld-aarch64/erratum843419-far-full.d: New test.
	* testsuite/ld-aarch64/erratum843419-far.s: New test.
	* testsuite/ld-aarch64/erratum843419-full.d: New test.
	* testsuite/ld-aarch64/erratum843419-near.s: New test.
	* testsuite/ld-aarch64/erratum843419-no-args.d: New test.

12 files changed, 178 insertions, 4 deletions

diff --git a/ld/ChangeLog b/ld/ChangeLog
index e038e40..77beea0 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,21 @@
+2019-05-21  Tamar Christina  <tamar.christina@arm.com>
+
+	PR ld/24373
+	* emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args
+	to flags.
+	* NEWS: Add changes to flag.
+	(PARSE_AND_LIST_OPTIONS): Update help descriptions.
+	(PARSE_AND_LIST_ARGS_CASES): Add new options to parser.
+	* testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests.
+	* testsuite/ld-aarch64/erratum843419-adr.d: New test.
+	* testsuite/ld-aarch64/erratum843419-adrp.d: New test.
+	* testsuite/ld-aarch64/erratum843419-far-adr.d: New test.
+	* testsuite/ld-aarch64/erratum843419-far-full.d: New test.
+	* testsuite/ld-aarch64/erratum843419-far.s: New test.
+	* testsuite/ld-aarch64/erratum843419-full.d: New test.
+	* testsuite/ld-aarch64/erratum843419-near.s: New test.
+	* testsuite/ld-aarch64/erratum843419-no-args.d: New test.
+
 2019-05-21  Senthil Kumar Selvaraj  <senthilkumar.selvaraj@microchip.com>
 
 	PR ld/24571
diff --git a/ld/NEWS b/ld/NEWS
index de2cd16..3a41e9f 100644
--- a/ld/NEWS
+++ b/ld/NEWS
@@ -2,6 +2,12 @@
 
 * Add command-line option --no-print-map-discarded.
 
+* The Cortex-A53 Erratum 843419 workaround now supports a choice of which
+  workaround to use.  The option --fix-cortex-a53-843419 now takes an
+  optional argument --fix-cortex-a53-843419[=full|adr|adrp] which can be
+  used to force a particular workaround to be used.  See --help for AArch64
+  for more details.
+
 Changes in 2.33:
 
 * Add target handlers for AArch64 for ELF GNU program properties.
diff --git a/ld/emultempl/aarch64elf.em b/ld/emultempl/aarch64elf.em
index bfe8d1b..b59623e 100644
--- a/ld/emultempl/aarch64elf.em
+++ b/ld/emultempl/aarch64elf.em
@@ -31,7 +31,7 @@ static int no_enum_size_warning = 0;
 static int no_wchar_size_warning = 0;
 static int pic_veneer = 0;
 static int fix_erratum_835769 = 0;
-static int fix_erratum_843419 = 0;
+static erratum_84319_opts fix_erratum_843419 = ERRAT_NONE;
 static int no_apply_dynamic_relocs = 0;
 static aarch64_plt_type plt_type = PLT_NORMAL;
 static aarch64_enable_bti_type bti_type = BTI_NONE;
@@ -385,7 +385,7 @@ PARSE_AND_LIST_LONGOPTS='
   { "stub-group-size", required_argument, NULL, OPTION_STUBGROUP_SIZE },
   { "no-wchar-size-warning", no_argument, NULL, OPTION_NO_WCHAR_SIZE_WARNING},
   { "fix-cortex-a53-835769", no_argument, NULL, OPTION_FIX_ERRATUM_835769},
-  { "fix-cortex-a53-843419", no_argument, NULL, OPTION_FIX_ERRATUM_843419},
+  { "fix-cortex-a53-843419", optional_argument, NULL, OPTION_FIX_ERRATUM_843419},
   { "no-apply-dynamic-relocs", no_argument, NULL, OPTION_NO_APPLY_DYNAMIC_RELOCS},
   { "force-bti", no_argument, NULL, OPTION_FORCE_BTI},
   { "pac-plt", no_argument, NULL, OPTION_PAC_PLT},
@@ -407,7 +407,17 @@ PARSE_AND_LIST_OPTIONS='
                                 Values of +/-1 indicate the linker should\n\
                                 choose suitable defaults.\n"));
   fprintf (file, _("  --fix-cortex-a53-835769      Fix erratum 835769\n"));
-  fprintf (file, _("  --fix-cortex-a53-843419      Fix erratum 843419\n"));
+  fprintf (file, _("\
+  --fix-cortex-a53-843419[=full|adr|adrp]      Fix erratum 843419 and optionally specify which workaround to use.\n\
+                                               full (default): Use both ADRP and ADR workaround, this will \n\
+                                                 increase the size of your binaries.\n\
+                                               adr: Only use the ADR workaround, this will not cause any increase\n\
+                                                 in binary size but linking will fail if the referenced address is\n\
+                                                 out of range of an ADR instruction.  This will remove the need of using\n\
+                                                 a veneer and results in both performance and size benefits.\n\
+                                               adrp: Use only the ADRP workaround, this will never rewrite your ADRP\n\
+                                                 instruction into an ADR.  As such the workaround will always use a\n\
+                                                 veneer and this will give you both a performance and size overhead.\n"));
   fprintf (file, _("  --no-apply-dynamic-relocs    Do not apply link-time values for dynamic relocations\n"));
   fprintf (file, _("  --force-bti                  Turn on Branch Target Identification mechanism and generate PLTs with BTI. Generate warnings for missing BTI on inputs\n"));
   fprintf (file, _("  --pac-plt                    Protect PLTs with Pointer Authentication.\n"));
@@ -435,7 +445,19 @@ PARSE_AND_LIST_ARGS_CASES='
       break;
 
     case OPTION_FIX_ERRATUM_843419:
-      fix_erratum_843419 = 1;
+      fix_erratum_843419 = ERRAT_ADR | ERRAT_ADRP;
+      if (optarg && *optarg)
+	{
+	  if (strcmp ("full", optarg) == 0)
+	    fix_erratum_843419 = ERRAT_ADR | ERRAT_ADRP;
+	  else if (strcmp ("adrp", optarg) == 0)
+	    fix_erratum_843419 = ERRAT_ADRP;
+	  else if (strcmp ("adr", optarg) == 0)
+	    fix_erratum_843419 = ERRAT_ADR;
+	  else
+	    einfo (_("%P: error: unrecognized option for "
+		     "--fix-cortex-a53-843419: %s\n"), optarg);
+	}
       break;
 
     case OPTION_NO_APPLY_DYNAMIC_RELOCS:
diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp
index e69aedd..1e4c38e 100644
--- a/ld/testsuite/ld-aarch64/aarch64-elf.exp
+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp
@@ -87,6 +87,12 @@ run_ld_link_tests eh-frame-merge-lp64
 
 run_dump_test "erratum843419"
 run_dump_test "erratum843419_tls_ie"
+run_dump_test "erratum843419-adr"
+run_dump_test "erratum843419-adrp"
+run_dump_test "erratum843419-far-adr"
+run_dump_test "erratum843419-far-full"
+run_dump_test "erratum843419-full"
+run_dump_test "erratum843419-no-args"
 
 # Relocation Tests
 run_dump_test_lp64 "weak-undefined"
diff --git a/ld/testsuite/ld-aarch64/erratum843419-adr.d b/ld/testsuite/ld-aarch64/erratum843419-adr.d
new file mode 100644
index 0000000..ab4fe27
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/erratum843419-adr.d
@@ -0,0 +1,15 @@
+#source: erratum843419-near.s
+#as:
+#ld: -Ttext=0x400000 --fix-cortex-a53-843419=adr
+#objdump: -dr
+#...
+
+Disassembly of section \.text:
+
+0*400000 <_start>:
+	...
+  400ffc:	10038020 	adr	x0, 408000 <_start\+0x8000>
+  401000:	f9000042 	str	x2, \[x2\]
+  401004:	d2800002 	mov	x2, #0x0                   	// #0
+  401008:	f9402001 	ldr	x1, \[x0, #64\]
+  40100c:	d503201f 	nop
diff --git a/ld/testsuite/ld-aarch64/erratum843419-adrp.d b/ld/testsuite/ld-aarch64/erratum843419-adrp.d
new file mode 100644
index 0000000..371201c
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/erratum843419-adrp.d
@@ -0,0 +1,22 @@
+#source: erratum843419-near.s
+#as:
+#ld: -Ttext=0x400000 --fix-cortex-a53-843419=adrp
+#objdump: -dr
+#...
+
+Disassembly of section \.text:
+
+0*400000 <_start>:
+	...
+  400ffc:	90000040 	adrp	x0, 408000 <e843419@0002_00000010_1008\+0x6fe8>
+  401000:	f9000042 	str	x2, \[x2\]
+  401004:	d2800002 	mov	x2, #0x0                   	// #0
+  401008:	14000004 	b	401018 <e843419@0002_00000010_1008>
+  40100c:	d503201f 	nop
+  401010:	14000400 	b	402010 <e843419@0002_00000010_1008\+0xff8>
+  401014:	d503201f 	nop
+
+0*401018 <e843419@0002_00000010_1008>:
+  401018:	f9402001 	ldr	x1, \[x0, #64\]
+  40101c:	17fffffc 	b	40100c <_start\+0x100c>
+	...
diff --git a/ld/testsuite/ld-aarch64/erratum843419-far-adr.d b/ld/testsuite/ld-aarch64/erratum843419-far-adr.d
new file mode 100644
index 0000000..acddea7
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/erratum843419-far-adr.d
@@ -0,0 +1,5 @@
+#source: erratum843419-far.s
+#as:
+#ld: -Ttext=0x400000 --fix-cortex-a53-843419=adr
+#error: .*: erratum 843419 immediate 0x7ffff004 out of range for ADR \(input file too large\) and \-\-fix\-cortex\-a53\-843419=adr used\.  Run the linker with \-\-fix\-cortex\-a53\-843419=full instead.*
+#...
diff --git a/ld/testsuite/ld-aarch64/erratum843419-far-full.d b/ld/testsuite/ld-aarch64/erratum843419-far-full.d
new file mode 100644
index 0000000..24f2be5
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/erratum843419-far-full.d
@@ -0,0 +1,22 @@
+#source: erratum843419-far.s
+#as:
+#ld: -Ttext=0x400000 --fix-cortex-a53-843419=full
+#objdump: -dr
+#...
+
+Disassembly of section \.text:
+
+0*400000 <_start>:
+	...
+  400ffc:	90400000 	adrp	x0, 80400000 <__bss_end__\+0x7ffedff0>
+  401000:	f9000042 	str	x2, \[x2\]
+  401004:	d2800002 	mov	x2, #0x0                   	// #0
+  401008:	14000004 	b	401018 <e843419@0002_00000010_1008>
+  40100c:	d503201f 	nop
+  401010:	14000400 	b	402010 <e843419@0002_00000010_1008\+0xff8>
+  401014:	d503201f 	nop
+
+0*401018 <e843419@0002_00000010_1008>:
+  401018:	f9402001 	ldr	x1, \[x0, #64\]
+  40101c:	17fffffc 	b	40100c <_start\+0x100c>
+	...
diff --git a/ld/testsuite/ld-aarch64/erratum843419-far.s b/ld/testsuite/ld-aarch64/erratum843419-far.s
new file mode 100644
index 0000000..21f1b37
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/erratum843419-far.s
@@ -0,0 +1,9 @@
+.balign 0x1000
+.globl _start
+_start:
+        .skip 0xffc
+        adrp x0, _start + 0x80000000
+        str x2, [x2]
+        mov x2, #0
+        ldr x1, [x0, #0x40]
+        nop
diff --git a/ld/testsuite/ld-aarch64/erratum843419-full.d b/ld/testsuite/ld-aarch64/erratum843419-full.d
new file mode 100644
index 0000000..508216d
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/erratum843419-full.d
@@ -0,0 +1,20 @@
+#source: erratum843419-near.s
+#as:
+#ld: -Ttext=0x400000 --fix-cortex-a53-843419=full
+#objdump: -dr
+#...
+
+Disassembly of section \.text:
+
+0*400000 <_start>:
+	...
+  400ffc:	10038020 	adr	x0, 408000 <_start\+0x8000>
+  401000:	f9000042 	str	x2, \[x2\]
+  401004:	d2800002 	mov	x2, #0x0                   	// #0
+  401008:	f9402001 	ldr	x1, \[x0, #64\]
+  40100c:	d503201f 	nop
+  401010:	14000400 	b	402010 <_start\+0x2010>
+  401014:	d503201f 	nop
+  401018:	f9402001 	ldr	x1, \[x0, #64\]
+  40101c:	17fffffc 	b	40100c <_start\+0x100c>
+	...
diff --git a/ld/testsuite/ld-aarch64/erratum843419-near.s b/ld/testsuite/ld-aarch64/erratum843419-near.s
new file mode 100644
index 0000000..262cd16
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/erratum843419-near.s
@@ -0,0 +1,9 @@
+.balign 0x1000
+.globl _start
+_start:
+        .skip 0xffc
+        adrp x0, _start + 0x8000
+        str x2, [x2]
+        mov x2, #0
+        ldr x1, [x0, #0x40]
+        nop
diff --git a/ld/testsuite/ld-aarch64/erratum843419-no-args.d b/ld/testsuite/ld-aarch64/erratum843419-no-args.d
new file mode 100644
index 0000000..30773f6
--- /dev/null
+++ b/ld/testsuite/ld-aarch64/erratum843419-no-args.d
@@ -0,0 +1,20 @@
+#source: erratum843419-near.s
+#as:
+#ld: -Ttext=0x400000 --fix-cortex-a53-843419
+#objdump: -dr
+#...
+
+Disassembly of section \.text:
+
+0*400000 <_start>:
+	...
+  400ffc:	10038020 	adr	x0, 408000 <_start\+0x8000>
+  401000:	f9000042 	str	x2, \[x2\]
+  401004:	d2800002 	mov	x2, #0x0                   	// #0
+  401008:	f9402001 	ldr	x1, \[x0, #64\]
+  40100c:	d503201f 	nop
+  401010:	14000400 	b	402010 <_start\+0x2010>
+  401014:	d503201f 	nop
+  401018:	f9402001 	ldr	x1, \[x0, #64\]
+  40101c:	17fffffc 	b	40100c <_start\+0x100c>
+	...