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| author | Tamar Christina <tamar.christina@arm.com> | 2019-05-21 11:03:45 +0100 |
|---|---|---|
| committer | Tamar Christina <tamar.christina@arm.com> | 2019-05-21 11:05:22 +0100 |
| commit | fab7c86ea474291776621eba042132f47af124e1 (patch) | |
| tree | c9f78606a3d9f134d95c863e5dd4ba09b9079b5d /ld | |
| parent | ce3ebcaae382a3f95530d633e6875f97e53ef273 (diff) | |
| download | gdb-fab7c86ea474291776621eba042132f47af124e1.zip gdb-fab7c86ea474291776621eba042132f47af124e1.tar.gz gdb-fab7c86ea474291776621eba042132f47af124e1.tar.bz2 | |
AArch64: Add SVE DWARF registers
The SVE DRAWF register names are missing from binutils, this may cause objdump
and readelf to ignore certain DRAWF output as the registers are unknown (most
notably CIEs).
This patch adds the registers in accordance to the "DWARF for ARM(r) 64-bit
Architecture (AARch64) with SVE support" documentation [1].
[1] https://developer.arm.com/docs/100985/latest/dwarf-for-the-arm-64-bit-architecture-aarch64-with-sve-support
binutils/ChangeLog:
* dwarf.c (dwarf_regnames_aarch64): Add SVE registers.
* testsuite/binutils-all/aarch64/sve-dwarf-registers.d: New test.
* testsuite/binutils-all/aarch64/sve-dwarf-registers.s: New test.
Diffstat (limited to 'ld')
0 files changed, 0 insertions, 0 deletions