diff options
Diffstat (limited to 'gcc/testsuite')
1074 files changed, 26140 insertions, 4843 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7cb2440..db4d560 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,2346 @@ +2025-08-02 Martin Uecker <uecker@tugraz.at> + + * gcc.dg/Warray-parameter-11.c: Change Warray-parameter to + -Wvla-parameter as these are VLAs. + * gcc.dg/Warray-parameter.c: Remove xfail. + +2025-08-01 Artemiy Granat <a.granat@ispras.ru> + + * gcc.target/i386/attributes-error.c: Change incorrect + sseregparm,fastcall combination to cdecl,fastcall. + +2025-08-01 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/121322 + * gcc.dg/pr121322.c: New test. + +2025-08-01 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/108080 + * g++.dg/modules/pr108080.H: New test. + +2025-08-01 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/121238 + * g++.dg/modules/merge-19.h: New test. + * g++.dg/modules/merge-19_a.H: New test. + * g++.dg/modules/merge-19_b.C: New test. + +2025-07-31 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/121314 + * gm2/errors/fail/badindrtype.mod: New test. + * gm2/errors/fail/badindrtype2.mod: New test. + +2025-07-31 Mikael Morin <morin-mikael@orange.fr> + + PR fortran/121342 + * gfortran.dg/class_elemental_1.f90: New test. + +2025-07-31 Jason Merrill <jason@redhat.com> + + PR c++/120800 + * g++.dg/cpp0x/constexpr-array30.C: New test. + +2025-07-31 Marek Polacek <polacek@redhat.com> + + PR c++/120775 + * g++.dg/cpp26/consteval-block1.C: New test. + * g++.dg/cpp26/consteval-block2.C: New test. + * g++.dg/cpp26/consteval-block3.C: New test. + * g++.dg/cpp26/consteval-block4.C: New test. + * g++.dg/cpp26/consteval-block5.C: New test. + * g++.dg/cpp26/consteval-block6.C: New test. + * g++.dg/cpp26/consteval-block7.C: New test. + * g++.dg/cpp26/consteval-block8.C: New test. + +2025-07-31 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check + for signed avg ceil. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test + helper macros. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add + test data for run test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i8.c: New test. + +2025-07-31 Artemiy Granat <a.granat@ispras.ru> + + * gcc.target/i386/attributes-error.c: Add more attributes + combinations. + +2025-07-31 Artemiy Granat <a.granat@ispras.ru> + + * g++.dg/abi/regparm1.C: Require ia32 target. + * gcc.target/i386/20020224-1.c: Likewise. + * gcc.target/i386/pr103785.c: Use regparm attribute only if + not in 64-bit mode. + * gcc.target/i386/pr36533.c: Likewise. + * gcc.target/i386/pr59099.c: Likewise. + * gcc.target/i386/sibcall-8.c: Likewise. + * gcc.target/i386/sw-1.c: Likewise. + * gcc.target/i386/pr15184-2.c: Fix invalid comment. + * gcc.target/i386/attributes-ignore.c: New test. + +2025-07-31 Yury Khrustalev <yury.khrustalev@arm.com> + + * g++.target/aarch64/mv-cpu-features.C: new test. + +2025-07-31 Yury Khrustalev <yury.khrustalev@arm.com> + + * gcc.target/aarch64/ifunc-resolver.in: add core test functions. + * gcc.target/aarch64/ifunc-resolver-0.c: new test. + * gcc.target/aarch64/ifunc-resolver-1.c: ditto. + * gcc.target/aarch64/ifunc-resolver-2.c: ditto. + * gcc.target/aarch64/ifunc-resolver-3.c: ditto. + * gcc.target/aarch64/ifunc-resolver-4.c: as above. + +2025-07-31 Spencer Abson <spencer.abson@arm.com> + + PR target/121028 + * gcc.target/aarch64/sme/call_sm_switch_1.c: Tell check-function + -bodies not to ignore .inst directives, and replace the test for + "smstart sm" with one for it's encoding. + * gcc.target/aarch64/sme/call_sm_switch_11.c: Likewise. + * gcc.target/aarch64/sme/pr121028.c: New test. + +2025-07-31 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/121264 + * gcc.dg/tree-ssa/pr121264.c: New test. + +2025-07-31 Spencer Abson <spencer.abson@arm.com> + + * gcc.target/aarch64/sme2/acle-asm/amax_f16_x2.c: Gate do-assemble on + assembler support for +faminmax and +sme2. + * gcc.target/aarch64/sme2/acle-asm/amax_f16_x4.c: Likewise. + * gcc.target/aarch64/sme2/acle-asm/amax_f32_x2.c: Likewise. + * gcc.target/aarch64/sme2/acle-asm/amax_f32_x4.c: Likewise. + * gcc.target/aarch64/sme2/acle-asm/amax_f64_x2.c: Likewise. + * gcc.target/aarch64/sme2/acle-asm/amax_f64_x4.c: Likewise. + * gcc.target/aarch64/sme2/acle-asm/amin_f16_x2.c: Likewise. + * gcc.target/aarch64/sme2/acle-asm/amin_f16_x4.c: Likewise. + * gcc.target/aarch64/sme2/acle-asm/amin_f32_x2.c: Likewise. + * gcc.target/aarch64/sme2/acle-asm/amin_f32_x4.c: Likewise. + * gcc.target/aarch64/sme2/acle-asm/amin_f64_x2.c: Likewise. + * gcc.target/aarch64/sme2/acle-asm/amin_f64_x4.c: Likewise. + * lib/target-supports.exp: Split the extensions that require SME into + a separate set, and use armv9-a as their baseline. + +2025-07-31 Jakub Jelinek <jakub@redhat.com> + + * gcc.target/i386/apx-1.c (apx_hanlder): Rename to ... + (apx_handler): ... this. + * gcc.target/i386/uintr-2.c (UINTR_hanlder): Rename to ... + (UINTR_handler): ... this. + * gcc.target/i386/uintr-5.c (UINTR_hanlder): Rename to ... + (UINTR_handler): ... this. + +2025-07-30 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/121291 + * g++.dg/ext/is_invocable7.C: New test. + * g++.dg/ext/is_nothrow_convertible5.C: New test. + +2025-07-30 Jason Merrill <jason@redhat.com> + + * g++.dg/tc1/dr49.C: Adjust diagnostic. + * g++.dg/template/func2.C: Likewise. + * g++.dg/cpp1z/nontype8.C: New test. + +2025-07-30 Andrew Pinski <quic_apinski@quicinc.com> + + PR tree-optimization/121236 + PR tree-optimization/121295 + * gcc.dg/torture/pr121236-1.c: New test. + * gcc.dg/torture/pr121295-1.c: New test. + +2025-07-30 Andrew Pinski <quic_apinski@quicinc.com> + + Revert: + 2025-07-30 Andrew Pinski <quic_apinski@quicinc.com> + + PR tree-optimization/121236 + * gcc.dg/torture/pr121236-1.c: New test. + +2025-07-30 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org> + + * gcc.target/s390/spaceship-fp-1.c: New test. + * gcc.target/s390/spaceship-fp-2.c: New test. + * gcc.target/s390/spaceship-fp-3.c: New test. + * gcc.target/s390/spaceship-fp-4.c: New test. + * gcc.target/s390/spaceship-int-1.c: New test. + * gcc.target/s390/spaceship-int-2.c: New test. + * gcc.target/s390/spaceship-int-3.c: New test. + +2025-07-30 H.J. Lu <hjl.tools@gmail.com> + + PR target/120427 + * gcc.target/i386/pr120427-5.c: New test. + +2025-07-30 Jan Hubicka <jh@suse.cz> + + * g++.dg/tree-prof/eh1.C: New test. + +2025-07-30 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121130 + * gcc.dg/vect/vect-simd-pr121130.c: New testcase. + +2025-07-30 Jakub Jelinek <jakub@redhat.com> + + PR c++/121133 + * g++.dg/warn/pr121133-1.C: New test. + * g++.dg/warn/pr121133-2.C: New test. + * g++.dg/warn/pr121133-3.C: New test. + * g++.dg/warn/pr121133-4.C: New test. + +2025-07-30 Jakub Jelinek <jakub@redhat.com> + + PR c++/120778 + * g++.dg/cpp/if-comma-1.C: New test. + +2025-07-30 Pengfei Li <Pengfei.Li2@arm.com> + + PR tree-optimization/121020 + * gcc.dg/vect/vect-early-break_138-pr121020.c: New test. + +2025-07-30 Pengfei Li <Pengfei.Li2@arm.com> + + PR tree-optimization/121190 + * gcc.dg/vect/vect-early-break_52.c: Update an unsafe test. + * gcc.dg/vect/vect-early-break_137-pr121190.c: New test. + +2025-07-30 Alfie Richards <alfie.richards@arm.com> + + PR target/121300 + * gcc.target/aarch64/pr121300.c: New test. + +2025-07-30 Spencer Abson <spencer.abson@arm.com> + + * gcc.target/aarch64/sve/unpacked_cond_fmla_1.c: Add test cases + for merging with multiplcand. + * gcc.target/aarch64/sve/unpacked_cond_fmls_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fnmla_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fnmls_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fmla_2.c: New test. + * gcc.target/aarch64/sve/unpacked_cond_fmls_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fnmla_2.c: Likewise.. + * gcc.target/aarch64/sve/unpacked_cond_fnmls_2.c: Likewise. + * g++.target/aarch64/sve/unpacked_cond_ternary_bf16_1.C: Likewise. + * g++.target/aarch64/sve/unpacked_cond_ternary_bf16_2.C: Likewise. + +2025-07-30 Spencer Abson <spencer.abson@arm.com> + + * gcc.target/aarch64/sve/unpacked_cond_fmla_1.c: New test. + * gcc.target/aarch64/sve/unpacked_cond_fmls_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fnmla_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fnmls_1.c: Likewise. + +2025-07-30 Yuao Ma <c8ef@outlook.com> + + * gfortran.dg/split_1.f90: New test. + * gfortran.dg/split_2.f90: New test. + * gfortran.dg/split_3.f90: New test. + * gfortran.dg/split_4.f90: New test. + +2025-07-30 Spencer Abson <spencer.abson@arm.com> + + * g++.target/aarch64/sve/unpacked_ternary_bf16_1.C: New test. + * g++.target/aarch64/sve/unpacked_ternary_bf16_2.C: Likewise. + * gcc.target/aarch64/sve/unpacked_fmla_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fmla_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fmls_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fmls_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fnmla_1.c: Likeiwse. + * gcc.target/aarch64/sve/unpacked_fnmla_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fnmls_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fnmls_2.c: Likewise. + +2025-07-30 liuhongt <hongtao.liu@intel.com> + + * gcc.target/i386/pr121274.c: New test. + +2025-07-30 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Add asm check + for unsigned avg ceil. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test + helper macros. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add + test data. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u8.c: New test. + +2025-07-29 Andrew Pinski <quic_apinski@quicinc.com> + + PR testsuite/121215 + * lib/profopt.exp (profopt-execute): Call cleanup-after-saved-dg-test + if returning early for the -fauto-profile case failing case. + +2025-07-29 Spencer Abson <spencer.abson@arm.com> + + * g++.target/aarch64/sve/unpacked_cond_binary_bf16_2.C: New test. + * gcc.target/aarch64/sve/unpacked_cond_builtin_fmax_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_builtin_fmin_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fadd_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fdiv_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fmaxnm_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fminnm_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fmul_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fsubr_2.c: Likewise. + +2025-07-29 H.J. Lu <hjl.tools@gmail.com> + + PR target/121208 + * gcc.target/i386/pr121208-1a.c (dg-options): Add -mno-80387. + * gcc.target/i386/pr121208-1b.c (dg-options): Likewise. + +2025-07-29 Juergen Christ <jchrist@linux.ibm.com> + + PR testsuite/121286 + PR testsuite/121288 + * gcc.dg/vect/pr112325.c: Adjust parameters for s390. + * gcc.dg/vect/pr117888-1.c: Ditto. + +2025-07-29 Richard Sandiford <richard.sandiford@arm.com> + + * gcc.target/aarch64/saturating_arithmetic_1.c: Allow w0 and w1 + to be duplicated in either order. + * gcc.target/aarch64/saturating_arithmetic_2.c: Likewise. + +2025-07-29 Richard Sandiford <richard.sandiford@arm.com> + + * gcc.target/aarch64/cmpbr.c: Support both operand orders + for 8-bit and 16-bit comparisons. + +2025-07-29 Konstantinos Eleftheriou <konstantinos.eleftheriou@vrull.eu> + + PR rtl-optimization/120660 + * gcc.dg/pr120660.c: New test. + +2025-07-29 Konstantinos Eleftheriou <konstantinos.eleftheriou@vrull.eu> + + PR rtl-optimization/119795 + * gcc.target/i386/pr119795.c: New test. + +2025-07-29 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u64.c: Add rv64 + target for run. + * gcc.target/riscv/sat/sat_u_mul-run-1-u32-from-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_mul-1-u16-from-u32.c: New test. + * gcc.target/riscv/sat/sat_u_mul-1-u8-from-u16.c: New test. + * gcc.target/riscv/sat/sat_u_mul-1-u8-from-u32.c: New test. + * gcc.target/riscv/sat/sat_u_mul-2-u16-from-u64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-2-u32-from-u64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-2-u8-from-u64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u32.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u16.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u32.c: New test. + +2025-07-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/120687 + * gcc.dg/vect/pr120687-3.c: New testcase. + +2025-07-29 Nathaniel Shead <nathanieloshead@gmail.com> + + PR testsuite/121285 + * g++.dg/modules/class-11_a.H: Make static_asserts valid for + C++14. + +2025-07-29 Richard Biener <rguenther@suse.de> + + PR tree-optimization/120687 + * gcc.dg/vect/pr120687-1.c: New testcase. + * gcc.dg/vect/pr120687-2.c: Likewise. + +2025-07-29 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/121289 + * gm2/warnings/style/fail/badvarname.mod: New test. + * gm2/warnings/style/fail/warnings-style-fail.exp: New test. + +2025-07-29 Christophe Lyon <christophe.lyon@linaro.org> + + * gcc.dg/pr116906-1.c: Add 'dg-do run'. + * gcc.dg/pr116906-2.c: Likewise. + * gcc.dg/pr78185.c: Likewise. + +2025-07-29 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/121159 + * c-c++-common/pr121159.c: New test. + * gcc.dg/plugin/must-tail-call-2.c (test_5): Don't expect an error. + +2025-07-29 Andrew Pinski <quic_apinski@quicinc.com> + + PR middle-end/120523 + * gcc.dg/tree-ssa/cswtch-7.c: New test. + +2025-07-28 Andrew Pinski <quic_apinski@quicinc.com> + + PR tree-optimization/121236 + * gcc.dg/torture/pr121236-1.c: New test. + +2025-07-28 H.J. Lu <hjl.tools@gmail.com> + + PR target/121208 + * gcc.target/i386/pr121208-1a.c: New test. + * gcc.target/i386/pr121208-1b.c: Likewise. + * gcc.target/i386/pr121208-2a.c: Likewise. + * gcc.target/i386/pr121208-2b.c: Likewise. + * gcc.target/i386/pr121208-3a.c: Likewise. + * gcc.target/i386/pr121208-3b.c: Likewise. + +2025-07-28 Thomas Schwinge <tschwinge@baylibre.com> + + * gcc.target/nvptx/march-map=sm_100.c: New. + * gcc.target/nvptx/march-map=sm_100a.c: Likewise. + * gcc.target/nvptx/march-map=sm_100f.c: Likewise. + * gcc.target/nvptx/march-map=sm_101.c: Likewise. + * gcc.target/nvptx/march-map=sm_101a.c: Likewise. + * gcc.target/nvptx/march-map=sm_101f.c: Likewise. + * gcc.target/nvptx/march-map=sm_103.c: Likewise. + * gcc.target/nvptx/march-map=sm_103a.c: Likewise. + * gcc.target/nvptx/march-map=sm_103f.c: Likewise. + * gcc.target/nvptx/march-map=sm_120.c: Likewise. + * gcc.target/nvptx/march-map=sm_120a.c: Likewise. + * gcc.target/nvptx/march-map=sm_120f.c: Likewise. + * gcc.target/nvptx/march-map=sm_121.c: Likewise. + * gcc.target/nvptx/march-map=sm_121a.c: Likewise. + * gcc.target/nvptx/march-map=sm_121f.c: Likewise. + +2025-07-28 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121256 + * gcc.dg/vect/vect-recurr-pr121256.c: New testcase. + * gcc.dg/vect/vect-recurr-pr121256-2.c: Likewise. + +2025-07-27 Mikael Morin <mikael@gcc.gnu.org> + + PR fortran/121185 + * gfortran.dg/assign_14.f90: New test. + +2025-07-27 Mikael Morin <mikael@gcc.gnu.org> + + PR fortran/121185 + * gfortran.dg/assign_13.f90: New test. + +2025-07-27 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i8.c: New test. + +2025-07-27 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c: Add asm check. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c: Ditto. + +2025-07-27 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test helper + macros. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test + data for run test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i8.c: New test. + +2025-07-27 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f16.c: + Add zvfh requirements and options. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f16.c: + Ditto. + +2025-07-27 Nathaniel Shead <nathanieloshead@gmail.com> + + * g++.dg/modules/class-11_a.H: New test. + * g++.dg/modules/class-11_b.C: New test. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/diagnostic_plugin_test_graphs.cc: Eliminate + digraphs::lazy_digraph and digraphs::lazy_digraphs in favor of + lazily_created template. + * gcc.dg/plugin/diagnostic_plugin_test_metadata.cc: Define + INCLUDE_VECTOR since diagnostics/metadata.h now requires it. + * gcc.dg/plugin/diagnostic_plugin_test_paths.cc: Likewise. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/diagnostic_plugin_show_trees.cc: Make + diagnostics::context::m_source_printing private. + * gcc.dg/plugin/diagnostic_plugin_test_inlining.cc: Likewise. + * gcc.dg/plugin/diagnostic_plugin_test_string_literals.cc: + Likewise. + * gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.cc: + Likewise. + * gcc.dg/plugin/diagnostic_plugin_test_paths.cc: Likewise. + * gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc: Likewise. + * gcc.dg/plugin/expensive_selftests_plugin.cc: Likewise. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * g++.dg/plugin/show_template_tree_color_plugin.cc: Update usage + of "diagnostic_info" to explicitly refer to + "diagnostics::diagnostic_info". + * gcc.dg/plugin/diagnostic_group_plugin.cc: Likewise. + * gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc: Likewise. + * gcc.dg/plugin/location_overflow_plugin.cc: Likewise. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc: Update for + file_cache and char_span moving from input.h to + diagnostics/file-cache.h and into the "diagnostics::" namespace. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc: Update for + diagnostic_t becoming enum class diagnostics::kind. + * gcc.dg/plugin/expensive_selftests_plugin.cc: Likewise. + * gcc.dg/plugin/location_overflow_plugin.cc: Likewise. + * lib/gcc-dg.exp: Likewise. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/expensive_selftests_plugin.cc: Update for change + from edit-context.h to changes.h. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/expensive_selftests_plugin.cc: Update for move of + selftest::test_diagnostic_context to + diagnostics::selftest::test_context. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/analyzer_cpython_plugin.cc: Update for move of + diagnostic-color.h to diagnostics/color.h. + * gcc.dg/plugin/analyzer_kernel_plugin.cc: Likewise. + * gcc.dg/plugin/analyzer_known_fns_plugin.cc: Likewise. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/expensive_selftests_plugin.cc: Update for move of + selftest-diagnostic.h to diagnostics/selftest-context.h. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * g++.dg/plugin/show_template_tree_color_plugin.cc: Update for + moves to namespace diagnostics. + * gcc.dg/plugin/diagnostic_group_plugin.cc: Likewise. + * gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc: Likewise. + * gcc.dg/plugin/location_overflow_plugin.cc: Likewise. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc: Update to + add "m_" prefix to fields of diagnostic_info throughout. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * g++.dg/plugin/show-template-tree-color-labels.C: Update for + moves to "source-printing". + * gcc.dg/plugin/diagnostic-test-show-locus.py: Likewise. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/diagnostic_group_plugin.cc: Update for move of + diagnostics output formats into namespace "diagnostics" as + "sinks". + * gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc: Likewise. + * gcc.dg/plugin/location_overflow_plugin.cc: Likewise. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/analyzer_gil_plugin.cc: Update #include for + "diagnostic-path.h" moving to "diagnostics/paths.h", + diagnostic_thread_id_t to diagnostics::paths::thread_id_t, + diagnostic_event_id_t to diagnostics::paths::event_id_t, + diagnostic_path to diagnostics::paths::path, and + diagnostic_thread to diagnostics::paths::thread, and + diagnostic_event to diagnostics::paths::event. + * gcc.dg/plugin/diagnostic_plugin_test_paths.cc: Likewise. + * lib/sarif.py (get_state_graph): Update property prefix for + threadFlowLocations from "gcc/diagnostic_event/" to + "gcc/diagnostics/paths/event/". + * gcc.dg/sarif-output/include-chain-2.h: Update comment. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/expensive_selftests_plugin.cc: Update #include for + move of edit-context.h to diagnostics subdir. Update + for move of edit_context to diagnostics::edit_context. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/diagnostic_plugin_test_text_art.cc: Update + #include for move of "diagnostic-diagram.h" to + "diagnostics/diagram.h". Update for move of diagnostic_diagram to + diagnostics::diagram. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/analyzer_cpython_plugin.cc: : Update #include for + move of "diagnostic-metadata.h" to "diagnostics/metadata.h" + * gcc.dg/plugin/analyzer_kernel_plugin.cc: Likewise. + * gcc.dg/plugin/analyzer_known_fns_plugin.cc: Likewise. + * gcc.dg/plugin/diagnostic_plugin_test_graphs.cc: Likewise. Also + update for move of diagnostic_metadata to diagnostics::metadata. + * gcc.dg/plugin/diagnostic_plugin_test_metadata.cc: Likewise. + * gcc.dg/plugin/diagnostic_plugin_test_paths.cc: Likewise. + +2025-07-25 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/plugin/diagnostic_plugin_test_graphs.cc: Update #include + for move of "diagnostic-digraphs.h" to "diagnostics/digraphs.h". + +2025-07-25 Patrick Palka <ppalka@redhat.com> + + * g++.dg/lookup/operator-8.C: Remove XFAILs and properly + suppress all -Wunused-result warnings. + +2025-07-25 Iain Sandoe <iain@sandoe.co.uk> + + PR c++/121219 + * g++.dg/coroutines/torture/pr121219.C: New test. + +2025-07-25 Christoph Müllner <christoph.muellner@vrull.eu> + + * gcc.target/riscv/interrupt-conflict-mode.c: Remove "user" + interrupts. + * gcc.target/riscv/xtheadint-push-pop.c: Likewise. + * gcc.target/riscv/interrupt-umode.c: Removed. + +2025-07-25 Christoph Müllner <christoph.muellner@vrull.eu> + + * gcc.target/riscv/interrupt-rnmi.c: New test. + +2025-07-24 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/117294 + PR c++/113854 + * g++.dg/cpp2a/concepts-traits3.C: Adjust diagnostics. + * g++.dg/cpp2a/concepts-traits4.C: New test. + * g++.dg/diagnostic/static_assert5.C: New test. + * g++.dg/ext/has_virtual_destructor2.C: New test. + * g++.dg/ext/is_assignable2.C: New test. + * g++.dg/ext/is_constructible9.C: New test. + * g++.dg/ext/is_convertible7.C: New test. + * g++.dg/ext/is_destructible3.C: New test. + * g++.dg/ext/is_invocable6.C: New test. + * g++.dg/ext/is_virtual_base_of_diagnostic2.C: New test. + +2025-07-24 Jason Merrill <jason@redhat.com> + + PR c++/114632 + PR c++/101233 + * g++.dg/cpp23/explicit-obj-lambda18.C: New test. + * g++.dg/cpp23/static-operator-call7.C: New test. + +2025-07-24 Robert Dubner <rdubner@symas.com> + + * cobol.dg/group2/_-static__compilation.cob: Modify for -static warning. + * cobol.dg/group2/_-static__compilation.out: Removed. + +2025-07-24 Robin Dapp <rdapp@ventanamicro.com> + + * lib/target-supports.exp: Fix misalignment check. + +2025-07-24 Spencer Abson <spencer.abson@arm.com> + + * g++.target/aarch64/sve/unpacked_cond_binary_bf16_1.C: New test. + * gcc.target/aarch64/sve/unpacked_cond_builtin_fmax_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_builtin_fmin_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fadd_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fdiv_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fmaxnm_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fminnm_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fmul_1.c: Likewise.. + * gcc.target/aarch64/sve/unpacked_cond_fsubr_1.c: Likewise. + +2025-07-24 Spencer Abson <spencer.abson@arm.com> + + * gcc.target/aarch64/sve/unpacked_fdiv_1.c: New test. + * gcc.target/aarch64/sve/unpacked_fdiv_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fdiv_3.c: Likewise. + +2025-07-24 Spencer Abson <spencer.abson@arm.com> + + * g++.target/aarch64/sve/unpacked_binary_bf16_1.C: New test. + * g++.target/aarch64/sve/unpacked_binary_bf16_2.C: Likewise. + * gcc.target/aarch64/sve/unpacked_builtin_fmax_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_builtin_fmax_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_builtin_fmin_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_builtin_fmin_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fadd_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fadd_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fmaxnm_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fmaxnm_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fminnm_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fminnm_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fmul_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fmul_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fsubr_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_fsubr_2.c: Likewise. + +2025-07-24 Jeevitha Palanisamy <jeevitha@linux.ibm.com> + + PR testsuite/119382 + * gcc.target/powerpc/vsx-builtin-7.c: Add '-fno-ipa-icf' to dg-options. + +2025-07-24 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u64.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u8.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm.h: New test. + +2025-07-24 Nathaniel Shead <nathanieloshead@gmail.com> + + PR c++/120412 + * g++.dg/modules/internal-14_a.C: New test. + * g++.dg/modules/internal-14_b.C: New test. + * g++.dg/modules/internal-14_c.C: New test. + +2025-07-23 Spencer Abson <spencer.abson@arm.com> + + * gcc.target/aarch64/sve/unpacked_cond_fabs_1.c: New test. + * gcc.target/aarch64/sve/unpacked_cond_fneg_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_frinta_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_frinta_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_frinti_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_frintm_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_frintp_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_frintx_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_frintz_1.c: Likewise. + +2025-07-23 Spencer Abson <spencer.abson@arm.com> + + * gcc.target/aarch64/sve/unpacked_fabs_1.c: New test. + * gcc.target/aarch64/sve/unpacked_fneg_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frinta_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frinta_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frinti_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frinti_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frintm_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frintm_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frintp_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frintp_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frintx_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frintx_2.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frintz_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_frintz_2.c: Likewise. + +2025-07-23 Spencer Abson <spencer.abson@arm.com> + + * gcc.target/aarch64/sve/unpacked_cond_cvtf_1.c: New test. + * gcc.target/aarch64/sve/unpacked_cond_fcvt_1.c: Likewise. + * gcc.target/aarch64/sve/unpacked_cond_fcvtz_1.c: Likewise. + +2025-07-23 Harald Anlauf <anlauf@gmx.de> + + PR fortran/121203 + * gfortran.dg/function_charlen_4.f90: New test. + +2025-07-23 Robin Dapp <rdapp@ventanamicro.com> + + PR target/121073 + * gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-6.c: Adjust test + expectation. + * gcc.target/riscv/rvv/base/scalar_move-5.c: Ditto. + * gcc.target/riscv/rvv/base/scalar_move-6.c: Ditto. + * gcc.target/riscv/rvv/base/scalar_move-7.c: Ditto. + * gcc.target/riscv/rvv/base/scalar_move-8.c: Ditto. + * gcc.target/riscv/rvv/base/scalar_move-9.c: Ditto. + * gcc.target/riscv/rvv/pr121073.c: New test. + +2025-07-23 Robin Dapp <rdapp@ventanamicro.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmacc-run-1-f16.c: + Add zvfh requirements and options. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c: + Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsac-run-1-f16.c: + Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c: + Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmacc-run-1-f16.c: + Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f16.c: + Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsac-run-1-f16.c: + Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f16.c: + Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f16.c: + Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f16.c: + Ditto. + * lib/target-supports.exp: Add zvfh options. + +2025-07-23 Andrew Pinski <quic_apinski@quicinc.com> + + PR target/120119 + * g++.dg/torture/pr120119-1.C: New test. + +2025-07-23 Patrick Palka <ppalka@redhat.com> + + PR c++/121179 + * g++.dg/lookup/operator-8.C: Strengthen test and remove one + XFAIL. + +2025-07-23 Patrick Palka <ppalka@redhat.com> + + PR c++/121055 + * g++.dg/ext/is_invocable5.C: New test. + +2025-07-23 Spencer Abson <spencer.abson@arm.com> + + * lib/gcc-defs.exp (aarch64-arg-dg-options): Split add_tune into + add_tune and add_override, so that specifying -moverride does not + change the baseline tuning from the testuite's default (generic). + +2025-07-23 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121220 + * gcc.dg/tree-ssa/ssa-sink-23.c: New testcase. + +2025-07-23 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/119085 + * gcc.dg/tree-ssa/pr119085.c: New test. + +2025-07-23 Gaius Mulley <gaiusmod2@gmail.com> + + PR modula2/121164 + * gm2/switches/pedantic-params/fail/arrayofchar.def: New test. + * gm2/switches/pedantic-params/fail/arrayofchar.mod: New test. + +2025-07-23 Richard Biener <rguenther@suse.de> + + PR middle-end/121216 + * gcc.dg/pr121216.c: New testcase. + +2025-07-23 Andrew Pinski <quic_apinski@quicinc.com> + + PR testsuite/120101 + * gcc.dg/tree-ssa/pr81627.c (fn1): Mark as noinline. + +2025-07-23 Siddhesh Poyarekar <siddhesh@gotplt.org> + + * gcc.dg/vect/pr116125.c (mem_overlap): Expand A to 10 members. + +2025-07-22 Jason Merrill <jason@redhat.com> + + PR c++/121068 + * g++.dg/cpp2a/constexpr-union6.C: Expect x5 to work. + * g++.dg/cpp26/constexpr-new4.C: New test. + +2025-07-22 Jason Merrill <jason@redhat.com> + + * g++.dg/warn/Wmismatched-new-delete-5.C: Fix allocation. + +2025-07-22 Andrew Pinski <quic_apinski@quicinc.com> + + PR middle-end/109267 + * lib/target-supports.exp (check_effective_target_trap): New proc. + * g++.dg/missing-return.C: Update testcase for the !trap case. + * gcc.dg/pr109267-1.c: New test. + * gcc.dg/pr109267-2.c: New test. + +2025-07-22 Karl Meakin <karl.meakin@arm.com> + + * gcc.target/aarch64/sve/mask_load_2.c: Update tests. + +2025-07-22 Karl Meakin <karl.meakin@arm.com> + + * gcc.target/aarch64/sve/mask_load_2.c: New test. + +2025-07-22 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121202 + * gcc.dg/pr121202.c: New testcase. + +2025-07-22 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/slp-28.c: Adjust. + +2025-07-21 Andrew Pinski <quic_apinski@quicinc.com> + + PR tree-optimization/110949 + PR tree-optimization/95906 + * gcc.dg/tree-ssa/cmp-2.c: New test. + * gcc.dg/tree-ssa/max-bitcmp-1.c: New test. + +2025-07-21 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Add asm check. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u64.c: New test. + +2025-07-21 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c: Add asm check. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c: Ditto. + +2025-07-21 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Add asm check. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test + helper macros. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test + data for run test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c: New test. + +2025-07-21 Kyrylo Tkachov <ktkachov@nvidia.com> + + * gcc.target/aarch64/simd/mf8_data_1.c (test_set_lane4, + test_setq_lane4): Relax allowed assembly. + * gcc.target/aarch64/vec-set-zero.c: Use -Os in flags. + * gcc.target/aarch64/inszero_split_1.c: New test. + +2025-07-21 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121194 + * gcc.dg/torture/pr121194.c: New testcase. + +2025-07-21 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org> + + * gcc.dg/pr87600-2.c: Split test into two files since errors for + functions test{0,1} are thrown during expand, and for + test{2,3} during gimplification. + * lib/scanasm.exp: On s390, skip lines beginning with #. + * gcc.dg/asm-hard-reg-error-1.c: New test. + * gcc.dg/asm-hard-reg-error-2.c: New test. + * gcc.dg/asm-hard-reg-error-3.c: New test. + * gcc.dg/asm-hard-reg-error-4.c: New test. + * gcc.dg/asm-hard-reg-error-5.c: New test. + * gcc.dg/pr87600-3.c: New test. + * gcc.target/aarch64/asm-hard-reg-2.c: New test. + * gcc.target/s390/asm-hard-reg-7.c: New test. + +2025-07-21 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org> + + * gcc.dg/asm-hard-reg-1.c: New test. + * gcc.dg/asm-hard-reg-2.c: New test. + * gcc.dg/asm-hard-reg-3.c: New test. + * gcc.dg/asm-hard-reg-4.c: New test. + * gcc.dg/asm-hard-reg-5.c: New test. + * gcc.dg/asm-hard-reg-6.c: New test. + * gcc.dg/asm-hard-reg-7.c: New test. + * gcc.dg/asm-hard-reg-8.c: New test. + * gcc.target/aarch64/asm-hard-reg-1.c: New test. + * gcc.target/i386/asm-hard-reg-1.c: New test. + * gcc.target/i386/asm-hard-reg-2.c: New test. + * gcc.target/s390/asm-hard-reg-1.c: New test. + * gcc.target/s390/asm-hard-reg-2.c: New test. + * gcc.target/s390/asm-hard-reg-3.c: New test. + * gcc.target/s390/asm-hard-reg-4.c: New test. + * gcc.target/s390/asm-hard-reg-5.c: New test. + * gcc.target/s390/asm-hard-reg-6.c: New test. + * gcc.target/s390/asm-hard-reg-longdouble.h: New test. + +2025-07-21 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/vect-127.c: New testcase. + +2025-07-21 Andre Vehreschild <vehre@gcc.gnu.org> + + PR fortran/119106 + * gfortran.dg/array_constructor_58.f90: New test. + +2025-07-21 panciyan <panciyan@eswincomputing.com> + + * gcc.target/riscv/sat/sat_arith.h: Unsigned testcase form8 form9. + * gcc.target/riscv/sat/sat_u_add-8-u16.c: New test. + * gcc.target/riscv/sat/sat_u_add-8-u32.c: New test. + * gcc.target/riscv/sat/sat_u_add-8-u64.c: New test. + * gcc.target/riscv/sat/sat_u_add-8-u8.c: New test. + * gcc.target/riscv/sat/sat_u_add-9-u16.c: New test. + * gcc.target/riscv/sat/sat_u_add-9-u32.c: New test. + * gcc.target/riscv/sat/sat_u_add-9-u64.c: New test. + * gcc.target/riscv/sat/sat_u_add-9-u8.c: New test. + * gcc.target/riscv/sat/sat_u_add-run-8-u16.c: New test. + * gcc.target/riscv/sat/sat_u_add-run-8-u32.c: New test. + * gcc.target/riscv/sat/sat_u_add-run-8-u64.c: New test. + * gcc.target/riscv/sat/sat_u_add-run-8-u8.c: New test. + * gcc.target/riscv/sat/sat_u_add-run-9-u16.c: New test. + * gcc.target/riscv/sat/sat_u_add-run-9-u32.c: New test. + * gcc.target/riscv/sat/sat_u_add-run-9-u64.c: New test. + * gcc.target/riscv/sat/sat_u_add-run-9-u8.c: New test. + +2025-07-20 Andrew Pinski <quic_apinski@quicinc.com> + + PR testsuite/120859 + * gcc.dg/tree-prof/afdo-crossmodule-1b.c: Add some dg-* + commands like what is in afdo-crossmodule-1.c + +2025-07-20 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c: + Leverage DEF_AVG_0_WRAP to generate the correct func name. + * gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-1-i64-from-i128.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-1-i32-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c: Ditto. + +2025-07-19 Dimitar Dimitrov <dimitar@dinux.eu> + + PR target/121124 + * gcc.target/pru/pragma-ctable_entry-2.c: New test. + +2025-07-19 Paul-Antoine Arras <parras@baylibre.com> + + PR target/119100 + * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfwnmacc and + vfwnmsac. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f32.c: New test. + +2025-07-18 Harald Anlauf <anlauf@gmx.de> + + PR fortran/121145 + * gfortran.dg/pointer_check_15.f90: New test. + +2025-07-18 Andrew Pinski <quic_apinski@quicinc.com> + + PR testsuite/121153 + * gcc.dg/vect/vect-reduc-cond-1.c: Require vect_condition. + * gcc.dg/vect/vect-reduc-cond-2.c: Likewise. + +2025-07-18 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/avg_data.h: Adjust the test data. + * gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c: New test. + * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i64-from-i128.c: New test. + +2025-07-18 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/117423 + * gcc.dg/tree-ssa/pr117423.c: New test. + +2025-07-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121126 + * gcc.dg/vect/pr121126.c: New testcase. + +2025-07-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/120924 + * gcc.dg/uninit-pr120924.c: New testcase. + +2025-07-18 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/121131 + * gcc.dg/bitint-124.c: New test. + +2025-07-17 Jason Merrill <jason@redhat.com> + + PR c++/87097 + * g++.dg/cpp0x/constexpr-array29.C: New test. + +2025-07-17 Richard Sandiford <richard.sandiford@arm.com> + Yury Khrustalev <yury.khrustalev@arm.com> + + * lib/target-supports.exp (add_options_for_aarch64_sme) + (check_effective_target_aarch64_sme_hw): New procedures. + * g++.target/aarch64/sme/sme_throw_1.C: New test. + * g++.target/aarch64/sme/sme_throw_2.C: Likewise. + +2025-07-17 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org> + + * gcc.target/s390/isfinite-isinf-isnormal-signbit-2.c: Adapt + scan assembler directives. + * gcc.target/s390/isfinite-isinf-isnormal-signbit-3.c: Ditto. + * gcc.target/s390/signbit-1.c: New test. + * gcc.target/s390/signbit-2.c: New test. + * gcc.target/s390/signbit-3.c: New test. + * gcc.target/s390/signbit-4.c: New test. + * gcc.target/s390/signbit-5.c: New test. + * gcc.target/s390/signbit.h: New test. + +2025-07-17 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org> + + * gcc.target/s390/vector/vlgv-zero-extend-1.c: New test. + +2025-07-17 Xi Ruoyao <xry111@xry111.site> + + PR target/121064 + * gcc.target/loongarch/pr121064.c: New test. + +2025-07-17 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/bb-slp-39.c: Adjust. + +2025-07-17 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121035 + * gcc.dg/pr121035.c: New testcase. + +2025-07-16 Uros Bizjak <ubizjak@gmail.com> + + PR target/121062 + * gcc.target/i386/pr121062-1.c: New test. + * gcc.target/i386/pr121062-2.c: Likewise. + * gcc.target/i386/pr121062-3a.c: Likewise. + * gcc.target/i386/pr121062-3b.c: Likewise. + * gcc.target/i386/pr121062-3c.c: Likewise. + * gcc.target/i386/pr121062-4.c: Likewise. + * gcc.target/i386/pr121062-5.c: Likewise. + * gcc.target/i386/pr121062-6.c: Likewise. + * gcc.target/i386/pr121062-7.c: Likewise. + +2025-07-16 H.J. Lu <hjl.tools@gmail.com> + + PR target/120881 + PR testsuite/121078 + * gcc.dg/20021014-1.c (dg-additional-options): Add -mfentry + -fno-pic only on gnu/x86 targets. + * gcc.dg/aru-2.c (dg-additional-options): Likewise. + * gcc.dg/nest.c (dg-additional-options): Likewise. + * gcc.dg/pr32450.c (dg-additional-options): Likewise. + * gcc.dg/pr43643.c (dg-additional-options): Likewise. + * gcc.target/i386/pr104447.c (dg-additional-options): Likewise. + * gcc.target/i386/pr113122-3.c(dg-additional-options): Likewise. + * gcc.target/i386/pr119386-1.c (dg-additional-options): Add + -mfentry only on gnu targets. + * gcc.target/i386/pr119386-2.c (dg-additional-options): Likewise. + +2025-07-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121049 + * gcc.dg/vect/pr121049.c: New testcase. + +2025-07-16 Andrew Pinski <quic_apinski@quicinc.com> + + PR tree-optimization/119920 + PR tree-optimization/112324 + PR tree-optimization/110015 + * gcc.dg/vect/vect-reduc-cond-1.c: New test. + * gcc.dg/vect/vect-reduc-cond-2.c: New test. + * gcc.dg/vect/vect-reduc-cond-3.c: New test. + +2025-07-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121116 + * gcc.dg/torture/pr121116.c: New testcase. + +2025-07-16 Spencer Abson <spencer.abson@arm.com> + + PR target/117850 + * gcc.target/aarch64/simd/vabal_combine.c: Removed. This is + covered by fold_to_highpart_1.c + * gcc.target/aarch64/simd/fold_to_highpart_1.c: New test. + * gcc.target/aarch64/simd/fold_to_highpart_2.c: Likewise. + * gcc.target/aarch64/simd/fold_to_highpart_3.c: Likewise. + * gcc.target/aarch64/simd/fold_to_highpart_4.c: Likewise. + * gcc.target/aarch64/simd/fold_to_highpart_5.c: Likewise. + * gcc.target/aarch64/simd/fold_to_highpart_6.c: Likewise. + +2025-07-16 Alfie Richards <alfie.richards@arm.com> + + * g++.dg/warn/Wformat-gcc_diag-1.C: Add string_slice "%B" format tests. + +2025-07-16 Robin Dapp <rdapp@ventanamicro.com> + + PR middle-end/121065 + * gcc.target/arm/pr121065.c: New test. + +2025-07-16 Robin Dapp <rdapp@ventanamicro.com> + + PR target/120297 + * gcc.target/riscv/rvv/pr120297.c: New test. + +2025-07-16 Kyrylo Tkachov <ktkachov@nvidia.com> + + * gcc.target/aarch64/sve2/eon_bsl2n.c: New test. + +2025-07-16 Kyrylo Tkachov <ktkachov@nvidia.com> + + * gcc.target/aarch64/sve2/nbsl_nor_nand_neon.c: New test. + +2025-07-16 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/121060 + * gfortran.dg/associate_75.f90: New test. + +2025-07-16 Steve Kargl <sgk@troutmask.apl.washington.edu> + + * gfortran.dg/import13.f90: New test. + +2025-07-16 Jeremy Rifkin <jeremy@rifkin.dev> + + PR c/82134 + * c-c++-common/attr-warn-unused-result-2.c: New test. + +2025-07-16 Haochen Jiang <haochen.jiang@intel.com> + + * gcc.target/i386/amxavx512-cvtrowd2ps-2.c: Add -mavx512fp16 to + use FP16 related intrins for convert. + * gcc.target/i386/amxavx512-cvtrowps2bf16-2.c: Ditto. + * gcc.target/i386/amxavx512-cvtrowps2ph-2.c: Ditto. + * gcc.target/i386/amxavx512-movrow-2.c: Ditto. + +2025-07-16 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/sat/sat_s_add-1-i16.c: Remove function-body + check and add no jmp label asm check. + * gcc.target/riscv/sat/sat_s_add-1-i32.c: + * gcc.target/riscv/sat/sat_s_add-1-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-1-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-2-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-2-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-2-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-2-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-3-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-3-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-3-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-3-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-4-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-4-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-4-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-4-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_add_imm-1-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_add_imm-1-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_add_imm-1-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_add_imm-1-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_add_imm-2-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_add_imm-2-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_add_imm-2-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_add_imm-2-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-1-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-1-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-1-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-1-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-2-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-2-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-2-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-2-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-3-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-3-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-3-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-3-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-4-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-4-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-4-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-4-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-1-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-1-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-1-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-1-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-2-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-2-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-2-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-2-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-3-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-3-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-3-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-3-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-4-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-4-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-4-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-4-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-5-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-5-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-5-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-5-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-6-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-6-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-6-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-6-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-1-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-1-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-1-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-1-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-2-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-2-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-2-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-2-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-3-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-3-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-3-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-3-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-4-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-4-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-4-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-4-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c: Ditto. + * gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c: Ditto. + * gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c: Ditto. + * gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-1-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-1-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-1-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-1-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-10-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-10-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-10-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-10-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-11-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-11-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-11-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-11-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-12-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-12-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-12-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-12-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-2-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-2-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-2-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-2-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-3-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-3-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-3-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-3-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-4-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-4-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-4-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-4-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-5-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-5-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-5-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-5-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-6-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-6-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-6-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-6-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-7-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-7-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-7-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-7-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-8-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-8-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-8-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-8-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-9-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-9-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-9-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-9-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-1-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-1-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-1-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-1-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-2-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-2-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-2-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-2-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-3-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-3-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-3-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-3-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-4-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-4-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-4-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-4-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-5-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-5-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-5-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-5-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-6-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-6-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-6-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-6-u8.c: Ditto. + +2025-07-16 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/rvv/autovec/avg.h: Add int128 type when + xlen == 64. + * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i32.c: + Suppress __int128 warning for run test. + * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i32-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_data.h: Fix one incorrect + test data. + * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c: Ditto. + * gcc.target/riscv/rvv/autovec/avg_floor-1-i64-from-i128.c: New test. + * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i64-from-i128.c: New test. + +2025-07-15 David Malcolm <dmalcolm@redhat.com> + + PR sarif-replay/120792 + * libgdiagnostics.dg/sarif.py: Delete duplicate script. + * libgdiagnostics.dg/test-message-buffer-c.py: New test script. + * libgdiagnostics.dg/test-message-buffer.c: New test. + * libgdiagnostics.dg/test-warning-with-path-c.py: Update expected + output to reflect that SARIF for event messages now contains JSON + pointers when referring to other events by ID. + * sarif-replay.dg/2.1.0-valid/3.11.6-embedded-links.sarif: Add + HTML and SARIF output, and call out to Python scripts to verify + the output. Add example of a result with a link in its message. + * sarif-replay.dg/2.1.0-valid/embedded-links-check-html.py: New + test script. + * sarif-replay.dg/2.1.0-valid/embedded-links-check-sarif-roundtrip.py: + New test script. + +2025-07-15 Umesh Kalappa <ukalappa.mips@gmail.com> + + * gcc.target/riscv/mipscondmov.c: Test file for mips.ccmov insn. + +2025-07-15 Jason Merrill <jason@redhat.com> + + PR c++/120577 + * g++.dg/cpp2a/constexpr-union9.C: New test. + +2025-07-15 Jason Merrill <jason@redhat.com> + + PR c++/117784 + * g++.dg/cpp26/decomp25.C: Add -fno-implicit-constexpr. + +2025-07-15 Kwok Cheung Yeung <kcyeung@baylibre.com> + + PR fortran/104428 + * gfortran.dg/gomp/pr104428.f90: New. + +2025-07-15 Konstantinos Eleftheriou <konstantinos.eleftheriou@vrull.eu> + + * gcc.target/aarch64/avoid-store-forwarding-be.c: New test. + +2025-07-15 Soumya AR <soumyaa@nvidia.com> + + * gcc.target/aarch64/ldapr-sext.c: Update expected output to include + offsets. + * gcc.target/aarch64/ldapur.c: New test for LDAPUR. + * gcc.target/aarch64/ldapur_avoid.c: New test for AVOID_LDAPUR flag. + +2025-07-15 Richard Biener <rguenther@suse.de> + Richard Sandiford <richard.sandiford@arm.com> + + PR tree-optimization/121059 + * gcc.dg/vect/pr121059.c: New testcase. + +2025-07-15 Jakub Jelinek <jakub@redhat.com> + Jason Merrill <jason@redhat.com> + + PR c/44677 + * c-c++-common/Wunused-parm-1.c: New test. + * c-c++-common/Wunused-parm-2.c: New test. + * c-c++-common/Wunused-parm-3.c: New test. + * c-c++-common/Wunused-parm-4.c: New test. + * c-c++-common/Wunused-parm-5.c: New test. + * c-c++-common/Wunused-parm-6.c: New test. + * c-c++-common/Wunused-var-7.c (bar, baz): Expect warning on a. + * c-c++-common/Wunused-var-19.c: New test. + * c-c++-common/Wunused-var-20.c: New test. + * c-c++-common/Wunused-var-21.c: New test. + * c-c++-common/Wunused-var-22.c: New test. + * c-c++-common/Wunused-var-23.c: New test. + * c-c++-common/Wunused-var-24.c: New test. + * g++.dg/cpp26/name-independent-decl1.C (foo): Expect one + set but not used warning. + * g++.dg/warn/Wunused-parm-12.C: New test. + * g++.dg/warn/Wunused-parm-13.C: New test. + * g++.dg/warn/Wunused-var-2.C (f2): Expect set but not used warning + on parameter x and variable a. + * g++.dg/warn/Wunused-var-40.C: New test. + * g++.dg/warn/Wunused-var-41.C: New test. + * gcc.dg/memchr-3.c (test_find): Change return type from void to int, + and add return n; statement. + * gcc.dg/unused-9.c (g): Move dg-bogus to the correct line and expect + a warning on i. + +2025-07-15 Kyrylo Tkachov <ktkachov@nvidia.com> + + Revert: + 2025-07-15 Kyrylo Tkachov <ktkachov@nvidia.com> + + * gcc.target/aarch64/simd/eor3_d.c: Add tests for DImode operands. + +2025-07-15 Spencer Abson <spencer.abson@arm.com> + + * gcc.target/aarch64/sve/unpacked_fcm_combines_1.c: New test. + * gcc.target/aarch64/sve/unpacked_fcm_combines_2.c: Likewise. + +2025-07-14 Richard Biener <rguenther@suse.de> + + Revert: + 2025-07-14 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121059 + * gcc.dg/vect/pr121059.c: New testcase. + +2025-07-14 Juergen Christ <jchrist@linux.ibm.com> + + * lib/target-supports.exp: Add s390 to vect_logical_reduc targets. + * gcc.target/s390/vector/reduc-binops-1.c: New test. + * gcc.target/s390/vector/reduc-minmax-1.c: New test. + * gcc.target/s390/vector/reduc-plus-1.c: New test. + +2025-07-14 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121059 + * gcc.dg/vect/pr121059.c: New testcase. + +2025-07-14 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/sat/sat_u_mul-1-u16-from-u64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-1-u32-from-u64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-1-u8-from-u64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-1-u32-from-u64.c: New test. + * gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u64.c: New test. + +2025-07-14 Uros Bizjak <ubizjak@gmail.com> + + PR target/121015 + * gcc.target/i386/pr121015.c: New test. + +2025-07-14 H.J. Lu <hjl.tools@gmail.com> + + PR target/120881 + * gcc.dg/20021014-1.c: Add additional -mfentry -fno-pic options + for x86. + * gcc.dg/aru-2.c: Likewise. + * gcc.dg/nest.c: Likewise. + * gcc.dg/pr32450.c: Likewise. + * gcc.dg/pr43643.c: Likewise. + * gcc.target/i386/pr104447.c: Likewise. + * gcc.target/i386/pr113122-3.c: Likewise. + * gcc.target/i386/pr119386-1.c: Add additional -mfentry if not + ia32. + * gcc.target/i386/pr119386-2.c: Likewise. + * gcc.target/i386/pr120881-1a.c: New test. + * gcc.target/i386/pr120881-1b.c: Likewise. + * gcc.target/i386/pr120881-1c.c: Likewise. + * gcc.target/i386/pr120881-1d.c: Likewise. + * gcc.target/i386/pr120881-2a.c: Likewise. + * gcc.target/i386/pr120881-2b.c: Likewise. + * gcc.target/i386/pr82699-1.c: Add additional -mfentry. + * lib/target-supports.exp (check_effective_target_fentry): New. + +2025-07-14 François-Xavier Coudert <fxcoudert@gcc.gnu.org> + + * gcc.dg/darwin-minversion-link.c: Account for macOS 26. + +2025-07-14 Paul-Antoine Arras <parras@baylibre.com> + + PR target/119100 + * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfwmacc and + vfwmsac. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise. Also check + for fcvt and vfmv. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Add vfwmacc and + vfwmsac. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise. Also check + for fcvt and vfmv. + * gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h: Add support for + widening variants. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_widen_run.h: New test + helper. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f32.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f16.c: New test. + * gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f32.c: New test. + +2025-07-14 Eric Botcazou <ebotcazou@adacore.com> + + * gnat.dg/deref4.adb: New test. + * gnat.dg/deref4_pkg.ads: New helper. + +2025-07-14 Alfie Richards <alfie.richards@arm.com> + + * gcc.target/aarch64/sme2/acle-asm/amax_f16_x2.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amax_f16_x4.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amax_f32_x2.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amax_f32_x4.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amax_f64_x2.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amax_f64_x4.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amin_f16_x2.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amin_f16_x4.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amin_f32_x2.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amin_f32_x4.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amin_f64_x2.c: New test. + * gcc.target/aarch64/sme2/acle-asm/amin_f64_x4.c: New test. + +2025-07-14 panciyan <panciyan@eswincomputing.com> + + * gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h: Unsigned vector SAT_SUB form11 form12. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u16.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u32.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u64.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u8.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u16.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u32.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u64.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u8.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u16.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u32.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u64.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u8.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u16.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u32.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u64.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u8.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u16.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u32.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u64.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u8.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u16.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u32.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u64.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u8.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u16.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u32.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u64.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u8.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u16.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u32.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u64.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u8.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u16.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u32.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u64.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u8.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u16.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u32.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u64.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u8.c: Use ussub instead of usub. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u16.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u32.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u64.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u8.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u16.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u32.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u64.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u8.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u16.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u32.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u64.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u8.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u16.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u32.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u64.c: New test. + * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u8.c: New test. + +2025-07-12 Xi Ruoyao <xry111@xry111.site> + + PR rtl-optimization/87600 + PR rtl-optimization/120983 + * gcc.dg/pr87600.h [__loongarch__]: Define REG0 and REG1. + * gcc.dg/pr87600-1.c (dg-do): Add loongarch. + * gcc.dg/pr87600-2.c (dg-do): Likewise. + +2025-07-12 Tobias Burnus <tburnus@baylibre.com> + + * gfortran.dg/goacc/parameter.f95: Add -Wsurprising flag + and update expected diagnostic. + * gfortran.dg/goacc/parameter-3.f90: New test. + * gfortran.dg/goacc/parameter-4.f90: New test. + +2025-07-11 David Malcolm <dmalcolm@redhat.com> + + * gcc.dg/analyzer/state-diagram-1-sarif.py (test_xml_state): + Rename to... + (test_state_graph): ...this. Port from XML to SARIF graphs. + * gcc.dg/analyzer/state-diagram-1.c: Update sink option + from "sarif:xml-state=yes" to "sarif:state-graphs=yes". + * gcc.dg/analyzer/state-diagram-5-sarif.c: Likewise. + * gcc.dg/analyzer/state-diagram-5-sarif.py: Drop import of ET. + (test_nested_types_in_xml_state): Rename to... + (test_nested_types_in_state_graph): ...this. Port from XML to + SARIF graphs. + * gcc.dg/plugin/diagnostic-test-graphs-html.c: New test. + * gcc.dg/plugin/diagnostic-test-graphs-html.py: New test script. + * gcc.dg/plugin/diagnostic-test-graphs-sarif.c: New test. + * gcc.dg/plugin/diagnostic-test-graphs-sarif.py: New test script. + * gcc.dg/plugin/diagnostic-test-graphs.c: New test. + * gcc.dg/plugin/diagnostic_plugin_test_graphs.cc: New test plugin. + * gcc.dg/plugin/plugin.exp (plugin_test_list): Add the above. + * lib/sarif.py (get_xml_state): Delete. + (get_state_graph): New. + (def get_state_node_attr): New. + (get_state_node_kind): New. + (get_state_node_name): New. + (get_state_node_type): New. + (get_state_node_value): New. + * sarif-replay.dg/2.1.0-invalid/3.40.2-duplicate-node-id.sarif: + New test. + * sarif-replay.dg/2.1.0-invalid/3.41.4-unrecognized-node-id.sarif: + New test. + * sarif-replay.dg/2.1.0-valid/graphs-check-html.py: New test + script. + * sarif-replay.dg/2.1.0-valid/graphs-check-sarif-roundtrip.py: New + test script. + * sarif-replay.dg/2.1.0-valid/graphs.sarif: New test. + +2025-07-11 Vladimir N. Makarov <vmakarov@redhat.com> + + * gcc.target/powerpc/pr121007.c: New. + +2025-07-11 Jakub Jelinek <jakub@redhat.com> + + PR c++/119064 + * g++.dg/cpp26/feat-cxx26.C: Add test for + __cpp_trivial_relocatability. + * g++.dg/cpp26/trivially-relocatable1.C: New test. + * g++.dg/cpp26/trivially-relocatable2.C: New test. + * g++.dg/cpp26/trivially-relocatable3.C: New test. + * g++.dg/cpp26/trivially-relocatable4.C: New test. + * g++.dg/cpp26/trivially-relocatable5.C: New test. + * g++.dg/cpp26/trivially-relocatable6.C: New test. + * g++.dg/cpp26/trivially-relocatable7.C: New test. + * g++.dg/cpp26/trivially-relocatable8.C: New test. + * g++.dg/cpp26/trivially-relocatable9.C: New test. + * g++.dg/cpp26/trivially-relocatable10.C: New test. + * g++.dg/cpp26/trivially-relocatable11.C: New test. + +2025-07-11 Richard Sandiford <richard.sandiford@arm.com> + + PR target/121027 + * gcc.target/aarch64/sve/acle/general/perm_1.c: New test. + +2025-07-11 Kyrylo Tkachov <ktkachov@nvidia.com> + + * gcc.target/aarch64/simd/eor3_d.c: Add tests for DImode operands. + +2025-07-11 Kyrylo Tkachov <ktkachov@nvidia.com> + + * gcc.target/aarch64/simd/bcax_d.c: Add tests for DImode arguments. + +2025-07-11 Kyrylo Tkachov <ktkachov@nvidia.com> + + * gcc.target/aarch64/simd/eor3_d.c: New test. + +2025-07-11 Kyrylo Tkachov <ktkachov@nvidia.com> + + * gcc.target/aarch64/simd/bcax_d.c: New test. + +2025-07-11 Richard Biener <rguenther@suse.de> + + PR tree-optimization/121034 + * gcc.dg/vect/pr121034.c: New testcase. + +2025-07-11 Jakub Jelinek <jakub@redhat.com> + + PR c++/120954 + * c-c++-common/Warray-bounds-11.c: New test. + +2025-07-11 Jan Hubicka <hubicka@ucw.cz> + + * g++.dg/lto/pr114790_0.C: New test. + * g++.dg/lto/pr114790_1.C: New test. + +2025-07-11 Jakub Jelinek <jakub@redhat.com> + Martin Jambor <mjambor@suse.cz> + + PR ipa/121023 + * c-c++-common/musttail32.c: New test. + +2025-07-11 Hu, Lin1 <lin1.hu@intel.com> + + PR target/91384 + * gcc.target/i386/pr91384-1.c: New test. + +2025-07-11 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/106135 + * gfortran.dg/import3.f90: Use -std=f2008 and comment on change + in error message texts with f2018. + * gfortran.dg/import12.f90: New test. + +2025-07-10 Jakub Jelinek <jakub@redhat.com> + + PR c++/120628 + * g++.dg/cpp0x/final1.C: New test. + * g++.dg/cpp0x/final2.C: New test. + * g++.dg/cpp0x/override6.C: New test. + +2025-07-10 Jakub Jelinek <jakub@redhat.com> + + PR c++/120569 + * g++.dg/cpp0x/override2.C: Expect different diagnostics with + override or duplicate final. + * g++.dg/cpp0x/override5.C: New test. + * g++.dg/cpp0x/duplicate1.C: Expect different diagnostics with + duplicate final. + +2025-07-10 Jakub Jelinek <jakub@redhat.com> + + PR c++/117785 + * g++.dg/cpp0x/constexpr-ellipsis2.C: Expect different diagnostics for + C++26. + * g++.dg/cpp0x/constexpr-throw.C: Likewise. + * g++.dg/cpp1y/constexpr-84192.C: Expect different diagnostics. + * g++.dg/cpp1y/constexpr-throw.C: Expect different diagnostics for + C++26. + * g++.dg/cpp1z/constexpr-asm-5.C: Likewise. + * g++.dg/cpp26/constexpr-eh1.C: New test. + * g++.dg/cpp26/constexpr-eh2.C: New test. + * g++.dg/cpp26/constexpr-eh3.C: New test. + * g++.dg/cpp26/constexpr-eh4.C: New test. + * g++.dg/cpp26/constexpr-eh5.C: New test. + * g++.dg/cpp26/constexpr-eh6.C: New test. + * g++.dg/cpp26/constexpr-eh7.C: New test. + * g++.dg/cpp26/constexpr-eh8.C: New test. + * g++.dg/cpp26/constexpr-eh9.C: New test. + * g++.dg/cpp26/constexpr-eh10.C: New test. + * g++.dg/cpp26/constexpr-eh11.C: New test. + * g++.dg/cpp26/constexpr-eh12.C: New test. + * g++.dg/cpp26/constexpr-eh13.C: New test. + * g++.dg/cpp26/constexpr-eh14.C: New test. + * g++.dg/cpp26/constexpr-eh15.C: New test. + * g++.dg/cpp26/feat-cxx26.C: Change formatting in __cpp_pack_indexing + and __cpp_pp_embed test. Add __cpp_constexpr_exceptions test. + * g++.dg/cpp26/static_assert1.C: Expect different diagnostics for + C++26. + * g++.dg/cpp2a/consteval34.C: Likewise. + * g++.dg/cpp2a/consteval-memfn1.C: Likewise. + * g++.dg/cpp2a/constexpr-dynamic4.C: For C++26 add std::exception and + std::bad_cast definitions and expect different diagnostics. + * g++.dg/cpp2a/constexpr-dynamic6.C: Likewise. + * g++.dg/cpp2a/constexpr-dynamic7.C: Likewise. + * g++.dg/cpp2a/constexpr-dynamic8.C: Likewise. + * g++.dg/cpp2a/constexpr-dynamic9.C: Likewise. + * g++.dg/cpp2a/constexpr-dynamic11.C: Likewise. + * g++.dg/cpp2a/constexpr-dynamic14.C: Likewise. + * g++.dg/cpp2a/constexpr-dynamic18.C: Likewise. + * g++.dg/cpp2a/constexpr-new27.C: New test. + * g++.dg/cpp2a/constexpr-typeid5.C: New test. + +2025-07-10 Qing Zhao <qing.zhao@oracle.com> + + PR middle-end/121000 + * gcc.dg/flex-array-counted-by-pr121000.c: New test. + +2025-07-10 Mikael Morin <mikael@gcc.gnu.org> + + * gfortran.dg/asan/array_constructor_1.f90: Allocate array + before using it. + +2025-07-10 Jan Hubicka <hubicka@ucw.cz> + + * gcc.dg/tree-prof/afdo-inline.c: Add user symbol names. + +2025-07-10 Richard Sandiford <richard.sandiford@arm.com> + + * gcc.target/aarch64/sve/pfalse-binary.c: Add -funwind-tables. + * gcc.target/aarch64/sve/pfalse-binary_int_opt_n.c: Likewise. + * gcc.target/aarch64/sve/pfalse-binary_opt_n.c: Likewise. + * gcc.target/aarch64/sve/pfalse-binary_opt_single_n.c: Likewise. + * gcc.target/aarch64/sve/pfalse-binary_rotate.c: Likewise. + * gcc.target/aarch64/sve/pfalse-binary_uint64_opt_n.c: Likewise. + * gcc.target/aarch64/sve/pfalse-binary_uint_opt_n.c: Likewise. + * gcc.target/aarch64/sve/pfalse-binaryxn.c: Likewise. + * gcc.target/aarch64/sve/pfalse-clast.c: Likewise. + * gcc.target/aarch64/sve/pfalse-compare_opt_n.c: Likewise. + * gcc.target/aarch64/sve/pfalse-compare_wide_opt_n.c: Likewise. + * gcc.target/aarch64/sve/pfalse-count_pred.c: Likewise. + * gcc.target/aarch64/sve/pfalse-fold_left.c: Likewise. + * gcc.target/aarch64/sve/pfalse-load.c: Likewise. + * gcc.target/aarch64/sve/pfalse-load_ext.c: Likewise. + * gcc.target/aarch64/sve/pfalse-load_ext_gather_index.c: Likewise. + * gcc.target/aarch64/sve/pfalse-load_ext_gather_offset.c: Likewise. + * gcc.target/aarch64/sve/pfalse-load_gather_sv.c: Likewise. + * gcc.target/aarch64/sve/pfalse-load_gather_vs.c: Likewise. + * gcc.target/aarch64/sve/pfalse-load_replicate.c: Likewise. + * gcc.target/aarch64/sve/pfalse-prefetch.c: Likewise. + * gcc.target/aarch64/sve/pfalse-prefetch_gather_index.c: Likewise. + * gcc.target/aarch64/sve/pfalse-prefetch_gather_offset.c: Likewise. + * gcc.target/aarch64/sve/pfalse-ptest.c: Likewise. + * gcc.target/aarch64/sve/pfalse-rdffr.c: Likewise. + * gcc.target/aarch64/sve/pfalse-reduction.c: Likewise. + * gcc.target/aarch64/sve/pfalse-reduction_wide.c: Likewise. + * gcc.target/aarch64/sve/pfalse-shift_right_imm.c: Likewise. + * gcc.target/aarch64/sve/pfalse-store.c: Likewise. + * gcc.target/aarch64/sve/pfalse-store_scatter_index.c: Likewise. + * gcc.target/aarch64/sve/pfalse-store_scatter_offset.c: Likewise. + * gcc.target/aarch64/sve/pfalse-storexn.c: Likewise. + * gcc.target/aarch64/sve/pfalse-ternary_opt_n.c: Likewise. + * gcc.target/aarch64/sve/pfalse-ternary_rotate.c: Likewise. + * gcc.target/aarch64/sve/pfalse-unary.c: Likewise. + * gcc.target/aarch64/sve/pfalse-unary_convert_narrowt.c: Likewise. + * gcc.target/aarch64/sve/pfalse-unary_convertxn.c: Likewise. + * gcc.target/aarch64/sve/pfalse-unary_n.c: Likewise. + * gcc.target/aarch64/sve/pfalse-unary_pred.c: Likewise. + * gcc.target/aarch64/sve/pfalse-unary_to_uint.c: Likewise. + * gcc.target/aarch64/sve/pfalse-unaryxn.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-binary.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-binary_int_opt_n.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-binary_int_opt_single_n.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-binary_opt_n.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-binary_opt_single_n.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-binary_to_uint.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-binary_uint_opt_n.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-binary_wide.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-compare.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-load_ext_gather_index_restricted.c, + * gcc.target/aarch64/sve2/pfalse-load_ext_gather_offset_restricted.c, + * gcc.target/aarch64/sve2/pfalse-load_gather_sv_restricted.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-load_gather_vs.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-shift_left_imm_to_uint.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-shift_right_imm.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-store_scatter_index_restricted.c, + * gcc.target/aarch64/sve2/pfalse-store_scatter_offset_restricted.c, + * gcc.target/aarch64/sve2/pfalse-unary.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-unary_convert.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-unary_convert_narrowt.c: Likewise. + * gcc.target/aarch64/sve2/pfalse-unary_to_int.c: Likewise. + +2025-07-10 Kyrylo Tkachov <ktkachov@nvidia.com> + + PR target/120999 + * gcc.target/aarch64/sve2/pr120999.c: New test. + +2025-07-10 Richard Sandiford <richard.sandiford@arm.com> + + * lib/target-supports.exp (check_effective_target_aarch64_sve2p1_hw): + New proc. + * gcc.target/aarch64/sve2/dupq_1.c: Extend to big-endian. Add + noipa attributes. + * gcc.target/aarch64/sve2/extq_1.c: Likewise. + * gcc.target/aarch64/sve2/uzpq_1.c: Likewise. + * gcc.target/aarch64/sve2/zipq_1.c: Likewise. + * gcc.target/aarch64/sve2/dupq_1_run.c: New test. + * gcc.target/aarch64/sve2/extq_1_run.c: Likewise. + * gcc.target/aarch64/sve2/uzpq_1_run.c: Likewise. + * gcc.target/aarch64/sve2/zipq_1_run.c: Likewise. + +2025-07-10 Jakub Jelinek <jakub@redhat.com> + + * gfortran.dg/g77/980310-3.f: Comment spelling fix: bellow -> below. + * jit.dg/test-debuginfo.c: Likewise. + +2025-07-10 Pan Li <pan2.li@intel.com> + + * gcc.target/riscv/sat/sat_s_add-run-1-i16.c: Take rv32 || rv64 + instead of riscv_v for scalar run test. + * gcc.target/riscv/sat/sat_s_add-run-1-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-1-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-1-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-2-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-2-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-2-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-2-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-3-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-3-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-3-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-3-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-4-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-4-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-4-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_add-run-4-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-1-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-1-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-1-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-1-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-2-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-2-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-2-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-2-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-3-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-3-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-3-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-3-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-4-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-4-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-4-i64.c: Ditto. + * gcc.target/riscv/sat/sat_s_sub-run-4-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-1-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-1-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-1-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-1-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-1-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-1-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-2-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-2-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-2-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-2-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-2-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-2-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-3-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-3-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-3-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-3-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-3-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-3-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-4-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-4-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-4-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-4-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-4-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-4-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-5-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-5-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-5-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-5-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-5-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-5-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-6-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-6-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-6-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-6-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-6-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-6-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-7-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-7-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-7-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-7-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-7-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-7-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-8-i16-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-8-i32-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-8-i32-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-8-i64-to-i16.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-8-i64-to-i32.c: Ditto. + * gcc.target/riscv/sat/sat_s_trunc-run-8-i64-to-i8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-1-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-1-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-1-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-1-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-2-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-2-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-2-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-2-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-3-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-3-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-3-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-3-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-4-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-4-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-4-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-4-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-5-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-5-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-5-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-5-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-6-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-6-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-6-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-6-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-1-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-1-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-1-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-1-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-2-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-2-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-2-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-2-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-3-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-3-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-3-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-3-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-4-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-4-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-4-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_add_imm-run-4-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-1-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-1-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-1-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-1-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-10-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-10-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-10-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-10-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-11-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-11-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-11-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-11-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-12-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-12-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-12-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-12-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-2-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-2-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-2-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-2-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-3-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-3-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-3-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-3-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-4-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-4-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-4-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-4-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-5-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-5-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-5-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-5-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-6-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-6-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-6-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-6-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-7-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-7-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-7-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-7-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-8-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-8-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-8-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-8-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-9-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-9-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-9-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub-run-9-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-1-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-1-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-1-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-1-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-2-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-2-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-2-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-2-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-3-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-3-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-3-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-3-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-4-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-4-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-4-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_sub_imm-run-4-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-1-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-1-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-1-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-1-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-2-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-2-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-2-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-2-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-3-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-3-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-3-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-3-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-4-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-4-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-4-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-4-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-5-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-5-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-5-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-5-u8.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-6-u16.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-6-u32.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-6-u64.c: Ditto. + * gcc.target/riscv/sat/sat_u_trunc-run-6-u8.c: Ditto. + 2025-07-09 Jason Merrill <jason@redhat.com> PR c++/120243 diff --git a/gcc/testsuite/c-c++-common/Warray-bounds-11.c b/gcc/testsuite/c-c++-common/Warray-bounds-11.c new file mode 100644 index 0000000..686a94d --- /dev/null +++ b/gcc/testsuite/c-c++-common/Warray-bounds-11.c @@ -0,0 +1,21 @@ +/* PR c++/120954 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Warray-bounds=2" } */ + +static const int a[32] = { 11, 12, 13, 14, 15 }; +static const int b[32] = { 21, 22, 23, 24, 25 }; +static const int c[32] = { 31, 32, 33, 34, 35 }; +static const int d[32] = { 111, 112, 113, 114, 115 }; +static const int e[32] = { 121, 122, 123, 124, 125 }; +static const int f[32] = { 131, 132, 133, 134, 135 }; + +int +foo (int x, int y) +{ + int r = 0; + if (x >= 0 && x < 32) + r = (y >= 4 ? (y >= 0x65 ? a : b ) : c)[x]; + else if (x >= 0x100 && x < 0x120) + r = (y >= 4 ? (y >= 0x65 ? d : e ) : f)[x - 0x100]; + return r; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-parm-1.c b/gcc/testsuite/c-c++-common/Wunused-parm-1.c new file mode 100644 index 0000000..355fa4a --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-parm-1.c @@ -0,0 +1,50 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused-but-set-parameter" } */ + +void baz (int); + +void +foo (int a, /* { dg-warning "parameter 'a' set but not used" } */ + int b, /* { dg-warning "parameter 'b' set but not used" } */ + int c, /* { dg-warning "parameter 'c' set but not used" } */ + int d, /* { dg-warning "parameter 'd' set but not used" } */ + int e, /* { dg-warning "parameter 'e' set but not used" } */ + int f, /* { dg-warning "parameter 'f' set but not used" } */ + int g, /* { dg-warning "parameter 'g' set but not used" } */ + int h, /* { dg-warning "parameter 'h' set but not used" } */ + int i, /* { dg-warning "parameter 'i' set but not used" } */ + int j, /* { dg-warning "parameter 'j' set but not used" } */ + int k, /* { dg-warning "parameter 'k' set but not used" } */ + int l, /* { dg-warning "parameter 'l' set but not used" } */ + int m) /* { dg-warning "parameter 'm' set but not used" } */ +{ + a = 1; + ++b; + c++; + --d; + e--; + f += 2; + g |= 2; + h -= 2; + i &= 2; + j ^= 2; + k *= 2; + l %= 2; + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (int a, int b, int c, int d, int e, int f, int g, int h, int i, int j, + int k, int l, int m, int n) +{ + b = ++a; + d = --c; + f = e--; + h = g++; + j = i += 42; + l = k *= 4; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-parm-2.c b/gcc/testsuite/c-c++-common/Wunused-parm-2.c new file mode 100644 index 0000000..2caea94 --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-parm-2.c @@ -0,0 +1,50 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused -Wextra" } */ + +void baz (int); + +void +foo (int a, /* { dg-warning "parameter 'a' set but not used" } */ + int b, /* { dg-warning "parameter 'b' set but not used" } */ + int c, /* { dg-warning "parameter 'c' set but not used" } */ + int d, /* { dg-warning "parameter 'd' set but not used" } */ + int e, /* { dg-warning "parameter 'e' set but not used" } */ + int f, /* { dg-warning "parameter 'f' set but not used" } */ + int g, /* { dg-warning "parameter 'g' set but not used" } */ + int h, /* { dg-warning "parameter 'h' set but not used" } */ + int i, /* { dg-warning "parameter 'i' set but not used" } */ + int j, /* { dg-warning "parameter 'j' set but not used" } */ + int k, /* { dg-warning "parameter 'k' set but not used" } */ + int l, /* { dg-warning "parameter 'l' set but not used" } */ + int m) /* { dg-warning "parameter 'm' set but not used" } */ +{ + a = 1; + ++b; + c++; + --d; + e--; + f += 2; + g |= 2; + h -= 2; + i &= 2; + j ^= 2; + k *= 2; + l %= 2; + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (int a, int b, int c, int d, int e, int f, int g, int h, int i, int j, + int k, int l, int m, int n) +{ + b = ++a; + d = --c; + f = e--; + h = g++; + j = i += 42; + l = k *= 4; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-parm-3.c b/gcc/testsuite/c-c++-common/Wunused-parm-3.c new file mode 100644 index 0000000..2978cd4 --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-parm-3.c @@ -0,0 +1,50 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused-but-set-parameter=3" } */ + +void baz (int); + +void +foo (int a, /* { dg-warning "parameter 'a' set but not used" } */ + int b, /* { dg-warning "parameter 'b' set but not used" } */ + int c, /* { dg-warning "parameter 'c' set but not used" } */ + int d, /* { dg-warning "parameter 'd' set but not used" } */ + int e, /* { dg-warning "parameter 'e' set but not used" } */ + int f, /* { dg-warning "parameter 'f' set but not used" } */ + int g, /* { dg-warning "parameter 'g' set but not used" } */ + int h, /* { dg-warning "parameter 'h' set but not used" } */ + int i, /* { dg-warning "parameter 'i' set but not used" } */ + int j, /* { dg-warning "parameter 'j' set but not used" } */ + int k, /* { dg-warning "parameter 'k' set but not used" } */ + int l, /* { dg-warning "parameter 'l' set but not used" } */ + int m) /* { dg-warning "parameter 'm' set but not used" } */ +{ + a = 1; + ++b; + c++; + --d; + e--; + f += 2; + g |= 2; + h -= 2; + i &= 2; + j ^= 2; + k *= 2; + l %= 2; + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (int a, int b, int c, int d, int e, int f, int g, int h, int i, int j, + int k, int l, int m, int n) +{ + b = ++a; + d = --c; + f = e--; + h = g++; + j = i += 42; + l = k *= 4; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-parm-4.c b/gcc/testsuite/c-c++-common/Wunused-parm-4.c new file mode 100644 index 0000000..063b40f --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-parm-4.c @@ -0,0 +1,50 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused-but-set-parameter=2" } */ + +void baz (int); + +void +foo (int a, /* { dg-warning "parameter 'a' set but not used" } */ + int b, /* { dg-warning "parameter 'b' set but not used" } */ + int c, /* { dg-warning "parameter 'c' set but not used" } */ + int d, /* { dg-warning "parameter 'd' set but not used" } */ + int e, /* { dg-warning "parameter 'e' set but not used" } */ + int f, + int g, + int h, + int i, + int j, + int k, + int l, + int m) /* { dg-warning "parameter 'm' set but not used" } */ +{ + a = 1; + ++b; + c++; + --d; + e--; + f += 2; + g |= 2; + h -= 2; + i &= 2; + j ^= 2; + k *= 2; + l %= 2; + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (int a, int b, int c, int d, int e, int f, int g, int h, int i, int j, + int k, int l, int m, int n) +{ + b = ++a; + d = --c; + f = e--; + h = g++; + j = i += 42; + l = k *= 4; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-parm-5.c b/gcc/testsuite/c-c++-common/Wunused-parm-5.c new file mode 100644 index 0000000..1c80a82 --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-parm-5.c @@ -0,0 +1,50 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused-but-set-parameter=1" } */ + +void baz (int); + +void +foo (int a, /* { dg-warning "parameter 'a' set but not used" } */ + int b, + int c, + int d, + int e, + int f, + int g, + int h, + int i, + int j, + int k, + int l, + int m) +{ + a = 1; + ++b; + c++; + --d; + e--; + f += 2; + g |= 2; + h -= 2; + i &= 2; + j ^= 2; + k *= 2; + l %= 2; + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (int a, int b, int c, int d, int e, int f, int g, int h, int i, int j, + int k, int l, int m, int n) +{ + b = ++a; + d = --c; + f = e--; + h = g++; + j = i += 42; + l = k *= 4; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-parm-6.c b/gcc/testsuite/c-c++-common/Wunused-parm-6.c new file mode 100644 index 0000000..ee328bd --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-parm-6.c @@ -0,0 +1,50 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused-but-set-parameter=0" } */ + +void baz (int); + +void +foo (int a, + int b, + int c, + int d, + int e, + int f, + int g, + int h, + int i, + int j, + int k, + int l, + int m) +{ + a = 1; + ++b; + c++; + --d; + e--; + f += 2; + g |= 2; + h -= 2; + i &= 2; + j ^= 2; + k *= 2; + l %= 2; + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (int a, int b, int c, int d, int e, int f, int g, int h, int i, int j, + int k, int l, int m, int n) +{ + b = ++a; + d = --c; + f = e--; + h = g++; + j = i += 42; + l = k *= 4; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-var-19.c b/gcc/testsuite/c-c++-common/Wunused-var-19.c new file mode 100644 index 0000000..32c47e6 --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-var-19.c @@ -0,0 +1,60 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused-but-set-variable" } */ + +void baz (int); + +void +foo (void) +{ + int a = 0; /* { dg-warning "variable 'a' set but not used" } */ + a = 1; + int b = 0; /* { dg-warning "variable 'b' set but not used" } */ + ++b; + int c = 0; /* { dg-warning "variable 'c' set but not used" } */ + c++; + int d = 0; /* { dg-warning "variable 'd' set but not used" } */ + --d; + int e = 0; /* { dg-warning "variable 'e' set but not used" } */ + e--; + int f = 0; /* { dg-warning "variable 'f' set but not used" } */ + f += 2; + int g = 0; /* { dg-warning "variable 'g' set but not used" } */ + g |= 2; + int h = 0; /* { dg-warning "variable 'h' set but not used" } */ + h -= 2; + int i = 0; /* { dg-warning "variable 'i' set but not used" } */ + i &= 2; + int j = 0; /* { dg-warning "variable 'j' set but not used" } */ + j ^= 2; + int k = 0; /* { dg-warning "variable 'k' set but not used" } */ + k *= 2; + int l = 0; /* { dg-warning "variable 'l' set but not used" } */ + l %= 2; + int m = 0; /* { dg-warning "variable 'm' set but not used" } */ + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (void) +{ + int a = 0; + int b = ++a; + int c = 0; + int d = --c; + int e = 0; + int f = e--; + int g = 0; + int h = g++; + int i = 0; + int j; + j = i += 42; + int k = 0; + int l; + l = k *= 4; + int m = 0; + int n; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-var-20.c b/gcc/testsuite/c-c++-common/Wunused-var-20.c new file mode 100644 index 0000000..e25b26b --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-var-20.c @@ -0,0 +1,60 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused" } */ + +void baz (int); + +void +foo (void) +{ + int a = 0; /* { dg-warning "variable 'a' set but not used" } */ + a = 1; + int b = 0; /* { dg-warning "variable 'b' set but not used" } */ + ++b; + int c = 0; /* { dg-warning "variable 'c' set but not used" } */ + c++; + int d = 0; /* { dg-warning "variable 'd' set but not used" } */ + --d; + int e = 0; /* { dg-warning "variable 'e' set but not used" } */ + e--; + int f = 0; /* { dg-warning "variable 'f' set but not used" } */ + f += 2; + int g = 0; /* { dg-warning "variable 'g' set but not used" } */ + g |= 2; + int h = 0; /* { dg-warning "variable 'h' set but not used" } */ + h -= 2; + int i = 0; /* { dg-warning "variable 'i' set but not used" } */ + i &= 2; + int j = 0; /* { dg-warning "variable 'j' set but not used" } */ + j ^= 2; + int k = 0; /* { dg-warning "variable 'k' set but not used" } */ + k *= 2; + int l = 0; /* { dg-warning "variable 'l' set but not used" } */ + l %= 2; + int m = 0; /* { dg-warning "variable 'm' set but not used" } */ + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (void) +{ + int a = 0; + int b = ++a; + int c = 0; + int d = --c; + int e = 0; + int f = e--; + int g = 0; + int h = g++; + int i = 0; + int j; + j = i += 42; + int k = 0; + int l; + l = k *= 4; + int m = 0; + int n; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-var-21.c b/gcc/testsuite/c-c++-common/Wunused-var-21.c new file mode 100644 index 0000000..0732d98 --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-var-21.c @@ -0,0 +1,60 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused-but-set-variable=3" } */ + +void baz (int); + +void +foo (void) +{ + int a = 0; /* { dg-warning "variable 'a' set but not used" } */ + a = 1; + int b = 0; /* { dg-warning "variable 'b' set but not used" } */ + ++b; + int c = 0; /* { dg-warning "variable 'c' set but not used" } */ + c++; + int d = 0; /* { dg-warning "variable 'd' set but not used" } */ + --d; + int e = 0; /* { dg-warning "variable 'e' set but not used" } */ + e--; + int f = 0; /* { dg-warning "variable 'f' set but not used" } */ + f += 2; + int g = 0; /* { dg-warning "variable 'g' set but not used" } */ + g |= 2; + int h = 0; /* { dg-warning "variable 'h' set but not used" } */ + h -= 2; + int i = 0; /* { dg-warning "variable 'i' set but not used" } */ + i &= 2; + int j = 0; /* { dg-warning "variable 'j' set but not used" } */ + j ^= 2; + int k = 0; /* { dg-warning "variable 'k' set but not used" } */ + k *= 2; + int l = 0; /* { dg-warning "variable 'l' set but not used" } */ + l %= 2; + int m = 0; /* { dg-warning "variable 'm' set but not used" } */ + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (void) +{ + int a = 0; + int b = ++a; + int c = 0; + int d = --c; + int e = 0; + int f = e--; + int g = 0; + int h = g++; + int i = 0; + int j; + j = i += 42; + int k = 0; + int l; + l = k *= 4; + int m = 0; + int n; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-var-22.c b/gcc/testsuite/c-c++-common/Wunused-var-22.c new file mode 100644 index 0000000..84f57c5 --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-var-22.c @@ -0,0 +1,60 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused-but-set-variable=2" } */ + +void baz (int); + +void +foo (void) +{ + int a = 0; /* { dg-warning "variable 'a' set but not used" } */ + a = 1; + int b = 0; /* { dg-warning "variable 'b' set but not used" } */ + ++b; + int c = 0; /* { dg-warning "variable 'c' set but not used" } */ + c++; + int d = 0; /* { dg-warning "variable 'd' set but not used" } */ + --d; + int e = 0; /* { dg-warning "variable 'e' set but not used" } */ + e--; + int f = 0; + f += 2; + int g = 0; + g |= 2; + int h = 0; + h -= 2; + int i = 0; + i &= 2; + int j = 0; + j ^= 2; + int k = 0; + k *= 2; + int l = 0; + l %= 2; + int m = 0; /* { dg-warning "variable 'm' set but not used" } */ + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (void) +{ + int a = 0; + int b = ++a; + int c = 0; + int d = --c; + int e = 0; + int f = e--; + int g = 0; + int h = g++; + int i = 0; + int j; + j = i += 42; + int k = 0; + int l; + l = k *= 4; + int m = 0; + int n; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-var-23.c b/gcc/testsuite/c-c++-common/Wunused-var-23.c new file mode 100644 index 0000000..b74c3f4 --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-var-23.c @@ -0,0 +1,60 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused-but-set-variable=1" } */ + +void baz (int); + +void +foo (void) +{ + int a = 0; /* { dg-warning "variable 'a' set but not used" } */ + a = 1; + int b = 0; + ++b; + int c = 0; + c++; + int d = 0; + --d; + int e = 0; + e--; + int f = 0; + f += 2; + int g = 0; + g |= 2; + int h = 0; + h -= 2; + int i = 0; + i &= 2; + int j = 0; + j ^= 2; + int k = 0; + k *= 2; + int l = 0; + l %= 2; + int m = 0; + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (void) +{ + int a = 0; + int b = ++a; + int c = 0; + int d = --c; + int e = 0; + int f = e--; + int g = 0; + int h = g++; + int i = 0; + int j; + j = i += 42; + int k = 0; + int l; + l = k *= 4; + int m = 0; + int n; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-var-24.c b/gcc/testsuite/c-c++-common/Wunused-var-24.c new file mode 100644 index 0000000..a59f50a --- /dev/null +++ b/gcc/testsuite/c-c++-common/Wunused-var-24.c @@ -0,0 +1,60 @@ +/* PR c/44677 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wunused-but-set-variable=0" } */ + +void baz (int); + +void +foo (void) +{ + int a = 0; + a = 1; + int b = 0; + ++b; + int c = 0; + c++; + int d = 0; + --d; + int e = 0; + e--; + int f = 0; + f += 2; + int g = 0; + g |= 2; + int h = 0; + h -= 2; + int i = 0; + i &= 2; + int j = 0; + j ^= 2; + int k = 0; + k *= 2; + int l = 0; + l %= 2; + int m = 0; + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +int +bar (void) +{ + int a = 0; + int b = ++a; + int c = 0; + int d = --c; + int e = 0; + int f = e--; + int g = 0; + int h = g++; + int i = 0; + int j; + j = i += 42; + int k = 0; + int l; + l = k *= 4; + int m = 0; + int n; + n = m |= 2; + return b + d + f + h + j + l + n; +} diff --git a/gcc/testsuite/c-c++-common/Wunused-var-7.c b/gcc/testsuite/c-c++-common/Wunused-var-7.c index 7419643..ea6babd 100644 --- a/gcc/testsuite/c-c++-common/Wunused-var-7.c +++ b/gcc/testsuite/c-c++-common/Wunused-var-7.c @@ -24,7 +24,7 @@ foo (void) void bar (void) { - int a; + int a; /* { dg-warning "set but not used" } */ int b; int c; /* { dg-warning "set but not used" } */ a = 1; @@ -36,7 +36,7 @@ bar (void) void baz (void) { - int a; + int a; /* { dg-warning "set but not used" } */ int b; int c; int d; diff --git a/gcc/testsuite/c-c++-common/attr-warn-unused-result-2.c b/gcc/testsuite/c-c++-common/attr-warn-unused-result-2.c new file mode 100644 index 0000000..f35198d --- /dev/null +++ b/gcc/testsuite/c-c++-common/attr-warn-unused-result-2.c @@ -0,0 +1,16 @@ +/* PR c/82134 */ +/* { dg-do compile } */ +/* { dg-additional-options -Wno-c++-compat { target c } } */ + +struct S {}; + +__attribute__((warn_unused_result)) struct S foo(); + +void use_s(struct S); + +void +test (void) +{ + struct S s = foo(); /* { dg-bogus "ignoring return value of" } */ + use_s(foo()); /* { dg-bogus "ignoring return value of" } */ +} diff --git a/gcc/testsuite/c-c++-common/musttail32.c b/gcc/testsuite/c-c++-common/musttail32.c new file mode 100644 index 0000000..f1b7052 --- /dev/null +++ b/gcc/testsuite/c-c++-common/musttail32.c @@ -0,0 +1,23 @@ +/* PR ipa/121023 */ +/* { dg-do compile { target musttail } } */ +/* { dg-options "-O2" } */ + +struct S { int a, b; }; + +[[gnu::noipa]] int +foo (struct S x, int y, int z) +{ + return x.a + y + z; +} + +[[gnu::noinline]] static int +bar (struct S x, int y, int z) +{ + [[gnu::musttail]] return foo ((struct S) { x.a, 0 }, y, 1); +} + +int +baz (int x) +{ + return bar ((struct S) { 1, 2 }, x, 2) + bar ((struct S) { 2, 3 }, x + 1, 2); +} diff --git a/gcc/testsuite/c-c++-common/pr121159.c b/gcc/testsuite/c-c++-common/pr121159.c new file mode 100644 index 0000000..c8c5d67 --- /dev/null +++ b/gcc/testsuite/c-c++-common/pr121159.c @@ -0,0 +1,17 @@ +/* PR middle-end/121159 */ +/* { dg-do compile { target musttail } } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times "foo \\\(\[^\n\r]*\\\); \\\[tail call\\\] \\\[must tail call\\\]" 1 "optimized" } } */ + +[[noreturn, gnu::noipa]] void +foo (void) +{ + for (;;) + ; +} + +void +bar (void) +{ + [[gnu::musttail]] return foo (); +} diff --git a/gcc/testsuite/cobol.dg/group2/_-static__compilation.cob b/gcc/testsuite/cobol.dg/group2/_-static__compilation.cob index 7843d3d..f344a84 100644 --- a/gcc/testsuite/cobol.dg/group2/_-static__compilation.cob +++ b/gcc/testsuite/cobol.dg/group2/_-static__compilation.cob @@ -1,7 +1,7 @@ *> { dg-do run } *> { dg-options "-static" } - *> { dg-output-file "group2/_-static__compilation.out" } - + *> { dg-prune-output {warning} } + *> { dg-output {hello, world} } IDENTIFICATION DIVISION. PROGRAM-ID. prog. PROCEDURE DIVISION. diff --git a/gcc/testsuite/cobol.dg/group2/_-static__compilation.out b/gcc/testsuite/cobol.dg/group2/_-static__compilation.out deleted file mode 100644 index ae0e511..0000000 --- a/gcc/testsuite/cobol.dg/group2/_-static__compilation.out +++ /dev/null @@ -1,2 +0,0 @@ -hello, world - diff --git a/gcc/testsuite/g++.dg/abi/regparm1.C b/gcc/testsuite/g++.dg/abi/regparm1.C index c471046..3aae3dd 100644 --- a/gcc/testsuite/g++.dg/abi/regparm1.C +++ b/gcc/testsuite/g++.dg/abi/regparm1.C @@ -1,5 +1,5 @@ // PR c++/29911 (9381) -// { dg-do run { target i?86-*-* x86_64-*-* } } +// { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } // { dg-require-effective-target c++11 } extern "C" int printf(const char *, ...); diff --git a/gcc/testsuite/g++.dg/coroutines/torture/pr121219.C b/gcc/testsuite/g++.dg/coroutines/torture/pr121219.C new file mode 100644 index 0000000..d1e7cb1 --- /dev/null +++ b/gcc/testsuite/g++.dg/coroutines/torture/pr121219.C @@ -0,0 +1,149 @@ +// PR c++/121219 +// { dg-do run } + +#include <coroutine> +#ifdef OUTPUT +#include <iostream> +#endif +#include <stdexcept> + +struct Task { + struct promise_type; + using handle_type = std::coroutine_handle<promise_type>; + + struct promise_type { + Task* task_; + int result_; + + static void* operator new(std::size_t size) noexcept { + void* p = ::operator new(size, std::nothrow); +#ifdef OUTPUT + std::cerr << "operator new (no arg) " << size << " -> " << p << std::endl; +#endif + return p; + } + static void operator delete(void* ptr) noexcept { + return ::operator delete(ptr, std::nothrow); + } +#if 1 // change to 0 to fix crash + static Task get_return_object_on_allocation_failure() noexcept { +#ifdef OUTPUT + std::cerr << "get_return_object_on_allocation_failure" << std::endl; +#endif + return Task(nullptr); + } +#endif + + auto get_return_object() { +#ifdef OUTPUT + std::cerr << "get_return_object" << std::endl; +#endif + return Task{handle_type::from_promise(*this)}; + } + + auto initial_suspend() { +#ifdef OUTPUT + std::cerr << "initial_suspend" << std::endl; +#endif + return std::suspend_always{}; + } + + auto final_suspend() noexcept { +#ifdef OUTPUT + std::cerr << "final_suspend" << std::endl; +#endif + return std::suspend_never{}; // Coroutine auto-destructs + } + + ~promise_type() { + if (task_) { +#ifdef OUTPUT + std::cerr << "promise_type destructor: Clearing Task handle" << std::endl; +#endif + task_->h_ = nullptr; + } + } + + void unhandled_exception() { +#ifdef OUTPUT + std::cerr << "unhandled_exception" << std::endl; +#endif + std::terminate(); + } + + void return_value(int value) { +#ifdef OUTPUT + std::cerr << "return_value: " << value << std::endl; +#endif + result_ = value; + if (task_) { + task_->result_ = value; + task_->completed_ = true; + } + } + }; + + handle_type h_; + int result_; + bool completed_ = false; + + Task(handle_type h) : h_(h) { +#ifdef OUTPUT + std::cerr << "Task constructor" << std::endl; +#endif + if (h_) { + h_.promise().task_ = this; // Link promise to Task + } + } + + ~Task() { +#ifdef OUTPUT + std::cerr << "~Task destructor" << std::endl; +#endif + // Only destroy handle if still valid (coroutine not completed) + if (h_) { +#ifdef OUTPUT + std::cerr << "Destroying coroutine handle" << std::endl; +#endif + h_.destroy(); + } + } + + bool done() const { + return completed_ || !h_ || h_.done(); + } + + void resume() { +#ifdef OUTPUT + std::cerr << "Resuming task" << std::endl; +#endif + if (h_) h_.resume(); + } + + int result() const { + if (!done()) throw std::runtime_error("Result not available"); + return result_; + } +}; + +Task my_coroutine() { +#ifdef OUTPUT + std::cerr << "Inside my_coroutine" << std::endl; +#endif + co_return 42; +} + +int main() { + auto task = my_coroutine(); + while (!task.done()) { +#ifdef OUTPUT + std::cerr << "Resuming task in main" << std::endl; +#endif + task.resume(); + } +#ifdef OUTPUT + std::cerr << "Task completed in main, printing result" << std::endl; +#endif + if (task.result() != 42) + __builtin_abort (); +} diff --git a/gcc/testsuite/g++.dg/cpp/if-comma-1.C b/gcc/testsuite/g++.dg/cpp/if-comma-1.C new file mode 100644 index 0000000..0daaff9 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp/if-comma-1.C @@ -0,0 +1,42 @@ +// PR c++/120778 +// { dg-do preprocess } +// { dg-options "-pedantic-errors" } + +#if (1, 2) +#define M1 1 +#else +#error +#endif +#if 1 ? 2, 3 : 4 +#define M2 2 +#else +#error +#endif +#if 0 ? 2, 0 : 1 +#define M3 3 +#else +#error +#endif +#if 0 || (1, 2) +#define M4 4 +#else +#error +#endif +#if 1 || (1, 2) +#define M5 5 +#else +#error +#endif +#if (1, 2) && 1 +#define M6 6 +#else +#error +#endif +#if 1 && (1, 2) +#define M7 7 +#else +#error +#endif +#if M1 + M2 + M3 + M4 + M5 + M6 + M7 != 28 +#error +#endif diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-array29.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-array29.C new file mode 100644 index 0000000..714d050 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-array29.C @@ -0,0 +1,13 @@ +// PR c++/87097 +// { dg-do compile { target c++11 } } + +struct A { + constexpr A() : data() {} + struct X { int n; }; + X data[2]; +}; + +static_assert((A(), true), ""); +static_assert(A().data[0].n == 0, ""); +static_assert(A().data[1].n == 0, ""); +constexpr A x; diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-array30.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-array30.C new file mode 100644 index 0000000..3f72407 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-array30.C @@ -0,0 +1,22 @@ +// PR c++/120800 +// { dg-do compile { target c++11 } } + +template<typename T> +struct Container +{ + T m_data[1] {}; +}; + +class Element +{ +private: + Element() = default; + +private: + bool m_bool1 { false }; + bool m_bool2; + + friend struct Container<Element>; +}; + +Container<Element> element; diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-ellipsis2.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-ellipsis2.C index b6a5323..c473257 100644 --- a/gcc/testsuite/g++.dg/cpp0x/constexpr-ellipsis2.C +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-ellipsis2.C @@ -9,4 +9,6 @@ struct A constexpr int ellipsis(...) { return 1; } -static_assert(ellipsis(A().empty()), "Error"); // { dg-error "non-constant condition|empty" } +static_assert(ellipsis(A().empty()), "Error"); // { dg-error "non-constant condition" } +// { dg-error "call to non-'constexpr' function 'bool A::empty\\\(\\\)'" "" { target c++23_down } .-1 } +// { dg-error "temporary of non-literal type 'A' in a constant expression" "" { target c++26 } .-2 } diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-throw.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-throw.C index 9c49fa4..9abf4a3 100644 --- a/gcc/testsuite/g++.dg/cpp0x/constexpr-throw.C +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-throw.C @@ -2,8 +2,8 @@ // Explicit { dg-require-effective-target exceptions_enabled } to avoid verify compiler messages FAILs for '-fno-exceptions'. constexpr int may_throw(bool decide) { - return decide ? 42 : throw -1; // { dg-error "throw" } + return decide ? 42 : throw -1; // { dg-error "throw" "" { target c++23_down } } } -constexpr int x = may_throw(false); // { dg-message "may_throw" } -constexpr int y = may_throw(true); +constexpr int x = may_throw(false); // { dg-message "may_throw" "" { target c++23_down } } +constexpr int y = may_throw(true); // { dg-error "uncaught exception '-1'" "" { target c++26 } .-1 } diff --git a/gcc/testsuite/g++.dg/cpp0x/duplicate1.C b/gcc/testsuite/g++.dg/cpp0x/duplicate1.C index 1545e1c..4e85edc 100644 --- a/gcc/testsuite/g++.dg/cpp0x/duplicate1.C +++ b/gcc/testsuite/g++.dg/cpp0x/duplicate1.C @@ -6,7 +6,7 @@ struct A virtual void foo() const; }; -struct B final final : A /* { dg-error "duplicate virt-specifier" } +struct B final final : A /* { dg-error "duplicate 'final' specifier" } { dg-begin-multiline-output "" } struct B final final : A ^~~~~ diff --git a/gcc/testsuite/g++.dg/cpp0x/final1.C b/gcc/testsuite/g++.dg/cpp0x/final1.C new file mode 100644 index 0000000..1d64095 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/final1.C @@ -0,0 +1,11 @@ +// PR c++/120628 +// { dg-do compile { target c++98_only } } + +namespace A { + struct B {}; + struct B final = {}; +} +namespace C { + struct D { D (int, int); }; + struct D final (42, 0); +} diff --git a/gcc/testsuite/g++.dg/cpp0x/final2.C b/gcc/testsuite/g++.dg/cpp0x/final2.C new file mode 100644 index 0000000..d8d5866 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/final2.C @@ -0,0 +1,26 @@ +// PR c++/120628 +// { dg-do compile } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++14 } } + +namespace U { + struct A {}; + struct A final = {}; +} +namespace V { + template <int N> + struct B {}; + template <int N> + struct B<N> final = {}; // { dg-warning "variable templates only available with" "" { target c++11_down } } +} +struct C { + struct D {}; + static D foo (); + struct D final = foo (); // { dg-warning "non-static data member initializers only available with" "" { target c++98_only } } +}; +namespace W { + struct E { struct F {}; }; + struct E::F final = {}; +} +template <int N> +struct V::B<N> final = {}; // { dg-warning "variable templates only available with" "" { target c++11_down } } diff --git a/gcc/testsuite/g++.dg/cpp0x/override2.C b/gcc/testsuite/g++.dg/cpp0x/override2.C index ab4dec4..d7f542e 100644 --- a/gcc/testsuite/g++.dg/cpp0x/override2.C +++ b/gcc/testsuite/g++.dg/cpp0x/override2.C @@ -23,9 +23,9 @@ struct D5 : B3<D5> {}; struct D6 : B4<D6> {}; // { dg-error "cannot derive from 'final' base" } -struct B6 final final {}; // { dg-error "duplicate virt-specifier" } +struct B6 final final {}; // { dg-error "duplicate 'final' specifier" } -struct B7 override {}; // { dg-error "cannot specify 'override' for a class" } +struct B7 override {}; // { dg-error "variable 'B7 override' has initializer but incomplete type" } namespace N { @@ -45,7 +45,7 @@ int main() struct B2 final; // { dg-error "redeclaration" } struct B2 override; // { dg-message "previously declared here" } struct B2 final {}; // { dg-error "redefinition" } - struct B2 override {}; // { dg-error "cannot specify 'override' for a class" } + struct B2 override {}; // { dg-error "redeclaration of 'main\\\(\\\)::B2 override'" } B2 override{}; // { dg-error "redeclaration" } struct foo final {}; // { dg-message "previous definition" } struct foo final {}; // { dg-error "redefinition" } diff --git a/gcc/testsuite/g++.dg/cpp0x/override5.C b/gcc/testsuite/g++.dg/cpp0x/override5.C new file mode 100644 index 0000000..3382c14 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/override5.C @@ -0,0 +1,26 @@ +// PR c++/120569 +// { dg-do compile } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++14 } } + +namespace U { + struct A {}; + struct A override {}; // { dg-warning "extended initializer lists only available with" "" { target c++98_only } } +} +namespace V { + template <int N> + struct B {}; + template <int N> + struct B<N> override {}; // { dg-warning "extended initializer lists only available with" "" { target c++98_only } } +} // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } +struct C { + struct D {}; + struct D override {}; // { dg-warning "extended initializer lists only available with" "" { target c++98_only } } +}; // { dg-warning "non-static data member initializers only available with" "" { target c++98_only } .-1 } +namespace W { + struct E { struct F {}; }; + struct E::F override {}; // { dg-warning "extended initializer lists only available with" "" { target c++98_only } } +} +template <int N> +struct V::B<N> override {}; // { dg-warning "extended initializer lists only available with" "" { target c++98_only } } + // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } diff --git a/gcc/testsuite/g++.dg/cpp0x/override6.C b/gcc/testsuite/g++.dg/cpp0x/override6.C new file mode 100644 index 0000000..601e91d --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/override6.C @@ -0,0 +1,26 @@ +// PR c++/120628 +// { dg-do compile } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++14 } } + +namespace U { + struct A {}; + struct A override = {}; +} +namespace V { + template <int N> + struct B {}; + template <int N> + struct B<N> override = {}; // { dg-warning "variable templates only available with" "" { target c++11_down } } +} +struct C { + struct D {}; + static D foo (); + struct D override = foo (); // { dg-warning "non-static data member initializers only available with" "" { target c++98_only } } +}; +namespace W { + struct E { struct F {}; }; + struct E::F override = {}; +} +template <int N> +struct V::B<N> override = {}; // { dg-warning "variable templates only available with" "" { target c++11_down } } diff --git a/gcc/testsuite/g++.dg/cpp1y/constexpr-84192.C b/gcc/testsuite/g++.dg/cpp1y/constexpr-84192.C index f7439d8..18efd23 100644 --- a/gcc/testsuite/g++.dg/cpp1y/constexpr-84192.C +++ b/gcc/testsuite/g++.dg/cpp1y/constexpr-84192.C @@ -12,7 +12,7 @@ void f2 () { for (;;) - constexpr bool b = ({ break; false; }) && false; // { dg-error "is not a constant expression" } + constexpr bool b = ({ break; false; }) && false; // { dg-error "'break' outside of a loop or 'switch'" } } constexpr bool diff --git a/gcc/testsuite/g++.dg/cpp1y/constexpr-throw.C b/gcc/testsuite/g++.dg/cpp1y/constexpr-throw.C index b5fa6ca..75e2fb8 100644 --- a/gcc/testsuite/g++.dg/cpp1y/constexpr-throw.C +++ b/gcc/testsuite/g++.dg/cpp1y/constexpr-throw.C @@ -27,8 +27,8 @@ constexpr int fun(int n) { case 0: return 1; default: - throw; // { dg-error "not a constant expression" } - } + throw; // { dg-error "not a constant expression" "" { target c++23_down } } + } // { dg-error "'void __cxa_rethrow\\\(\\\)' called with no caught exceptions active" "" { target c++26 } .-1 } } static_assert(fun(0), ""); diff --git a/gcc/testsuite/g++.dg/cpp1z/constexpr-asm-5.C b/gcc/testsuite/g++.dg/cpp1z/constexpr-asm-5.C index 35beb27..2c69b3b 100644 --- a/gcc/testsuite/g++.dg/cpp1z/constexpr-asm-5.C +++ b/gcc/testsuite/g++.dg/cpp1z/constexpr-asm-5.C @@ -18,7 +18,7 @@ struct H { short size () const { return 0; } constexpr const char *data () const { return ""; } }; struct I { constexpr signed char size () const { return 0; } const char *data () const { return ""; } }; -struct J { constexpr int size () const { return j ? throw 1 : 0; } // { dg-error "expression '<throw-expression>' is not a constant expression" } +struct J { constexpr int size () const { return j ? throw 1 : 0; } // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++23_down } } constexpr const char *data () const { return ""; }; constexpr J (int x) : j (x) {} int j; }; @@ -114,6 +114,7 @@ foo () asm ((J (0))); asm ("" :: (J (1)) (1)); // { dg-error "constexpr string 'size\\\(\\\)' must be a constant expression" } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } asm ((M {})); #if __cpp_constexpr_dynamic_alloc >= 201907L asm ((N {})); // { dg-error "constexpr string 'data\\\(\\\)\\\[0\\\]' must be a constant expression" "" { target c++20 } } @@ -188,6 +189,7 @@ bar () asm ((J (0))); asm ("" :: (J (1)) (1)); // { dg-error "constexpr string 'size\\\(\\\)' must be a constant expression" } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } asm ((M {})); #if __cpp_constexpr_dynamic_alloc >= 201907L asm ((N {})); // { dg-error "constexpr string 'data\\\(\\\)\\\[0\\\]' must be a constant expression" "" { target c++20 } } @@ -272,7 +274,7 @@ namespace NN #if __cplusplus >= 201402L struct J { static constexpr int size () { return 0; } - static constexpr const char *data (int x = 0) { if (x) return nullptr; else throw 1; } }; // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++14 } } + static constexpr const char *data (int x = 0) { if (x) return nullptr; else throw 1; } }; // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target { c++14 && c++23_down } } } #endif #if __cpp_if_consteval >= 202106L struct K { @@ -284,12 +286,12 @@ namespace NN static constexpr const char *data () { if consteval { return "test"; } else { throw 1; } } }; struct M { - static constexpr int size () { if consteval { throw 1; } else { return 4; } } // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++23 } } + static constexpr int size () { if consteval { throw 1; } else { return 4; } } // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++23_only } } static constexpr const char *data () { return "test"; } }; struct N { static constexpr int size () { return 4; } - static constexpr const char *data () { if consteval { throw 1; } else { return "test"; } } // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++23 } } + static constexpr const char *data () { if consteval { throw 1; } else { return "test"; } } // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++23_only } } }; #endif struct O { constexpr int operator () () const { return 12; } }; @@ -318,12 +320,15 @@ namespace NN asm ((I {})); #if __cplusplus >= 201402L asm ((J {})); // { dg-error "constexpr string 'data\\\(\\\)' must be a core constant expression" "" { target c++14 } } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } #endif #if __cpp_if_consteval >= 202106L asm ((K {})); asm ((L {})); asm ((M {})); // { dg-error "constexpr string 'size\\\(\\\)' must be a constant expression" "" { target c++23 } } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } asm ((N {})); // { dg-error "constexpr string 'data\\\(\\\)\\\[0\\\]' must be a constant expression" "" { target c++23 } } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } #endif asm ((Q {})); asm ((R {})); @@ -348,12 +353,15 @@ namespace NN asm ((I {})); #if __cplusplus >= 201402L asm ((J {})); // { dg-error "constexpr string 'data\\\(\\\)' must be a core constant expression" "" { target c++14 } } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } #endif #if __cpp_if_consteval >= 202106L asm ((K {})); asm ((L {})); asm ((M {})); // { dg-error "constexpr string 'size\\\(\\\)' must be a constant expression" "" { target c++23 } } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } asm ((N {})); // { dg-error "constexpr string 'data\\\(\\\)\\\[0\\\]' must be a constant expression" "" { target c++23 } } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } #endif asm ((Q {})); asm ((R {})); diff --git a/gcc/testsuite/g++.dg/cpp1z/nontype8.C b/gcc/testsuite/g++.dg/cpp1z/nontype8.C new file mode 100644 index 0000000..b81e85b --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1z/nontype8.C @@ -0,0 +1,12 @@ +// Test that the diagnostic mentions lack of constexpr +// { dg-do compile { target c++17 } } + +template <auto f> void g() {} +void x() +{ + using fp = void (*)(); + fp f = nullptr; // { dg-message "constexpr" } + g<f>(); // { dg-error "" } + int *p = nullptr; // { dg-message "constexpr" } + g<p>(); // { dg-error "" } +} diff --git a/gcc/testsuite/g++.dg/cpp23/explicit-obj-lambda18.C b/gcc/testsuite/g++.dg/cpp23/explicit-obj-lambda18.C new file mode 100644 index 0000000..d54a93d --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp23/explicit-obj-lambda18.C @@ -0,0 +1,12 @@ +// PR c++/114632 +// { dg-do compile { target c++23 } } + +struct S {}; + +auto lambda = [](this auto& self, const int x) /* -> void */ {}; + +int main() +{ + void (*func)(S&, int) = lambda; // { dg-error "" } + return 0; +} diff --git a/gcc/testsuite/g++.dg/cpp23/static-operator-call7.C b/gcc/testsuite/g++.dg/cpp23/static-operator-call7.C new file mode 100644 index 0000000..7c381e6 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp23/static-operator-call7.C @@ -0,0 +1,12 @@ +// PR c++/114632 +// { dg-do compile { target c++23 } } + +struct S {}; + +auto lambda = [](auto, const int x) static /* -> void */ {}; + +int main() +{ + void (*func)(int, int) = lambda; + return 0; +} diff --git a/gcc/testsuite/g++.dg/cpp26/consteval-block1.C b/gcc/testsuite/g++.dg/cpp26/consteval-block1.C new file mode 100644 index 0000000..9e2cf22 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/consteval-block1.C @@ -0,0 +1,82 @@ +// { dg-do compile { target c++26 } } +// Test consteval blocks, as specified by P2996. + +constexpr int fn () { return 42; } +struct M { + static consteval void foo () {} +}; + +consteval { } +consteval { fn (); } +consteval { M::foo (); } +consteval { auto x = fn (); return; } +consteval { + [](int i) { return i; }(5); +} +auto lam = [] { }; +consteval { lam (); } + +struct S { + consteval { } +}; + +struct S2 { + consteval { fn(); } +}; + +class C { + consteval { } +}; + +class C2 { + consteval { M::foo (); } +}; + +union U { + consteval { } +}; + +template<typename> +struct TS { + consteval { } +}; + +template<typename... Ts> +struct TS2 { + consteval { + (Ts::foo (), ...); + } +}; + +TS2<M> ts2; + +void +g () +{ + consteval { } +} + +template<typename> +void +tg () +{ + consteval { } +} + +void die (); +constexpr int +bar (int i) +{ + if (i != 42) + die (); + return 0; +} + +void +foo () +{ + constexpr int r = 42; + consteval { + bar (r); + } +} diff --git a/gcc/testsuite/g++.dg/cpp26/consteval-block2.C b/gcc/testsuite/g++.dg/cpp26/consteval-block2.C new file mode 100644 index 0000000..895fcb6 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/consteval-block2.C @@ -0,0 +1,49 @@ +// { dg-do compile { target c++26 } } +// Test consteval blocks, as specified by P2996. + +void fn (); + +consteval { fn (); } // { dg-error "call to non-.constexpr. function" } +consteval { return 42; } // { dg-error "return-statement with a value" } + +struct S { + consteval { + fn (); // { dg-error "call to non-.constexpr. function" } + } + consteval { + return 42; // { dg-error "return-statement with a value" } + } +}; + +template<typename T> +constexpr void foo (T t) { return t; } // { dg-error "return-statement with a value" } + +template<int N> +struct R { + consteval { foo (N); } +}; + +R<1> r; + +template<typename T> +constexpr void foo2 (T t) { return t; } // { dg-error "return-statement with a value" } + +template<int N> +void +f () +{ + consteval { foo2 (1); } +} + +constexpr int bar (int) { return 0; } + +void +g () +{ + f<1>(); + + int r = 42; + consteval { + bar (r); // { dg-error ".r. is not captured" } + } +} diff --git a/gcc/testsuite/g++.dg/cpp26/consteval-block3.C b/gcc/testsuite/g++.dg/cpp26/consteval-block3.C new file mode 100644 index 0000000..c1221c3 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/consteval-block3.C @@ -0,0 +1,41 @@ +// { dg-do compile { target c++26 } } +// Test consteval blocks, as specified by P2996. +// Test that we actually evaluate the consteval block. + +void bar () { } + +template<int N> +constexpr void +fn () +{ + if (N > 0) + bar (); // { dg-error "call to non-.constexpr. function" } +} + +template<int N> +struct S { + consteval { fn<N>(); } // { dg-error "called in a constant expression" } +}; + +S<1> s; + +template<int N> +constexpr void +fn2 () +{ + if (N > 0) + bar (); // { dg-error "call to non-.constexpr. function" } +} + +template<int N> +void +g () +{ + consteval { fn2<N>(); } // { dg-error "called in a constant expression" } +} + +void +f () +{ + g<1>(); +} diff --git a/gcc/testsuite/g++.dg/cpp26/consteval-block4.C b/gcc/testsuite/g++.dg/cpp26/consteval-block4.C new file mode 100644 index 0000000..be95e17 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/consteval-block4.C @@ -0,0 +1,41 @@ +// { dg-do compile { target c++26 } } +// Test consteval blocks, as specified by P2996. +// Test that we actually evaluate the consteval block. + +void bar () { } + +template<int N> +constexpr void +fn () +{ + if (N > 0) + bar (); +} + +template<int N> +struct S { + consteval { fn<N>(); } +}; + +S<0> s; + +template<int N> +constexpr void +fn2 () +{ + if (N > 0) + bar (); +} + +template<int N> +void +g () +{ + consteval { fn2<N>(); } +} + +void +f () +{ + g<0>(); +} diff --git a/gcc/testsuite/g++.dg/cpp26/consteval-block5.C b/gcc/testsuite/g++.dg/cpp26/consteval-block5.C new file mode 100644 index 0000000..462cebe --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/consteval-block5.C @@ -0,0 +1,70 @@ +// { dg-do compile { target c++26 } } +// Test consteval blocks, as specified by P2996. + +void bar () { } + +template<int N> +constexpr void +fn () +{ + if (N > 0) + bar (); +} + +template<typename> +struct S { + consteval { fn<1>(); } +}; + +template<> +struct S<int> { + consteval { fn<0>(); } +}; + +S<int> s1; + +template<typename T> +struct S<T*> { + consteval { fn<0>(); } +}; + +S<int *> s2; + +template<typename T, int N> +struct W { + consteval { T t; fn<N - 1>(); } +}; + +template<typename T> +struct W<T, 0> { + consteval { T t; fn<0>(); } +}; + +template<> +struct W<char, 0> { + consteval { fn<0>(); } +}; + +W<int, 0> w1; +W<int, 1> w2; +W<char, 0> w3; + +template<typename> +void +f () +{ + consteval { fn<1>(); } +} + +template<> +void +f<int> () +{ + consteval { fn<0>(); } +} + +void +g () +{ + f<int> (); +} diff --git a/gcc/testsuite/g++.dg/cpp26/consteval-block6.C b/gcc/testsuite/g++.dg/cpp26/consteval-block6.C new file mode 100644 index 0000000..ca90b3e --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/consteval-block6.C @@ -0,0 +1,108 @@ +// { dg-do compile { target c++26 } } +// Test consteval blocks, as specified by P2996. + +void die () {} + +template<int N> +constexpr void +fn () +{ + if (N > 0) + die (); +} + +template<int N> +void +fn2 () +{ + struct S { + consteval { + fn<N>(); + } + }; +} + +template<int N> +struct A { + struct B { + consteval { + fn<N>(); + } + }; + template<int M> + struct C { + consteval { + fn<N + M>(); + } + }; +}; + +template<int N> +struct D { + constexpr static int i = 0; + struct E { + consteval { + fn<i>(); + } + }; +}; + +A<0>::B b; +A<0>::C<0> c; +D<0>::E e; + +void +f () +{ + fn2<0>(); +} + +static constexpr int j = 0; +const int x = 0; + +consteval { + fn<j>(); + consteval { + fn<j + j>(); + consteval { + fn<j + j + j>(); + consteval { + fn<j + j + x>(); + consteval { + fn<j + x>(); + } + } + } + } +} + +struct R { constexpr R() {} }; + +template<int N> +constexpr auto X = N; + +consteval { + R{}; + constexpr auto x = 0; + fn<x>(); + fn<X<0>>(); + if consteval + { + fn<j>(); + } + else + { + die (); + } +} + +template<typename T> +struct G { + consteval { + using U = T[3]; + U arr{}; + int i = arr[2]; + } +}; + +G<int> g; diff --git a/gcc/testsuite/g++.dg/cpp26/consteval-block7.C b/gcc/testsuite/g++.dg/cpp26/consteval-block7.C new file mode 100644 index 0000000..231682f --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/consteval-block7.C @@ -0,0 +1,12 @@ +// { dg-do compile { target c++26 } } +// Test consteval blocks, as specified by P2996. + +consteval { + template <class T> // { dg-error "template declaration cannot appear at block scope" } + struct X { }; + + template <class T> // { dg-error "template declaration cannot appear at block scope" } + concept C = true; + + return; // OK +} diff --git a/gcc/testsuite/g++.dg/cpp26/consteval-block8.C b/gcc/testsuite/g++.dg/cpp26/consteval-block8.C new file mode 100644 index 0000000..ad164fd --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/consteval-block8.C @@ -0,0 +1,38 @@ +// { dg-do compile { target c++26 } } +// Test consteval blocks, as specified by P2996. + +/* __func__ won't be set. Make sure we warn. */ +consteval { __func__; } // { dg-error "outside of function scope" } +consteval { { __func__; } } // { dg-error "outside of function scope" } +consteval { []() mutable consteval -> void { __func__; } (); } // { dg-bogus "outside of function scope" } +consteval { []() mutable consteval -> void { consteval { __func__; } } (); } // { dg-bogus "outside of function scope" } + +auto l = []() -> void { + consteval { __func__; } // { dg-bogus "outside of function scope" } +}; + +struct F { + consteval { __func__; } // { dg-error "outside of function scope" } +}; +template<typename> +struct TF { + consteval { __func__; } // { dg-error "outside of function scope" } +}; + +void +g () +{ + consteval { __func__; } // { dg-bogus "outside of function scope" } + // Not a consteval-block-declaration. + []() mutable consteval -> void { __func__; } (); // { dg-bogus "outside of function scope" } +} + +template<typename> +void +f () +{ + consteval { __func__; } // { dg-bogus "outside of function scope" } + { consteval { __func__; } } // { dg-bogus "outside of function scope" } + __func__; // { dg-bogus "outside of function scope" } + []() mutable consteval -> void { __func__; } (); // { dg-bogus "outside of function scope" } +} diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh1.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh1.C new file mode 100644 index 0000000..9eed3aa --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh1.C @@ -0,0 +1,140 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +struct S { + constexpr S () : s (new int (0)) {} + constexpr S (int x) : s (new int (x)) {} + constexpr S (const S &x) : s (new int (*x.s)) {} + constexpr ~S () { delete s; } + int *s; +}; +struct T : public S { + constexpr T () : S () {} + constexpr T (int x) : S (x) {} + constexpr T (const T &x) : S (*x.s) {} + constexpr ~T () {} +}; +struct U : public T { + constexpr U () : T () {} + constexpr U (int x) : T (x) {} + constexpr U (const U &x) : T (*x.s) {} + constexpr ~U () {} +}; +struct V : public T { + constexpr V () : T () {} + constexpr V (int x) : T (x) {} + constexpr V (const U &x) : T (*x.s) {} + constexpr ~V () {} +}; + +template <typename X> +constexpr int +foo (X x) +{ + try { throw x; } + catch (int &a) { return 42 + a; } + catch (const unsigned b) { return 43 + b; } + catch (const long &c) { return 44 + c; } + catch (bool d) { return 45 + d; } + catch (const U &e) { return 46 + *e.s; } + catch (const T &f) { return 47 + *f.s; } + catch (S g) { return 48 + *g.s; } + catch (int *const &h) { return 49; } + catch (long long *) { return 50; } + catch (const S *const &) { return 51; } + catch (...) { return 52; } +} + +template <typename X> +constexpr int +bar (const X &x) +{ + throw x; +} + +template <typename X> +constexpr int +baz (const X &x) +{ + try + { + try { bar (x); } + catch (int &a) { a += 80; throw; } + catch (long b) { b += 80; throw; } + catch (U &c) { c.s[0] += 82; throw; } + catch (V d) { d.s[0] += 83; throw; } + } + catch (int a) { return 42 + a; } + catch (const long &b) { return 43 + b; } + catch (S &c) { return 44 + c.s[0]; } + catch (long long d) { return 45 + d; } + catch (...) { return -1; } +} + +constexpr int +qux (int x, bool y = true) +{ + try + { + switch (x) + { + case 0: throw 42; break; + case 1: x = y ? throw 43 : 5; break; + case 2: x = -(throw 44, 6); break; + case 3: x = x + (throw 45, 7); break; + case 4: x = (throw 46, 8) + x; break; + case 5: x = (throw 47, y) ? 4 : 5; break; + case 6: x += (throw 48, y); break; + case 7: x = (double) (throw 49, y); break; + case 8: x = foo ((throw 50, x)); break; + default: break; + } + } + catch (int a) { return a; } + return -1; +} + +constexpr int +corge () +{ + try { throw 0; } + catch (int *const &h) { return 49; } + catch (long long *) { return 50; } + catch (const S *const &) { return 51; } + catch (...) { return 52; } +} + +static_assert (foo (12) == 54); +static_assert (foo (12U) == 55); +static_assert (foo (12L) == 56); +static_assert (foo (false) == 45); +static_assert (foo (true) == 46); +static_assert (foo (U (12)) == 58); +static_assert (foo (T (20)) == 67); +static_assert (foo (S (30)) == 78); +static_assert (foo (nullptr) == 49); +static_assert (foo ((int *)nullptr) == 49); +static_assert (foo ((long long *)nullptr) == 50); +static_assert (foo ((const S *)nullptr) == 51); +static_assert (foo ((const T *)nullptr) == 51); +static_assert (foo ((const U *)nullptr) == 51); +static_assert (foo (12ULL) == 52); +static_assert (baz (5) == 127); +static_assert (baz (6L) == 49); +static_assert (baz (U (25)) == 151); +static_assert (baz (V (26)) == 70); +static_assert (baz (T (27)) == 71); +static_assert (baz (S (28)) == 72); +static_assert (baz (7LL) == 52); +static_assert (baz (8ULL) == -1); +static_assert (qux (0) == 42); +static_assert (qux (1) == 43); +static_assert (qux (2) == 44); +static_assert (qux (3) == 45); +static_assert (qux (4) == 46); +static_assert (qux (5) == 47); +static_assert (qux (6) == 48); +static_assert (qux (7) == 49); +static_assert (qux (8) == 50); +static_assert (corge () == 52); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh10.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh10.C new file mode 100644 index 0000000..a86cc4d --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh10.C @@ -0,0 +1,110 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +struct S { +}; +struct T { + constexpr ~T () noexcept (false) { throw S {}; } +}; +struct U { + int u; +}; +struct V { + int v; + constexpr V (int x) + try : v { x } + { + if (v > 42) + throw U { 42 }; + } + catch (U &u) + { + --u.u; + } +}; +struct W { + constexpr ~W () { ++w; } + int &w; +}; +struct X : public V { + constexpr X (int x) + try : V(x) + { + } + catch (U &u) + { + --u.u; + } +}; + +constexpr int +foo (bool x) +{ + try + { + T t; // { dg-error "'std::terminate' called after throwing an exception '42'" } + if (x) // { dg-message "destructor exited with an exception" "" { target *-*-* } .-1 } + throw 42; + return 10; + } + catch (S) + { + return 11; + } +} + +constexpr int +bar () +{ + V v { 42 }; + try + { + V w { 43 }; + } + catch (const U &u) + { + if (u.u == 41) + return 44; + } + return -1; +} + +constexpr int +baz () +{ + int i = 42; + try + { + W w { i }; + throw S (); + } + catch (...) + { + if (i == 43) + return 42; + } + return -1; +} + +constexpr int +qux () +{ + X v { 42 }; + try + { + X w { 43 }; + } + catch (const U &u) + { + if (u.u == 40) + return 48; + } + return -1; +} + +static_assert (foo (false) == 11); +constexpr int a = foo (true); // { dg-message "in 'constexpr' expansion of" } +static_assert (bar () == 44); +static_assert (baz () == 42); +static_assert (qux () == 48); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh11.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh11.C new file mode 100644 index 0000000..287e066 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh11.C @@ -0,0 +1,69 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +struct A { + explicit constexpr A (int x) noexcept : a (x) {} + constexpr virtual int foo () const noexcept { return a; } + constexpr virtual ~A () {} + int a; +}; +struct B : public A { + explicit constexpr B (int x) noexcept : A (x) {} + constexpr int foo () const noexcept override { return a | 0x10; } +}; +struct C : public A { + explicit constexpr C (int x) noexcept : A (x) {} +}; +struct D : public A { + explicit constexpr D (int x) noexcept : A (x) {} +}; +struct E { + constexpr E () noexcept : e (0) {} + explicit constexpr E (int x) noexcept : e (x) {} + int e; +}; +struct F : public E, public B { + explicit constexpr F (int x) noexcept : B (x) {} +}; +struct G : public E, public C { + explicit constexpr G (int x) noexcept : C (x) {} +}; +struct H : public E, public D { + explicit constexpr H (int x) noexcept : D (x) {} +}; + +consteval int +bar (void (*fn) ()) +{ + try + { + fn (); + } + catch (C &a) + { + return a.foo () | 0x20; + } + catch (const C &b) // { dg-warning "exception of type 'C' will be caught by earlier handler" } + { + return b.foo () | 0x60; + } + catch (A &c) + { + return c.foo (); + } + catch (const A &d) // { dg-warning "exception of type 'A' will be caught by earlier handler" } + { + return d.foo () | 0x40; + } + return -1; +} + +static_assert (bar ([] { throw A { 1 }; }) == 1); +static_assert (bar ([] { throw B { 2 }; }) == 0x12); +static_assert (bar ([] { throw C { 3 }; }) == 0x23); +static_assert (bar ([] { throw D { 4 }; }) == 4); +constexpr int a = bar ([] { throw E { 5 }; }); // { dg-error "uncaught exception 'E\\\{5\\\}'" } +static_assert (bar ([] { throw F { 6 }; }) == 0x16); +static_assert (bar ([] { throw G { 7 }; }) == 0x27); +static_assert (bar ([] { throw H { 8 }; }) == 8); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh12.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh12.C new file mode 100644 index 0000000..4a85f15 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh12.C @@ -0,0 +1,74 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +struct A { + explicit constexpr A (int x) noexcept : a (x) {} + constexpr virtual int foo () const noexcept { return a; } + constexpr virtual ~A () {} + int a; +}; +struct B : public A { + explicit constexpr B (int x) noexcept : A (x) {} + constexpr int foo () const noexcept override { return a | 0x10; } +}; +struct C : public A { + explicit constexpr C (int x) noexcept : A (x) {} +}; +struct D : public A { + explicit constexpr D (int x) noexcept : A (x) {} +}; +struct E { + constexpr E () noexcept : e (0) {} + explicit constexpr E (int x) noexcept : e (x) {} + int e; +}; +struct F : public E, public B { + explicit constexpr F (int x) noexcept : B (x) {} +}; +struct G : public E, public C { + explicit constexpr G (int x) noexcept : C (x) {} +}; +struct H : public E, public D { + explicit constexpr H (int x) noexcept : D (x) {} +}; + +consteval int +bar (void (*fn) ()) +{ + int r = 0; + try + { + fn (); + } + catch (C *a) + { + r = a->foo () | 0x20; + delete a; + } + catch (const C *b) + { + r = b->foo () | 0x60; + delete b; + } + catch (A *c) + { + r = c->foo (); + delete c; + } + catch (const A *d) + { + r = d->foo () | 0x40; + delete d; + } + return r; +} + +static_assert (bar ([] { throw new A { 1 }; }) == 1); +static_assert (bar ([] { throw new B { 2 }; }) == 0x12); +static_assert (bar ([] { throw new C { 3 }; }) == 0x23); +static_assert (bar ([] { throw new D { 4 }; }) == 4); +constexpr int a = bar ([] { throw new E { 5 }; }); // { dg-error "uncaught exception of type 'E\\\*'" } +static_assert (bar ([] { throw new F { 6 }; }) == 0x16); +static_assert (bar ([] { throw new G { 7 }; }) == 0x27); +static_assert (bar ([] { throw new H { 8 }; }) == 8); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh13.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh13.C new file mode 100644 index 0000000..d62771c --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh13.C @@ -0,0 +1,36 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +template <typename T> +consteval T +foo (T x) +{ + try + { + throw &x; + } + catch (void *ptr) // { dg-message "for type 'void\\\*'" } + { + return *static_cast<T *> (ptr) | 0x10; + } + catch (const void *ptr) // { dg-message "for type 'const void\\\*'" } + { + return *static_cast<const T *> (ptr) | 0x20; + } + catch (T *ptr) // { dg-warning "exception of type 'T\\\*' will be caught by earlier handler" } + { // { dg-warning "exception of type 'int\\\*' will be caught by earlier handler" "" { target *-*-* } .-1 } + return *ptr | 0x30; // { dg-warning "exception of type 'long long unsigned int\\\*' will be caught by earlier handler" "" { target *-*-* } .-2 } + } + catch (const T *ptr) + { + return *ptr | 0x40; + } + catch (...) + { + return -1; + } +} + +static_assert (foo (1) == 0x11); +static_assert (foo (2ULL) == 0x12ULL); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh14.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh14.C new file mode 100644 index 0000000..3e52f2b --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh14.C @@ -0,0 +1,42 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +template <typename T> +constexpr T +foo (T x, auto... y) +{ + const T z[] = { x, y... }; + try + { + throw z; + } + catch (const T (&a)[4]) + { + return T (); + } + catch (const T *b) + { + return b[0]; + } + catch (...) + { + return T (); + } +} + +void +bar () +{ +} + +void +baz () +{ +} + +static_assert (foo (42, 43, 44, 45, 46) == 42); +static_assert (foo (43U, 44U, 45U, 46U) == 43U); +static_assert (foo (44LL, 45LL) == 44LL); +static_assert (foo (bar, baz, bar, baz) == bar); +static_assert (foo (baz, bar) == baz); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh15.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh15.C new file mode 100644 index 0000000..3dea461 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh15.C @@ -0,0 +1,39 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +int +foo (int x, int y) +{ + return x + y; +} + +constexpr int +bar (int x) +{ + if (x < 0) + throw x; + return x; +} + +constexpr int +baz (int x, int y) +{ + return foo (bar (x), bar (y)); +} + +constexpr int +qux (int x, int y) +{ + try + { + return baz (x, y); + } + catch (int) + { + return 42; + } +} + +static_assert (qux (12, -1) == 42); +static_assert (qux (-7, 12) == 42); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh2.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh2.C new file mode 100644 index 0000000..8bd6b6f --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh2.C @@ -0,0 +1,112 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +struct S { + constexpr S () : s (0) {} + constexpr S (int x) : s (x) { if (x == 42) throw 42; } + constexpr S (const S &x) : s (x.s) {} + constexpr ~S () noexcept (false) { if (s == 41) throw 41; } + constexpr const char *what () const noexcept { return "S"; } + int s; +}; +struct T : public S { + constexpr T () {} + constexpr T (int x) : S (x) {} + constexpr T (const T &x) : S (x.s) {} + constexpr ~T () {} + constexpr const char *what () const noexcept { return "T"; } +}; +struct U { + constexpr U () : u (0) {} + constexpr U (int x) : u (x) {} + constexpr U (const S &x) : u (0) {} + constexpr U (const U &x) : u (x.u) { if (u == 42) throw 43; } + constexpr ~U () {} + constexpr const char *what () const noexcept { return "U"; } + int u; +}; + +constexpr int +foo (int x) +{ + if (x == 1) + throw 43; + return x; +} + +constexpr int +bar (int x) noexcept // { dg-error "'std::terminate' called" } +{ // { dg-message "uncaught exception exited from 'noexcept' function 'constexpr int bar\\\(int\\\)'" "" { target *-*-* } .-1 } + return foo (x); +} + +constexpr int +baz (int x) +{ + switch (x) + { + case 0: throw 1; break; + case 1: try { x = bar (x); } catch (...) {} break; // { dg-message "in 'constexpr' expansion of" } + case 2: throw S (2); break; + case 3: try { throw S (42); } catch (int a) { if (a != 42) throw -1; } break; + case 4: try { S s (41); throw 2; } catch (...) {} break; // { dg-error "'std::terminate' called" } + case 5: return 5; // { dg-message "destructor exited with an exception" "" { target *-*-* } .-1 } + case 6: + try + { + throw S (5); + } + catch (const T &) {} + catch (int) {} + catch (const bool &) {} + catch (const T **const &) {} + break; + case 7: try { constexpr int y = foo (2); } catch (...) {} break; + case 8: + try + { + try + { + throw U (); + } + catch (U &u) + { + u.u = 42; + throw; + } + } + catch (U u) // { dg-error "'std::terminate' called" } + { // { dg-message "constructor exited with another exception while entering handler" "" { target *-*-* } .-1 } + } + break; + case 9: + try + { + throw U (S (41)); // { dg-error "'std::terminate' called" } + } // { dg-message "destructor exited with an exception" "" { target *-*-* } .-1 } + catch (...) + { + } + break; + } + return -1; +} + +constexpr int +qux (int x) +{ + try { constexpr int y = foo (1); } catch (...) {} // { dg-error "uncaught exception" } + return 0; +} + +constexpr int a = baz (0); // { dg-error "uncaught exception" } +constexpr int b = baz (1); // { dg-message "in 'constexpr' expansion of" } +constexpr int c = baz (2); // { dg-error "uncaught exception" } +constexpr int d = baz (3); +constexpr int e = baz (4); // { dg-message "in 'constexpr' expansion of" } +constexpr int f = baz (5); +constexpr int g = baz (6); // { dg-error "uncaught exception" } +constexpr int h = baz (7); +constexpr int i = baz (8); // { dg-message "in 'constexpr' expansion of" } +constexpr int j = baz (9); // { dg-message "in 'constexpr' expansion of" } diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh3.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh3.C new file mode 100644 index 0000000..f844d11 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh3.C @@ -0,0 +1,442 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +#include <exception> +#include <new> +#include <typeinfo> + +constexpr std::exception a; +constexpr const char *b = a.what (); +constexpr std::bad_exception c; +constexpr const char *d = c.what (); +constexpr std::bad_alloc e; +constexpr const char *f = e.what (); +constexpr std::bad_array_new_length g; +constexpr const char *h = g.what (); +constexpr std::bad_cast i; +constexpr const char *j = i.what (); +constexpr std::bad_typeid k; +constexpr const char *l = k.what (); +constexpr std::exception_ptr m = nullptr; +static_assert (m == nullptr); +constexpr std::exception_ptr n = std::current_exception (); +static_assert (n == nullptr); +constexpr std::exception_ptr o; +static_assert (o == nullptr); +constexpr std::nested_exception p; +static_assert (p.nested_ptr () == nullptr); + +struct A { virtual ~A () {} }; +struct B { virtual void b (); }; +struct C { virtual void c (); }; +struct D : private B { virtual void d (); }; +struct E { virtual void e (); }; +struct F : D, E, private C { virtual void f (); }; +struct G { constexpr G () { if (std::uncaught_exceptions () != 0) asm (""); } }; +struct H { constexpr H () : h (0) {} constexpr ~H () { if (std::uncaught_exceptions () != h) asm (""); } int h; }; +struct I : std::nested_exception { }; +struct J { virtual ~J () noexcept = default; }; +struct K final { }; +struct L : J, std::nested_exception { }; +struct M { }; +struct N : I, L { }; +struct O : private std::nested_exception { }; + +constexpr int +foo (int x) +{ + if (std::uncaught_exceptions () != 0) + return -1; + switch (x) + { + case 0: + try + { + const std::type_info &s = typeid (*(A *) 0); + return -1; + } + catch (const std::bad_typeid &x) + { + if (std::uncaught_exceptions () != 0) + return -1; + const char *p = x.what (); + return 1; + } + catch (...) + { + return -1; + } + break; + case 1: + try + { + static constexpr F f; + D &d = dynamic_cast<D &>((B &) f); + return -1; + } + catch (std::bad_cast x) + { + const char *p = x.what (); + return 2; + } + catch (...) + { + return -1; + } + break; + case 2: + try + { + H h; + h.h = 1; + if (std::current_exception () != nullptr) + return -1; + throw G (); + } + catch (const G &g) + { + if (std::uncaught_exceptions () != 0) + return -1; + if (std::current_exception () == nullptr) + return -1; + return 3; + } + catch (...) + { + return -1; + } + break; + case 3: + try + { + decltype (sizeof 0) x = -64; + char (*a)[2] = new char[x][2]; + delete[] a; + } + catch (std::bad_array_new_length x) + { + return 4; + } + break; + case 4: + try + { + int y = -1; + int *a = new int[y]; + delete[] a; + } + catch (const std::bad_array_new_length &) + { + return 5; + } + break; + case 5: + try + { + int z = 1; + int *a = new int[z]{1, 2, 3}; + delete[] a; + } + catch (std::bad_array_new_length &) + { + return 6; + } + break; + case 6: + { + std::exception_ptr b, d; + if (b != nullptr || d != nullptr) + return -1; + try + { + throw 1; + } + catch (int a) + { + if (a != 1) + return -1; + b = std::current_exception (); + if (b == nullptr) + return -1; + try + { + throw 2L; + } + catch (long int c) + { + if (c != 2L) + return -1; + d = std::current_exception (); + if (d == nullptr || b == d) + return -1; + } + if (std::current_exception () != b) + return -1; + } + if (std::current_exception () != nullptr) + return -1; + try + { + std::rethrow_exception (d); + } + catch (long int &e) + { + if (e != 2L) + return -1; + try + { + std::rethrow_exception (b); + } + catch (const int &f) + { + if (f != 1) + return -1; + try + { + std::rethrow_exception (d); + } + catch (const long int g) + { + if (g != 2L) + return -1; + try + { + std::rethrow_exception (b); + } + catch (int h) + { + if (h != 1) + return -1; + std::exception_ptr i (b); + std::exception_ptr j; + if (j != nullptr || i == nullptr || i != b || bool (j)) + return -1; + j = i; + if (j != b || !bool (j)) + return -1; + j = nullptr; + std::swap (i, j); + if (j == nullptr || j != b || i != nullptr) + return -1; + } + } + } + } + return 7; + } + case 7: + { + std::exception_ptr a = std::make_exception_ptr (42); + std::exception_ptr b = std::make_exception_ptr (std::exception ()); + std::exception_ptr c + = std::make_exception_ptr (std::bad_array_new_length ()); + try + { + std::rethrow_exception (a); + } + catch (int d) + { + if (d != 42) + return -1; + try + { + std::rethrow_exception (b); + } + catch (const std::exception &e) + { + const char *f = e.what (); + try + { + std::rethrow_exception (c); + } + catch (const std::bad_alloc &g) + { + try + { + throw; + } + catch (const std::bad_array_new_length &h) + { + const char *i = h.what (); + const char *j = g.what (); + } + } + } + } + return 8; + } + case 8: + { + std::nested_exception a; + if (a.nested_ptr () != nullptr) + return -1; + try + { + std::nested_exception b; + if (b.nested_ptr () != nullptr) + return -1; + throw 42; + } + catch (...) + { + std::nested_exception c; + if (c.nested_ptr () != std::current_exception ()) + return -1; + std::nested_exception d = c; + if (d.nested_ptr () != c.nested_ptr ()) + return -1; + c = d; + try + { + c.rethrow_nested (); + } + catch (const int &e) + { + if (e != 42) + return -1; + } + } + return 9; + } + case 9: + try + { + std::throw_with_nested (I ()); + } + catch (const std::nested_exception &a) + { + if (a.nested_ptr () != nullptr) + return -1; + try + { + throw; + } + catch (const I &) + { + return 10; + } + } + return -1; + case 10: + try + { + std::throw_with_nested (J ()); + } + catch (const std::nested_exception &a) + { + if (a.nested_ptr () != nullptr) + return -1; + try + { + throw; + } + catch (const J &) + { + return 11; + } + } + return -1; + case 11: + try + { + std::throw_with_nested (K ()); + } + catch (const std::nested_exception &) + { + return -1; + } + catch (const K &) + { + return 12; + } + return -1; + case 12: + try + { + throw 42; + } + catch (...) + { + I a; + try + { + std::rethrow_if_nested (a); + } + catch (const int &b) + { + if (b == 42) + return 13; + } + } + return -1; + case 13: + try + { + throw J (); + } + catch (const J &a) + { + std::rethrow_if_nested (a); + return 14; + } + return -1; + case 14: + try + { + throw 42; + } + catch (...) + { + try + { + throw L (); + } + catch (const J &a) + { + try + { + std::rethrow_if_nested (a); + } + catch (const int &b) + { + if (b == 42) + return 15; + } + } + } + return -1; + case 15: + { + std::rethrow_if_nested (1); + M m; + std::rethrow_if_nested (m); + N n; + std::rethrow_if_nested (n); + O o; + std::rethrow_if_nested (o); + return 16; + } + default: + break; + } + return -1; +} + +static_assert (foo (0) == 1); +static_assert (foo (1) == 2); +static_assert (foo (2) == 3); +static_assert (foo (3) == 4); +static_assert (foo (4) == 5); +static_assert (foo (5) == 6); +static_assert (foo (6) == 7); +static_assert (foo (7) == 8); +static_assert (foo (8) == 9); +static_assert (foo (9) == 10); +static_assert (foo (10) == 11); +static_assert (foo (11) == 12); +static_assert (foo (12) == 13); +static_assert (foo (13) == 14); +static_assert (foo (14) == 15); +static_assert (foo (15) == 16); +static_assert (std::uncaught_exceptions () == 0); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh4.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh4.C new file mode 100644 index 0000000..24118ca --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh4.C @@ -0,0 +1,72 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +struct A { virtual ~A () {} }; +struct B { virtual void b (); }; +struct C { virtual void c (); }; +struct D : private B { virtual void d (); }; +struct E { virtual void e (); }; +struct F : D, E, private C { virtual void f (); }; + +constexpr int +foo (int x) +{ + switch (x) + { + case 1: + try + { + static constexpr F f; + D &d = dynamic_cast<D &>((B &) f); // { dg-error "called without 'std::bad_cast' being defined" } + return -1; + } + catch (...) + { + return -1; + } + break; + case 3: + try + { + decltype (sizeof 0) x = -64; + char (*a)[2] = new char[x][2]; // { dg-error "called without 'std::bad_array_new_length' being defined" } + delete[] a; + } + catch (...) + { + return -1; + } + break; + case 4: + try + { + int y = -1; + int *a = new int[y]; // { dg-error "called without 'std::bad_array_new_length' being defined" } + delete[] a; + } + catch (...) + { + return -1; + } + break; + case 5: + try + { + int z = 1; + int *a = new int[z]{1, 2, 3}; // { dg-error "called without 'std::bad_array_new_length' being defined" } + delete[] a; + } + catch (...) + { + return -1; + } + break; + } + return -1; +} + +constexpr int a = foo (1); // { dg-message "in 'constexpr' expansion of" } +constexpr int b = foo (3); // { dg-message "in 'constexpr' expansion of" } +constexpr int c = foo (4); // { dg-message "in 'constexpr' expansion of" } +constexpr int d = foo (5); // { dg-message "in 'constexpr' expansion of" } diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh5.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh5.C new file mode 100644 index 0000000..512aa34 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh5.C @@ -0,0 +1,55 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +constexpr void +foo () +{ + throw 1; +} + +void +bar () +{ +} + +constexpr void +baz () +{ + foo (); + bar (); +} + +constexpr void +qux () +{ + if consteval { + throw 2; + } + bar (); +} + +constexpr bool +corge () +{ + try + { + baz (); + } + catch (int a) + { + if (a != 1) + return false; + try + { + qux (); + } + catch (int b) + { + return b == 2; + } + } + return false; +} + +static_assert (corge ()); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh6.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh6.C new file mode 100644 index 0000000..6fd9462 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh6.C @@ -0,0 +1,134 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +struct S { + constexpr S () : s (0) {} + constexpr S (int x) : s (x) {} + constexpr S (const S &x) : s (x.s) {} + constexpr ~S () {} + int s; +}; +struct T { + constexpr T () : t (0) {} + constexpr T (int x) : t (x) {} + constexpr T (const T &x) : t (x.t) {} + constexpr ~T () {} + int t; +}; +struct U : public S, public T { + constexpr U () : S (0), T (0) {} + constexpr U (int x, int y) : S (x), T (y) {} + constexpr U (const U &x) : S (x.s), T (x.t) {} + constexpr ~U () {} +}; + +constexpr bool +foo () +{ + try + { + throw U (1, 2); + } + catch (const U &x) + { + if (x.s != 1 || x.t != 2) + return false; + try + { + throw; + } + catch (const S &y) + { + if (y.s != 1) + return false; + try + { + throw; + } + catch (const T &z) + { + if (z.t != 2) + return false; + return true; + } + } + } + return false; +} + +constexpr bool +bar () +{ + try + { + throw U (1, 2); + } + catch (U &x) + { + if (x.s != 1 || x.t != 2) + return false; + try + { + x.s = 3; + x.t = 4; + throw; + } + catch (S &y) + { + if (y.s != 3) + return false; + try + { + throw; + } + catch (T &z) + { + if (z.t != 4) + return false; + return true; + } + } + } + return false; +} + +constexpr bool +baz () +{ + try + { + throw U (1, 2); + } + catch (U x) + { + if (x.s != 1 || x.t != 2) + return false; + try + { + x.s = 3; + x.t = 4; + throw; + } + catch (S y) + { + if (y.s != 1) + return false; + try + { + throw; + } + catch (T z) + { + if (z.t != 2) + return false; + return true; + } + } + } + return false; +} + +static_assert (foo ()); +static_assert (bar ()); +static_assert (baz ()); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh7.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh7.C new file mode 100644 index 0000000..6bdf0c3 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh7.C @@ -0,0 +1,151 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +constexpr char p[] = "hello"; +constexpr const char *q[] = { &p[0], &p[3] }; +constexpr const char *const *r = &q[0]; +const char *s[] = { &p[0], &p[3] }; +constexpr const char **t = &s[0]; + +constexpr bool +foo () +{ + try + { + throw t; + } + catch (const char **const &x) + { + if (x != t) + return false; + try + { + throw; + } + catch (const char **&y) + { + if (y != t) + return false; + try + { + throw; + } + catch (const char **z) + { + if (z != t) + return false; + try + { + throw; + } + catch (const char *const *const &v) + { + if (v != (const char *const *) t) + return false; + try + { + throw; + } + catch (const char *const *w) + { + if (w != (const char *const *) t) + return false; + return true; + } + } + } + } + } + return false; +} + +constexpr bool +bar () +{ + try + { + throw nullptr; + } + catch (const char **const &x) + { + if (x != nullptr) + return false; + try + { + throw; + } + catch (const char **&y) + { + if (y != nullptr) + return false; + try + { + throw; + } + catch (const char **z) + { + if (z != nullptr) + return false; + try + { + throw; + } + catch (const char *const *const &v) + { + if (v != nullptr) + return false; + try + { + throw; + } + catch (const char *const *w) + { + if (w != nullptr) + return false; + return true; + } + } + } + } + } + return false; +} + +constexpr bool +baz () +{ + try + { + throw r; + } + catch (const char *const *const &x) + { + if (x != r || **x != 'h') + return false; + try + { + throw; + } + catch (const char *const *&y) + { + if (y != r || **y != 'h') + return false; + try + { + throw; + } + catch (const char *const *z) + { + if (z != r || **z != 'h') + return false; + return true; + } + } + } + return false; +} + +static_assert (foo ()); +static_assert (bar ()); +static_assert (baz ()); diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh8.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh8.C new file mode 100644 index 0000000..2560364 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh8.C @@ -0,0 +1,36 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +#include <exception> + +constexpr std::exception_ptr +foo () +{ + try + { + throw 42; + } + catch (...) + { + return std::current_exception (); + } +} + +constexpr bool +bar () +{ + try + { + std::rethrow_exception (foo ()); + } + catch (const int &a) + { + return a == 42; + } + return false; +} + +static_assert (bar ()); +constexpr std::exception_ptr a = foo (); // { dg-error "is not a constant expression because it refers to exception object allocated with '__cxa_allocate_exception'" } +constexpr std::exception_ptr b = std::make_exception_ptr (42ULL); // { dg-error "is not a constant expression because it refers to exception object allocated with '__cxa_allocate_exception'" } diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-eh9.C b/gcc/testsuite/g++.dg/cpp26/constexpr-eh9.C new file mode 100644 index 0000000..fd39fe0 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-eh9.C @@ -0,0 +1,127 @@ +// C++26 P3068R5 - Allowing exception throwing in constant-evaluation +// { dg-do compile { target c++26 } } +// { dg-require-effective-target exceptions_enabled } + +namespace std +{ + struct exception + { + constexpr exception () noexcept { } + constexpr virtual ~exception () noexcept {} + constexpr exception (const exception &) = default; + constexpr exception &operator= (const exception &) = default; + constexpr exception (exception &&) = default; + constexpr exception &operator= (exception &&) = default; + constexpr virtual const char *what () const noexcept + { return "std::exception"; } + }; +} + +struct S : public std::exception { + constexpr S () : s (0) {} + constexpr S (int x) : s (x) {} + constexpr S (const S &x) : s (x.s) {} + constexpr virtual ~S () {} + constexpr virtual const char *what () noexcept { return "this is S"; } + int s; +}; +struct T : public std::exception { + constexpr T () : s (new char[1]), t (0) { s[0] = '\0'; } + constexpr T (const char *p, int q) : s (new char[q + 1]), t (q) + { + for (int i = 0; i <= t; ++i) + s[i] = p[i]; + } + constexpr T (const T &x) : s (new char[x.t + 1]), t (x.t) + { + for (int i = 0; i <= t; ++i) + s[i] = x.s[i]; + } + constexpr virtual ~T () { delete[] s; } + constexpr virtual const char *what () noexcept { return s; } + char *s; + int t; +}; +struct U { + constexpr U () : x (0), y (0), z (0) {} + constexpr U (int a, long b, unsigned long long c) : x (a), y (b), z (c) {} + constexpr U (const U &u) = default; + int x; + long y; + unsigned long long z; +}; +struct V { + constexpr V () : v (0) {} + constexpr V (int x) : v (x) {} + constexpr V (const V &x) : v (x.v) {} + constexpr virtual ~V () {} + constexpr virtual const char *what () noexcept { return "this is V"; } + int v; +}; + +constexpr int +foo (int x) +{ + if (x == 1) + throw S (42); + else if (x == 2) + throw T ("hello, world", sizeof ("hello, world") - 1); + else if (x == 3) + throw U (1, -2L, 42ULL); + else if (x == 4) + throw 42; + else if (x == 5) + throw 1.0; + else if (x == 6) + throw V (42); + else + return 42; +} + +constexpr int +bar (int x) noexcept +// { dg-error "'std::terminate' called after throwing an exception of type 'S'; 'what\\\(\\\)': 'this is S'" "" { target *-*-* } .-1 } +// { dg-message "uncaught exception exited from 'noexcept' function 'constexpr int bar\\\(int\\\)'" "" { target *-*-* } .-2 } +// { dg-error "'std::terminate' called after throwing an exception of type 'T'; 'what\\\(\\\)': 'hello, world'" "" { target *-*-* } .-3 } +// { dg-error "'std::terminate' called after throwing an exception 'U\\\{1, -2, 42\\\}'" "" { target *-*-* } .-4 } +// { dg-error "'std::terminate' called after throwing an exception '42'" "" { target *-*-* } .-5 } +// { dg-error "'std::terminate' called after throwing an exception '1\\\.0e\\\+0'" "" { target *-*-* } .-6 } +// { dg-error "'std::terminate' called after throwing an exception 'V\\\{\[^\n\r]*42\\\}" "" { target *-*-* } .-7 } +{ + return foo (x); +} + +constexpr int +baz (int x) +{ + try + { + return foo (x); + } + catch (...) + { + return -1; + } +} + +static_assert (bar (0) == 42); +constexpr int a = bar (1); // { dg-message "in 'constexpr' expansion of" } +constexpr int b = bar (2); // { dg-message "in 'constexpr' expansion of" } +constexpr int c = bar (3); // { dg-message "in 'constexpr' expansion of" } +constexpr int d = bar (4); // { dg-message "in 'constexpr' expansion of" } +constexpr int e = bar (5); // { dg-message "in 'constexpr' expansion of" } +constexpr int f = bar (6); // { dg-message "in 'constexpr' expansion of" } +static_assert (baz (0) == 42); +static_assert (baz (1) == -1); +static_assert (baz (2) == -1); +static_assert (baz (3) == -1); +static_assert (baz (4) == -1); +static_assert (baz (5) == -1); +static_assert (baz (6) == -1); +static_assert (foo (0) == 42); +constexpr int g = foo (1); // { dg-error "uncaught exception of type 'S'; 'what\\\(\\\)': 'this is S'" } +constexpr int h = foo (2); // { dg-error "uncaught exception of type 'T'; 'what\\\(\\\)': 'hello, world'" } +constexpr int i = foo (3); // { dg-error "uncaught exception 'U\\\{1, -2, 42\\\}'" } +constexpr int j = foo (4); // { dg-error "uncaught exception '42'" } +constexpr int k = foo (5); // { dg-error "uncaught exception '1\\\.0e\\\+0'" } +constexpr int l = foo (6); // { dg-error "uncaught exception 'V\\\{\[^\n\r]*42\\\}'" } diff --git a/gcc/testsuite/g++.dg/cpp26/constexpr-new4.C b/gcc/testsuite/g++.dg/cpp26/constexpr-new4.C new file mode 100644 index 0000000..12d8a46 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/constexpr-new4.C @@ -0,0 +1,21 @@ +// PR c++/121068 +// { dg-do compile { target c++26 } } + +constexpr void *operator new (__SIZE_TYPE__, void *p) { return p; } +constexpr void *operator new[] (__SIZE_TYPE__, void *p) { return p; } + +consteval int +foo() +{ + using T = int; + union { T arr[3]; }; + new(arr) T[3]; // makes arr active + for (int i = 0; i < 3; ++i) + arr[i].~T(); + + new (arr + 2) T{10}; // A + + return 1; +}; + +constexpr int g = foo(); diff --git a/gcc/testsuite/g++.dg/cpp26/decomp25.C b/gcc/testsuite/g++.dg/cpp26/decomp25.C index 55559f0..f395685 100644 --- a/gcc/testsuite/g++.dg/cpp26/decomp25.C +++ b/gcc/testsuite/g++.dg/cpp26/decomp25.C @@ -1,6 +1,6 @@ // C++26 P2686R4 - constexpr structured bindings // { dg-do compile { target c++11 } } -// { dg-options "" } +// { dg-options "-fno-implicit-constexpr" } namespace std { template <typename T> struct tuple_size; diff --git a/gcc/testsuite/g++.dg/cpp26/feat-cxx26.C b/gcc/testsuite/g++.dg/cpp26/feat-cxx26.C index e4ffc35..cfc5f61 100644 --- a/gcc/testsuite/g++.dg/cpp26/feat-cxx26.C +++ b/gcc/testsuite/g++.dg/cpp26/feat-cxx26.C @@ -624,19 +624,31 @@ #endif #ifndef __cpp_pack_indexing -# error "__cpp_pack_indexing" +# error "__cpp_pack_indexing" #elif __cpp_pack_indexing != 202311 # error "__cpp_pack_indexing != 202311" #endif #ifndef __cpp_pp_embed -# error "__cpp_pp_embed" +# error "__cpp_pp_embed" #elif __cpp_pp_embed != 202502 # error "__cpp_pp_embed != 202502" #endif #ifndef __cpp_constexpr_virtual_inheritance -# error "__cpp_constexpr_virtual_inheritance" +# error "__cpp_constexpr_virtual_inheritance" #elif __cpp_constexpr_virtual_inheritance != 202506 # error "__cpp_constexpr_virtual_inheritance != 202506" #endif + +#ifndef __cpp_constexpr_exceptions +# error "__cpp_constexpr_exceptions" +#elif __cpp_constexpr_exceptions != 202411 +# error "__cpp_constexpr_exceptions != 202411" +#endif + +#ifndef __cpp_trivial_relocatability +# error "__cpp_trivial_relocatability" +#elif __cpp_trivial_relocatability != 202502 +# error "__cpp_trivial_relocatability != 202502" +#endif diff --git a/gcc/testsuite/g++.dg/cpp26/name-independent-decl1.C b/gcc/testsuite/g++.dg/cpp26/name-independent-decl1.C index 0830ce8..9b56e84 100644 --- a/gcc/testsuite/g++.dg/cpp26/name-independent-decl1.C +++ b/gcc/testsuite/g++.dg/cpp26/name-independent-decl1.C @@ -70,7 +70,7 @@ foo () ++_; } { - static int _ = 3; + static int _ = 3; // { dg-warning "variable '_' set but not used" } ++_; } { diff --git a/gcc/testsuite/g++.dg/cpp26/static_assert1.C b/gcc/testsuite/g++.dg/cpp26/static_assert1.C index 1d0e6f2..a6eab3c 100644 --- a/gcc/testsuite/g++.dg/cpp26/static_assert1.C +++ b/gcc/testsuite/g++.dg/cpp26/static_assert1.C @@ -51,7 +51,7 @@ static_assert (true, H {}); // { dg-warning "'static_assert' with non-string mes struct I { constexpr signed char size () const { return 0; } const char *data () const { return ""; } }; static_assert (true, I {}); // { dg-warning "'static_assert' with non-string message only available with" "" { target c++23_down } } -struct J { constexpr int size () const { return j ? throw 1 : 0; } // { dg-error "expression '<throw-expression>' is not a constant expression" } +struct J { constexpr int size () const { return j ? throw 1 : 0; } // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++23_down } } constexpr const char *data () const { return ""; }; constexpr J (int x) : j (x) {} int j; }; @@ -60,6 +60,7 @@ static_assert (false, J (0)); // { dg-warning "'static_assert' with non-string m // { dg-error "static assertion failed" "" { target *-*-* } .-1 } static_assert (false, J (1)); // { dg-warning "'static_assert' with non-string message only available with" "" { target c++23_down } } // { dg-error "constexpr string 'size\\\(\\\)' must be a constant expression" "" { target *-*-* } .-1 } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-2 } struct K { constexpr operator int () { return 4; } }; struct L { constexpr operator const char * () { return "test"; } }; struct M { constexpr K size () const { return {}; } @@ -261,10 +262,11 @@ namespace NN #if __cplusplus >= 201402L struct J { static constexpr int size () { return 0; } - static constexpr const char *data (int x = 0) { if (x) return nullptr; else throw 1; } }; // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++14 } } + static constexpr const char *data (int x = 0) { if (x) return nullptr; else throw 1; } }; // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target { c++14 && c++23_down } } } static_assert (true, J{}); // { dg-warning "'static_assert' with non-string message only available with" "" { target { c++14 && c++23_down } } } static_assert (false, J{}); // { dg-warning "'static_assert' with non-string message only available with" "" { target { c++14 && c++23_down } } } // { dg-error "constexpr string 'data\\\(\\\)' must be a core constant expression" "" { target c++14 } .-1 } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-2 } #endif #if __cpp_if_consteval >= 202106L struct K { @@ -282,19 +284,21 @@ namespace NN static_assert (false, L{}); // { dg-warning "'static_assert' with non-string message only available with" "" { target c++23_only } } // { dg-error "static assertion failed: test" "" { target c++23 } .-1 } struct M { - static constexpr int size () { if consteval { throw 1; } else { return 4; } } // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++23 } } + static constexpr int size () { if consteval { throw 1; } else { return 4; } } // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++23_only } } static constexpr const char *data () { return "test"; } }; static_assert (true, M{}); // { dg-warning "'static_assert' with non-string message only available with" "" { target c++23_only } } static_assert (false, M{}); // { dg-warning "'static_assert' with non-string message only available with" "" { target c++23_only } } // { dg-error "constexpr string 'size\\\(\\\)' must be a constant expression" "" { target c++23 } .-1 } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-2 } struct N { static constexpr int size () { return 4; } - static constexpr const char *data () { if consteval { throw 1; } else { return "test"; } } // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++23 } } + static constexpr const char *data () { if consteval { throw 1; } else { return "test"; } } // { dg-error "expression '<throw-expression>' is not a constant expression" "" { target c++23_only } } }; static_assert (true, N{}); // { dg-warning "'static_assert' with non-string message only available with" "" { target c++23_only } } static_assert (false, N{}); // { dg-warning "'static_assert' with non-string message only available with" "" { target c++23_only } } // { dg-error "constexpr string 'data\\\(\\\)\\\[0\\\]' must be a constant expression" "" { target c++23 } .-1 } + // { dg-error "uncaught exception '1'" "" { target c++26 } .-2 } #endif struct O { constexpr int operator () () const { return 12; } }; struct P { constexpr const char *operator () () const { return "another test"; } }; diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable1.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable1.C new file mode 100644 index 0000000..29ba907 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable1.C @@ -0,0 +1,137 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++11 } } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++17 } } + +#if __cpp_trivial_relocatability < 202502L +#define trivially_relocatable_if_eligible __trivially_relocatable_if_eligible +#define replaceable_if_eligible __replaceable_if_eligible +#endif + +namespace std +{ +template <typename T, T v> +struct integral_constant +{ + static constexpr T value = v; +}; + +template <typename> +struct is_trivially_relocatable; + +template <typename> +struct is_replaceable; + +template<typename T> +struct is_trivially_relocatable + : public integral_constant <bool, __builtin_is_trivially_relocatable (T)> +{ +}; + +template<typename T> +struct is_replaceable + : public integral_constant <bool, __builtin_is_replaceable (T)> +{ +}; + +template <typename T> +inline constexpr bool is_trivially_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_trivially_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + +template <typename T> +inline constexpr bool is_replaceable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_replaceable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } +} + +struct A {}; + +static_assert (std::is_trivially_relocatable_v <A>, ""); +static_assert (std::is_replaceable_v <A>, ""); + +struct B { + B (); + ~B (); + B (const B &); + B (B &&); + B &operator= (const B &); + B &operator= (B &&); +}; + +static_assert (!std::is_trivially_relocatable_v <B>, ""); +static_assert (!std::is_replaceable_v <B>, ""); + +struct C { + C (C &&) = delete; + C &operator= (C &&) = delete; + C () = default; +}; + +// Note, P2786R13 says it is trivially relocatable, but I think +// it isn't default-movable because overload resolution in both +// cases selects a deleted special member fn. +static_assert (!std::is_trivially_relocatable_v <C>, ""); +static_assert (!std::is_replaceable_v <C>, ""); + +struct D : A {}; + +static_assert (std::is_trivially_relocatable_v <D>, ""); +static_assert (std::is_replaceable_v <D>, ""); + +struct E : virtual A {}; + +static_assert (!std::is_trivially_relocatable_v <E>, ""); +static_assert (std::is_replaceable_v <E>, ""); + +struct F trivially_relocatable_if_eligible : virtual A {}; + +static_assert (!std::is_trivially_relocatable_v <F>, ""); +static_assert (std::is_replaceable_v <F>, ""); + +struct G { B data; }; + +static_assert (!std::is_trivially_relocatable_v <G>, ""); +static_assert (!std::is_replaceable_v <G>, ""); + +struct H { ~H () = default; }; + +static_assert (std::is_trivially_relocatable_v <H>, ""); +static_assert (std::is_replaceable_v <H>, ""); + +struct I { ~I (); }; +I::~I () = default; + +static_assert (!std::is_trivially_relocatable_v <I>, ""); +static_assert (!std::is_replaceable_v <I>, ""); + +struct J { virtual ~J () = default; }; + +// Note, P2786R13 says otherwise for both, but that looks like +// a bug in the paper, it otherwise says that polymorphic types +// can be both trivially relocatable and replaceable. +static_assert (std::is_trivially_relocatable_v <J>, ""); +static_assert (std::is_replaceable_v <J>, ""); + +struct K { ~K () = delete; }; + +static_assert (!std::is_trivially_relocatable_v <K>, ""); +static_assert (!std::is_replaceable_v <K>, ""); + +struct L { L (L &&) = default; }; + +// Note, P2786R13 says otherwise for both, but that looks like +// a bug in the paper to me. While move ctor is trivial here, +// copy assignment operator is implicitly declared as deleted +// and move assignent operator is not declared. +static_assert (!std::is_trivially_relocatable_v <L>, ""); +static_assert (!std::is_replaceable_v <L>, ""); + +struct M { M (M &&); }; +M::M (M &&) = default; + +static_assert (!std::is_trivially_relocatable_v <M>, ""); +static_assert (!std::is_replaceable_v <M>, ""); + +struct N { N (N &&) = delete; }; + +static_assert (!std::is_trivially_relocatable_v <N>, ""); +static_assert (!std::is_replaceable_v <N>, ""); diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable10.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable10.C new file mode 100644 index 0000000..2ed1d5e --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable10.C @@ -0,0 +1,135 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++11 } } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++17 } } + +#if __cpp_trivial_relocatability < 202502L +#define trivially_relocatable_if_eligible __trivially_relocatable_if_eligible +#define replaceable_if_eligible __replaceable_if_eligible +#endif + +namespace std +{ +template <typename T, T v> +struct integral_constant +{ + static constexpr T value = v; +}; + +template <typename> +struct is_trivially_relocatable; + +template <typename> +struct is_replaceable; + +template<typename T> +struct is_trivially_relocatable + : public integral_constant <bool, __builtin_is_trivially_relocatable (T)> +{ +}; + +template<typename T> +struct is_replaceable + : public integral_constant <bool, __builtin_is_replaceable (T)> +{ +}; + +template <typename T> +inline constexpr bool is_trivially_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_trivially_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + +template <typename T> +inline constexpr bool is_replaceable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_replaceable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } +} + +struct A replaceable_if_eligible { A (A &&); A &operator= (A &&); ~A (); int a; }; + +static_assert (std::is_replaceable_v <A>, ""); +static_assert (!std::is_replaceable_v <const A>, ""); +static_assert (!std::is_replaceable_v <A volatile>, ""); +static_assert (!std::is_replaceable_v <const A volatile>, ""); + +struct B { B (B &&); B &operator= (B &&); ~B (); int a; }; + +static_assert (!std::is_replaceable_v <B>, ""); + +struct C replaceable_if_eligible : public A { C (C &&); C &operator= (C &&); ~C (); int a; }; + +static_assert (std::is_replaceable_v <C>, ""); + +struct D replaceable_if_eligible : public B { D (D &&); D &operator= (D &&); ~D (); int a; }; + +static_assert (!std::is_replaceable_v <D>, ""); + +struct E replaceable_if_eligible { E (E &&); E &operator= (E &&); ~E (); A a; }; + +static_assert (std::is_replaceable_v <E>, ""); + +struct F replaceable_if_eligible { F (F &&); F &operator= (F &&); ~F (); B a; }; + +static_assert (!std::is_replaceable_v <F>, ""); + +struct G replaceable_if_eligible { G (G &&); G &operator= (G &&); ~G () = delete; int a; }; + +static_assert (!std::is_replaceable_v <G>, ""); + +struct H replaceable_if_eligible : virtual A { H (H &&); H &operator= (H &&); ~H (); int a; }; + +static_assert (std::is_replaceable_v <H>, ""); + +struct I replaceable_if_eligible { I (I &&) = delete; I &operator= (I &&); ~I (); int a; }; + +static_assert (!std::is_replaceable_v <I>, ""); + +struct J replaceable_if_eligible { J (J &&); J &operator= (J &&) = delete; ~J (); int a; }; + +static_assert (!std::is_replaceable_v <J>, ""); + +struct K replaceable_if_eligible { K (const K &) = delete; K &operator= (K &&); ~K (); int a; }; + +static_assert (!std::is_replaceable_v <K>, ""); + +struct L replaceable_if_eligible { L (L &&); L &operator= (const L &) = delete; ~L (); int a; }; + +static_assert (!std::is_replaceable_v <L>, ""); + +struct M replaceable_if_eligible { M (); private: M (M &&); M &operator= (M &&); ~M (); int a; }; + +static_assert (std::is_replaceable_v <M>, ""); + +struct N replaceable_if_eligible { N (N &&); N &operator= (N &&); ~N (); const A a; }; + +static_assert (!std::is_replaceable_v <N>, ""); + +struct O replaceable_if_eligible { O (O &&); O &operator= (O &&); ~O (); volatile A a; }; + +static_assert (!std::is_replaceable_v <O>, ""); + +struct P replaceable_if_eligible { P (P &&); P &operator= (P &&); ~P (); const volatile A a; }; + +static_assert (!std::is_replaceable_v <P>, ""); + +struct Q replaceable_if_eligible { Q (Q &&); Q &operator= (Q &&); ~Q (); union { A a; int b; char c; }; }; + +static_assert (!std::is_replaceable_v <Q>, ""); + +struct R replaceable_if_eligible { R (R &&); R &operator= (R &&); ~R (); union { int a; B b; short c; }; }; + +static_assert (!std::is_replaceable_v <R>, ""); + +struct S replaceable_if_eligible { S (S &&); S &operator= (S &&); ~S (); union { int a; const int b; short c; }; }; + +static_assert (!std::is_replaceable_v <S>, ""); + +struct T replaceable_if_eligible { T (T &&); T &operator= (T &&); ~T () = default; int a; }; + +static_assert (std::is_replaceable_v <T>, ""); + +struct U replaceable_if_eligible { U (U &&); U &operator= (U &&); ~U (); union { T a; int b; char c; }; }; + +static_assert (!std::is_replaceable_v <U>, ""); + +struct V replaceable_if_eligible { V (V &&); V &operator= (V &&); ~V (); union { unsigned long long a; int b; char c; }; }; + +static_assert (std::is_replaceable_v <V>, ""); diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable11.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable11.C new file mode 100644 index 0000000..71fc6f1 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable11.C @@ -0,0 +1,134 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++11 } } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++17 } } + +#if __cpp_trivial_relocatability < 202502L +#define trivially_relocatable_if_eligible __trivially_relocatable_if_eligible +#define replaceable_if_eligible __replaceable_if_eligible +#endif + +namespace std +{ +template <typename T, T v> +struct integral_constant +{ + static constexpr T value = v; +}; + +template <typename> +struct is_trivially_relocatable; + +template <typename> +struct is_replaceable; + +template<typename T> +struct is_trivially_relocatable + : public integral_constant <bool, __builtin_is_trivially_relocatable (T)> +{ +}; + +template<typename T> +struct is_replaceable + : public integral_constant <bool, __builtin_is_replaceable (T)> +{ +}; + +template <typename T> +inline constexpr bool is_trivially_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_trivially_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + +template <typename T> +inline constexpr bool is_replaceable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_replaceable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } +} + +struct A { A (A &&) = default; A &operator= (A &&) = default; ~A () = default; int a; }; + +static_assert (std::is_trivially_relocatable_v <A>, ""); +static_assert (std::is_replaceable_v <A>, ""); + +struct B { B (B &&); B &operator= (B &&) = default; ~B () = default; int a; }; + +static_assert (!std::is_trivially_relocatable_v <B>, ""); +static_assert (!std::is_replaceable_v <B>, ""); + +union C { int a; A b; }; + +static_assert (std::is_trivially_relocatable_v <C>, ""); +static_assert (std::is_replaceable_v <C>, ""); + +union D { int a; A b; B c; }; + +static_assert (!std::is_trivially_relocatable_v <D>, ""); +static_assert (!std::is_replaceable_v <D>, ""); + +union E { E (); int a; A b; }; + +static_assert (std::is_trivially_relocatable_v <E>, ""); +static_assert (std::is_replaceable_v <E>, ""); + +union F { F () = default; int a; A b; }; + +static_assert (std::is_trivially_relocatable_v <F>, ""); +static_assert (std::is_replaceable_v <F>, ""); + +union G { G (const G &); int a; A b; }; + +static_assert (!std::is_trivially_relocatable_v <G>, ""); +static_assert (!std::is_replaceable_v <G>, ""); + +union H { H (const H &) = default; int a; A b; }; + +static_assert (!std::is_trivially_relocatable_v <H>, ""); +static_assert (!std::is_replaceable_v <H>, ""); + +union I { I (I &&); int a; A b; }; + +static_assert (!std::is_trivially_relocatable_v <I>, ""); +static_assert (!std::is_replaceable_v <I>, ""); + +union J { J (J &&) = default; int a; A b; }; + +static_assert (!std::is_trivially_relocatable_v <J>, ""); +static_assert (!std::is_replaceable_v <J>, ""); + +union K { K &operator= (const K &); int a; A b; }; + +static_assert (!std::is_trivially_relocatable_v <K>, ""); +static_assert (!std::is_replaceable_v <K>, ""); + +union L { L &operator= (const L &) = default; int a; A b; }; + +static_assert (!std::is_trivially_relocatable_v <L>, ""); +static_assert (!std::is_replaceable_v <L>, ""); + +union M { M &operator= (M &&); int a; A b; }; + +static_assert (!std::is_trivially_relocatable_v <M>, ""); +static_assert (!std::is_replaceable_v <M>, ""); + +union N { N &operator= (N &&) = default; int a; A b; }; + +static_assert (!std::is_trivially_relocatable_v <N>, ""); +static_assert (!std::is_replaceable_v <N>, ""); + +union O { ~O (); int a; A b; }; + +static_assert (!std::is_trivially_relocatable_v <O>, ""); +static_assert (!std::is_replaceable_v <O>, ""); + +union P { ~P () = default; int a; A b; }; + +static_assert (!std::is_trivially_relocatable_v <P>, ""); +static_assert (!std::is_replaceable_v <P>, ""); + +union Q { int a; const A b; }; + +static_assert (std::is_trivially_relocatable_v <Q>, ""); +static_assert (!std::is_replaceable_v <Q>, ""); + +union S { volatile int a; A b; }; + +static_assert (std::is_trivially_relocatable_v <S>, ""); +static_assert (!std::is_replaceable_v <S>, ""); diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable2.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable2.C new file mode 100644 index 0000000..b740061 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable2.C @@ -0,0 +1,204 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++11 } } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++17 } } + +#if __cpp_trivial_relocatability < 202502L +#define trivially_relocatable_if_eligible __trivially_relocatable_if_eligible +#define replaceable_if_eligible __replaceable_if_eligible +#endif + +namespace std +{ +template <typename T, T v> +struct integral_constant +{ + static constexpr T value = v; +}; + +template <typename> +struct is_trivially_relocatable; + +template <typename> +struct is_replaceable; + +template<typename T> +struct is_trivially_relocatable + : public integral_constant <bool, __builtin_is_trivially_relocatable (T)> +{ +}; + +template<typename T> +struct is_replaceable + : public integral_constant <bool, __builtin_is_replaceable (T)> +{ +}; + +template <typename T> +inline constexpr bool is_trivially_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_trivially_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + +template <typename T> +inline constexpr bool is_replaceable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_replaceable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } +} + +class A {}; + +static_assert (std::is_trivially_relocatable_v <A>, ""); +static_assert (std::is_replaceable_v <A>, ""); +static_assert (std::is_trivially_relocatable <A>::value, ""); +static_assert (std::is_replaceable <A>::value, ""); + +struct B { ~B (); }; +static B z; + +static_assert (!std::is_trivially_relocatable_v <B>, ""); +static_assert (!std::is_replaceable_v <B>, ""); +static_assert (!std::is_trivially_relocatable <B>::value, ""); +static_assert (!std::is_replaceable <B>::value, ""); + +class C trivially_relocatable_if_eligible {}; + +static_assert (std::is_trivially_relocatable_v <C>, ""); +static_assert (std::is_replaceable_v <C>, ""); + +class D trivially_relocatable_if_eligible : A {}; + +static_assert (std::is_trivially_relocatable_v <D>, ""); +static_assert (std::is_replaceable_v <D>, ""); + +class E trivially_relocatable_if_eligible { + int a; + void *b; + int c[3]; + A d[3]; + B &e = z; +}; + +static_assert (std::is_trivially_relocatable_v <E>, ""); +static_assert (!std::is_replaceable_v <E>, ""); + +class F trivially_relocatable_if_eligible : A {}; + +static_assert (std::is_trivially_relocatable_v <F>, ""); +static_assert (std::is_replaceable_v <F>, ""); + +class G trivially_relocatable_if_eligible : virtual A {}; + +static_assert (!std::is_trivially_relocatable_v <G>, ""); +static_assert (std::is_replaceable_v <G>, ""); + +class H trivially_relocatable_if_eligible : B {}; + +static_assert (!std::is_trivially_relocatable_v <H>, ""); +static_assert (!std::is_replaceable_v <H>, ""); + +class I trivially_relocatable_if_eligible { I (I &&); }; + +static_assert (std::is_trivially_relocatable_v <I>, ""); +static_assert (!std::is_replaceable_v <I>, ""); + +class J trivially_relocatable_if_eligible { ~J (); }; + +static_assert (std::is_trivially_relocatable_v <J>, ""); +static_assert (!std::is_replaceable_v <J>, ""); + +class K trivially_relocatable_if_eligible { + B a; + B b[1]; + const B c; + const B d[1]; +}; + +static_assert (!std::is_trivially_relocatable_v <K>, ""); +static_assert (!std::is_replaceable_v <K>, ""); + +class L trivially_relocatable_if_eligible: virtual A, B { B a; }; + +static_assert (!std::is_trivially_relocatable_v <L>, ""); +static_assert (!std::is_replaceable_v <L>, ""); + +static_assert (!std::is_trivially_relocatable_v <void>, ""); +static_assert (!std::is_trivially_relocatable_v <const void>, ""); +static_assert (std::is_trivially_relocatable_v <int>, ""); +static_assert (std::is_trivially_relocatable_v <const int>, ""); +static_assert (std::is_trivially_relocatable_v <char>, ""); +static_assert (std::is_trivially_relocatable_v <char const volatile>, ""); +static_assert (std::is_trivially_relocatable_v <unsigned long long>, ""); +static_assert (std::is_trivially_relocatable_v <void *>, ""); +static_assert (std::is_trivially_relocatable_v <const int *>, ""); +static_assert (!std::is_trivially_relocatable_v <int &>, ""); +static_assert (!std::is_trivially_relocatable_v <A &>, ""); +static_assert (std::is_trivially_relocatable_v <const A>, ""); +static_assert (std::is_trivially_relocatable_v <A [1]>, ""); +static_assert (std::is_trivially_relocatable_v <A []>, ""); +static_assert (!std::is_replaceable_v <void>, ""); +static_assert (!std::is_replaceable_v <const void>, ""); +static_assert (std::is_replaceable_v <int>, ""); +static_assert (!std::is_replaceable_v <const int>, ""); +static_assert (std::is_replaceable_v <char>, ""); +static_assert (!std::is_replaceable_v <char const volatile>, ""); +static_assert (std::is_replaceable_v <unsigned long long>, ""); +static_assert (std::is_replaceable_v <void *>, ""); +static_assert (std::is_replaceable_v <const int *>, ""); +static_assert (!std::is_replaceable_v <int &>, ""); +static_assert (!std::is_replaceable_v <A &>, ""); +static_assert (!std::is_replaceable_v <const A>, ""); +static_assert (std::is_replaceable_v <A [1]>, ""); +static_assert (std::is_replaceable_v <A []>, ""); + +struct M { const int i; }; + +static_assert (!std::is_trivially_relocatable_v <M>, ""); +static_assert (!std::is_replaceable_v <M>, ""); + +struct N trivially_relocatable_if_eligible { const int i; }; + +static_assert (std::is_trivially_relocatable_v <N>, ""); +static_assert (!std::is_replaceable_v <N>, ""); + +struct O { ~O (); }; + +static_assert (!std::is_trivially_relocatable_v <O>, ""); +static_assert (!std::is_replaceable_v <O>, ""); + +struct P { ~P () = default; }; + +static_assert (std::is_trivially_relocatable_v <P>, ""); +static_assert (std::is_replaceable_v <P>, ""); + +struct Q { Q (Q &&); Q (const Q &) = default; }; + +static_assert (!std::is_trivially_relocatable_v <Q>, ""); +static_assert (!std::is_replaceable_v <Q>, ""); + +struct R { R (R &&); }; + +static_assert (!std::is_trivially_relocatable_v <R>, ""); +static_assert (!std::is_replaceable_v <R>, ""); + +struct S { S (S &&) = default; }; + +static_assert (!std::is_trivially_relocatable_v <S>, ""); +static_assert (!std::is_replaceable_v <S>, ""); + +struct T { T (T &&) = default; T &operator= (T &&) = default; }; + +static_assert (std::is_trivially_relocatable_v <T>, ""); +static_assert (std::is_replaceable_v <T>, ""); + +struct U { U (const U &); }; + +static_assert (!std::is_trivially_relocatable_v <U>, ""); +static_assert (!std::is_replaceable_v <U>, ""); + +struct V { V (const V&) = default; }; + +static_assert (std::is_trivially_relocatable_v <V>, ""); +static_assert (std::is_replaceable_v <V>, ""); + +struct W { W (W &&) = delete; W (const W &) = default; }; + +static_assert (!std::is_trivially_relocatable_v <W>, ""); +static_assert (!std::is_replaceable_v <W>, ""); diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable3.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable3.C new file mode 100644 index 0000000..312c11b --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable3.C @@ -0,0 +1,213 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++11 } } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++17 } } + +#if __cpp_trivial_relocatability < 202502L +#define trivially_relocatable_if_eligible __trivially_relocatable_if_eligible +#define replaceable_if_eligible __replaceable_if_eligible +#endif + +namespace std +{ +template <typename T, T v> +struct integral_constant +{ + static constexpr T value = v; +}; + +template <typename> +struct is_trivially_relocatable; + +template <typename> +struct is_replaceable; + +template<typename T> +struct is_trivially_relocatable + : public integral_constant <bool, __builtin_is_trivially_relocatable (T)> +{ +}; + +template<typename T> +struct is_replaceable + : public integral_constant <bool, __builtin_is_replaceable (T)> +{ +}; + +template <typename T> +inline constexpr bool is_trivially_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_trivially_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + +template <typename T> +inline constexpr bool is_replaceable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_replaceable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } +} + +class A {}; + +struct B { ~B (); }; + +class C trivially_relocatable_if_eligible { C (C &&); }; + +template <typename T> +class D trivially_relocatable_if_eligible : T {}; +D<A> a; +D<B> b; + +static_assert (std::is_trivially_relocatable_v <D<A>>, ""); +static_assert (!std::is_trivially_relocatable_v <D<B>>, ""); +static_assert (std::is_replaceable_v <D<A>>, ""); +static_assert (!std::is_replaceable_v <D<B>>, ""); + +struct E { E (E &&) = delete; }; + +static_assert (!std::is_trivially_relocatable_v <E>, ""); +static_assert (!std::is_replaceable_v <E>, ""); + +struct F { F (const F &) = delete; }; + +static_assert (!std::is_trivially_relocatable_v <F>, ""); +static_assert (!std::is_replaceable_v <F>, ""); + +struct G { G &operator= (G &&) = delete; }; + +static_assert (!std::is_trivially_relocatable_v <G>, ""); +static_assert (!std::is_replaceable_v <G>, ""); + +struct H { ~H () = delete; }; + +static_assert (!std::is_trivially_relocatable_v <H>, ""); +static_assert (!std::is_replaceable_v <H>, ""); + +union U { C u; }; + +static_assert (std::is_trivially_relocatable_v <U>, ""); +static_assert (!std::is_replaceable_v <U>, ""); + +template <typename T> +struct I { int s; T t; }; + +static_assert (std::is_trivially_relocatable_v <I<int>>, ""); +static_assert (std::is_trivially_relocatable_v <I<volatile int>>, ""); +static_assert (!std::is_trivially_relocatable_v <I<const int>>, ""); +static_assert (!std::is_trivially_relocatable_v <I<const int &>>, ""); +static_assert (!std::is_trivially_relocatable_v <I<int &>>, ""); +static_assert (std::is_trivially_relocatable_v <I<int [2]>>, ""); +static_assert (!std::is_trivially_relocatable_v <I<const int [2]>>, ""); +static_assert (std::is_trivially_relocatable_v <I<int []>>, ""); +static_assert (std::is_replaceable_v <I<int>>, ""); +static_assert (!std::is_replaceable_v <I<volatile int>>, ""); +static_assert (!std::is_replaceable_v <I<const int>>, ""); +static_assert (!std::is_replaceable_v <I<const int &>>, ""); +static_assert (!std::is_replaceable_v <I<int &>>, ""); +static_assert (std::is_replaceable_v <I<int [2]>>, ""); +static_assert (!std::is_replaceable_v <I<const int [2]>>, ""); + +template <typename T> +struct J trivially_relocatable_if_eligible { int s; T t; }; + +static_assert (std::is_trivially_relocatable_v <J<int>>, ""); +static_assert (std::is_trivially_relocatable_v <J<volatile int>>, ""); +static_assert (std::is_trivially_relocatable_v <J<const int>>, ""); +static_assert (std::is_trivially_relocatable_v <J<const int &>>, ""); +static_assert (std::is_trivially_relocatable_v <J<int &>>, ""); +static_assert (std::is_trivially_relocatable_v <J<int [2]>>, ""); +static_assert (std::is_trivially_relocatable_v <J<const int [2]>>, ""); +static_assert (std::is_trivially_relocatable_v <J<int []>>, ""); +static_assert (std::is_replaceable_v <J<int>>, ""); +static_assert (!std::is_replaceable_v <J<volatile int>>, ""); +static_assert (!std::is_replaceable_v <J<const int>>, ""); +static_assert (!std::is_replaceable_v <J<const int &>>, ""); +static_assert (!std::is_replaceable_v <J<int &>>, ""); +static_assert (std::is_replaceable_v <J<int [2]>>, ""); +static_assert (!std::is_replaceable_v <J<const int [2]>>, ""); +static_assert (std::is_replaceable_v <J<int []>>, ""); + +struct K { K (K &&) = delete; }; + +static_assert (!std::is_trivially_relocatable_v <K>, ""); +static_assert (!std::is_replaceable_v <K>, ""); + +struct L { L (const L &) = delete; }; + +static_assert (!std::is_trivially_relocatable_v <L>, ""); +static_assert (!std::is_replaceable_v <L>, ""); + +struct M { M &operator= (M &&) = delete; }; + +static_assert (!std::is_trivially_relocatable_v <M>, ""); +static_assert (!std::is_replaceable_v <M>, ""); + +struct N { N (N &&) = default; N &operator= (N &&) = default; }; + +static_assert (std::is_trivially_relocatable_v <N>, ""); +static_assert (std::is_replaceable_v <N>, ""); + +struct O { + O (const O &) = default; + O (O &&) = default; + O &operator= (O &&) = default; +}; + +static_assert (std::is_trivially_relocatable_v <O>, ""); +static_assert (std::is_replaceable_v <O>, ""); + +struct P { P (P &&) = default; P &operator= (P &&) = default; }; + +static_assert (std::is_trivially_relocatable_v <P>, ""); +static_assert (std::is_replaceable_v <P>, ""); + +struct Q { Q (Q &&) {} }; + +static_assert (!std::is_trivially_relocatable_v <Q>, ""); +static_assert (!std::is_replaceable_v <Q>, ""); + +struct R { R (const R &) {} }; + +static_assert (!std::is_trivially_relocatable_v <R>, ""); +static_assert (!std::is_replaceable_v <R>, ""); + +struct S { S &operator= (const S &) { return *this; }; }; + +static_assert (!std::is_trivially_relocatable_v <S>, ""); +static_assert (!std::is_replaceable_v <S>, ""); + +struct T {}; + +static_assert (std::is_trivially_relocatable_v <T>, ""); +static_assert (std::is_replaceable_v <T>, ""); + +struct V replaceable_if_eligible {}; + +static_assert (std::is_trivially_relocatable_v <V>, ""); +static_assert (std::is_replaceable_v <V>, ""); + +struct W { template <typename U> W (const U &) = delete; }; + +static_assert (std::is_trivially_relocatable_v <W>, ""); +static_assert (std::is_replaceable_v <W>, ""); + +template <typename T> +struct X : T {}; + +static_assert (!std::is_trivially_relocatable_v <X<Q>>, ""); +static_assert (!std::is_replaceable_v <X<Q>>, ""); + +template <typename T> +struct Y : virtual T {}; + +static_assert (!std::is_trivially_relocatable_v <Y<I<int>>>, ""); +static_assert (!std::is_trivially_relocatable_v <Y<I<const int>>>, ""); +static_assert (!std::is_trivially_relocatable_v <Y<Q>>, ""); +static_assert (std::is_replaceable_v <Y<I<int>>>, ""); +static_assert (!std::is_replaceable_v <Y<I<const int>>>, ""); +static_assert (!std::is_replaceable_v <Y<Q>>, ""); + +struct Z { + virtual ~Z () = default; + Z (Z &&) = default; + Z &operator= (Z &&) = default; +}; + +static_assert (std::is_trivially_relocatable_v <Z>, ""); +static_assert (std::is_replaceable_v <Z>, ""); diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable4.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable4.C new file mode 100644 index 0000000..10aafc1 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable4.C @@ -0,0 +1,128 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++11 } } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++17 } } + +#if __cpp_trivial_relocatability < 202502L +#define trivially_relocatable_if_eligible __trivially_relocatable_if_eligible +#define replaceable_if_eligible __replaceable_if_eligible +#endif + +namespace std +{ +template <typename T, T v> +struct integral_constant +{ + static constexpr T value = v; +}; + +template <typename> +struct is_trivially_relocatable; + +template <typename> +struct is_replaceable; + +template<typename T> +struct is_trivially_relocatable + : public integral_constant <bool, __builtin_is_trivially_relocatable (T)> +{ +}; + +template<typename T> +struct is_replaceable + : public integral_constant <bool, __builtin_is_replaceable (T)> +{ +}; + +template <typename T> +inline constexpr bool is_trivially_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_trivially_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + +template <typename T> +inline constexpr bool is_replaceable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_replaceable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } +} + +struct A replaceable_if_eligible { + ~A () = delete; + A (A &&) = default; + A &operator= (A &&) = default; +}; + +static_assert (!std::is_trivially_relocatable_v <A>, ""); +static_assert (!std::is_replaceable_v <A>, ""); + +struct B replaceable_if_eligible { B (const B &) = delete; }; + +static_assert (!std::is_trivially_relocatable_v <B>, ""); +static_assert (!std::is_replaceable_v <B>, ""); + +template <typename T> +struct C replaceable_if_eligible : virtual T {}; + +static_assert (!std::is_trivially_relocatable_v <C<A>>, ""); +static_assert (!std::is_trivially_relocatable_v <C<B>>, ""); +static_assert (!std::is_replaceable_v <C<A>>, ""); +static_assert (!std::is_replaceable_v <C<B>>, ""); + +template <typename T> +struct D { int s; T t; }; + +static_assert (!std::is_trivially_relocatable_v <C<D<int>>>, ""); +static_assert (std::is_replaceable_v <C<D<int>>>, ""); + +struct E trivially_relocatable_if_eligible replaceable_if_eligible { + E (E &&); + E &operator= (E &&) = default; +}; + +static_assert (std::is_trivially_relocatable_v <E>, ""); +static_assert (std::is_replaceable_v <E>, ""); + +struct F trivially_relocatable_if_eligible replaceable_if_eligible { + F (F &&) = default; + F &operator= (F &&); +}; + +static_assert (std::is_trivially_relocatable_v <F>, ""); +static_assert (std::is_replaceable_v <F>, ""); + +struct G replaceable_if_eligible { G (G const &) = default; }; + +static_assert (std::is_trivially_relocatable_v <G>, ""); +static_assert (std::is_replaceable_v <G>, ""); + +struct H { H (H const &) = default; }; + +static_assert (std::is_trivially_relocatable_v <H>, ""); +static_assert (std::is_replaceable_v <H>, ""); + +struct I replaceable_if_eligible { I &operator= (const I &) = default; }; + +static_assert (std::is_trivially_relocatable_v <I>, ""); +static_assert (std::is_replaceable_v <I>, ""); + +struct J { J &operator= (J const &) = default; }; + +static_assert (std::is_trivially_relocatable_v <J>, ""); +static_assert (std::is_replaceable_v <J>, ""); + +struct K { K (const K &) = delete; }; + +static_assert (!std::is_trivially_relocatable_v <K>, ""); +static_assert (!std::is_replaceable_v <K>, ""); + +struct L { L (L&&) = delete; }; + +static_assert (!std::is_trivially_relocatable_v <L>, ""); +static_assert (!std::is_replaceable_v <L>, ""); + +struct M { M operator= (M); }; + +static_assert (!std::is_trivially_relocatable_v <M>, ""); +static_assert (!std::is_replaceable_v <M>, ""); + +struct N { N operator= (N &&); }; + +static_assert (!std::is_trivially_relocatable_v <N>, ""); +static_assert (!std::is_replaceable_v <N>, ""); diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable5.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable5.C new file mode 100644 index 0000000..0416137 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable5.C @@ -0,0 +1,77 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++11 } } +// { dg-additional-options "-Wc++26-compat" } + +struct A __trivially_relocatable_if_eligible { A (const A &&); }; +struct B __replaceable_if_eligible { B (const B &&); B &operator= (B &&); }; +struct C __replaceable_if_eligible __final __trivially_relocatable_if_eligible { C (const C &&); C &operator= (C &&); }; +#if __cpp_trivial_relocatability >= 202502L +struct D trivially_relocatable_if_eligible { D (const D &&); }; +struct E replaceable_if_eligible { E (const E &&); E &operator= (E &&); }; +struct F trivially_relocatable_if_eligible replaceable_if_eligible final { F (const F &&); F &operator= (F &&); }; +#else +struct D trivially_relocatable_if_eligible {}; // { dg-warning "identifier 'trivially_relocatable_if_eligible' is a conditional keyword in" "" { target c++23_down } } +// { dg-error "variable 'D trivially_relocatable_if_eligible' has initializer but incomplete type" "" { target c++23_down } .-1 } +struct E replaceable_if_eligible {}; // { dg-warning "identifier 'replaceable_if_eligible' is a conditional keyword in" "" { target c++23_down } } +// { dg-error "variable 'E replaceable_if_eligible' has initializer but incomplete type" "" { target c++23_down } .-1 } +struct F trivially_relocatable_if_eligible replaceable_if_eligible {}; // { dg-warning "identifier 'trivially_relocatable_if_eligible' is a conditional keyword in" "" { target c++23_down } } +// { dg-error "expected initializer before 'replaceable_if_eligible'" "" { target c++23_down } .-1 } +#endif +#if __cplusplus <= 202302L +struct G {}; +struct G trivially_relocatable_if_eligible {}; // { dg-warning "identifier 'trivially_relocatable_if_eligible' is a conditional keyword in" "" { target c++23_down } } +struct H {}; +struct H replaceable_if_eligible {}; // { dg-warning "identifier 'replaceable_if_eligible' is a conditional keyword in" "" { target c++23_down } } +struct I {}; +struct I trivially_relocatable_if_eligible replaceable_if_eligible {}; // { dg-warning "identifier 'trivially_relocatable_if_eligible' is a conditional keyword in" "" { target c++23_down } } +#endif // { dg-error "expected initializer before 'replaceable_if_eligible'" "" { target c++23_down } .-1 } +struct J {}; +struct J __trivially_relocatable_if_eligible {}; // { dg-error "redefinition of 'struct J'" } +struct K {}; +struct K __replaceable_if_eligible {}; // { dg-error "redefinition of 'struct K'" } +struct L {}; +struct L __trivially_relocatable_if_eligible __replaceable_if_eligible {}; // { dg-error "redefinition of 'struct L'" } +struct M __trivially_relocatable_if_eligible __trivially_relocatable_if_eligible {}; // { dg-error "duplicate '__trivially_relocatable_if_eligible' specifier" } +struct N __replaceable_if_eligible __replaceable_if_eligible {}; // { dg-error "duplicate '__replaceable_if_eligible' specifier" } +struct O __trivially_relocatable_if_eligible __replaceable_if_eligible __replaceable_if_eligible __trivially_relocatable_if_eligible final final {}; +// { dg-error "duplicate '__replaceable_if_eligible' specifier" "" { target *-*-* } .-1 } +// { dg-error "duplicate '__trivially_relocatable_if_eligible' specifier" "" { target *-*-* } .-2 } +// { dg-error "duplicate 'final' specifier" "" { target *-*-* } .-3 } +#if __cpp_trivial_relocatability >= 202502L +struct P trivially_relocatable_if_eligible trivially_relocatable_if_eligible {}; // { dg-error "duplicate 'trivially_relocatable_if_eligible' specifier" "" { target c++26 } } +struct Q replaceable_if_eligible replaceable_if_eligible {}; // { dg-error "duplicate 'replaceable_if_eligible' specifier" "" { target c++26 } } +struct R trivially_relocatable_if_eligible replaceable_if_eligible replaceable_if_eligible trivially_relocatable_if_eligible final final {}; +// { dg-error "duplicate 'replaceable_if_eligible' specifier" "" { target c++26 } .-1 } +// { dg-error "duplicate 'trivially_relocatable_if_eligible' specifier" "" { target c++26 } .-2 } +// { dg-error "duplicate 'final' specifier" "" { target c++26 } .-3 } +struct S trivially_relocatable_if_eligible __trivially_relocatable_if_eligible {}; // { dg-error "duplicate '__trivially_relocatable_if_eligible' specifier" "" { target c++26 } } +struct T replaceable_if_eligible __replaceable_if_eligible {}; // { dg-error "duplicate '__replaceable_if_eligible' specifier" "" { target c++26 } } +struct U trivially_relocatable_if_eligible replaceable_if_eligible __replaceable_if_eligible __trivially_relocatable_if_eligible final __final {}; +// { dg-error "duplicate '__replaceable_if_eligible' specifier" "" { target c++26 } .-1 } +// { dg-error "duplicate '__trivially_relocatable_if_eligible' specifier" "" { target c++26 } .-2 } +// { dg-error "duplicate '__final' specifier" "" { target c++26 } .-3 } +struct V __trivially_relocatable_if_eligible trivially_relocatable_if_eligible {}; // { dg-error "duplicate 'trivially_relocatable_if_eligible' specifier" "" { target c++26 } } +struct W __replaceable_if_eligible replaceable_if_eligible {}; // { dg-error "duplicate 'replaceable_if_eligible' specifier" "" { target c++26 } } +struct X __trivially_relocatable_if_eligible __replaceable_if_eligible replaceable_if_eligible trivially_relocatable_if_eligible __final final {}; +// { dg-error "duplicate 'replaceable_if_eligible' specifier" "" { target c++26 } .-1 } +// { dg-error "duplicate 'trivially_relocatable_if_eligible' specifier" "" { target c++26 } .-2 } +// { dg-error "duplicate 'final' specifier" "" { target c++26 } .-3 } +#else +struct Y {}; +Y foo (); +struct Y trivially_relocatable_if_eligible = foo (); // { dg-warning "identifier 'trivially_relocatable_if_eligible' is a conditional keyword in" "" { target c++23_down } } +struct Z {}; +Z bar (); +struct Z replaceable_if_eligible = bar (); // { dg-warning "identifier 'replaceable_if_eligible' is a conditional keyword in" "" { target c++23_down } } +#endif + +static_assert (__builtin_is_trivially_relocatable (A), ""); +static_assert (__builtin_is_replaceable (B), ""); +static_assert (__builtin_is_trivially_relocatable (C), ""); +static_assert (__builtin_is_replaceable (C), ""); +#if __cpp_trivial_relocatability >= 202502L +static_assert (__builtin_is_trivially_relocatable (D), ""); +static_assert (__builtin_is_replaceable (E), ""); +static_assert (__builtin_is_trivially_relocatable (F), ""); +static_assert (__builtin_is_replaceable (F), ""); +#endif diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable6.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable6.C new file mode 100644 index 0000000..ffcf12b --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable6.C @@ -0,0 +1,30 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++98_only } } +// { dg-additional-options "-Wc++26-compat" } + +struct A __trivially_relocatable_if_eligible {}; +struct B __replaceable_if_eligible {}; +struct C __replaceable_if_eligible __final __trivially_relocatable_if_eligible {}; +struct D trivially_relocatable_if_eligible {}; // { dg-warning "identifier 'trivially_relocatable_if_eligible' is a conditional keyword in" } +// { dg-error "variable 'D trivially_relocatable_if_eligible' has initializer but incomplete type" "" { target *-*-* } .-1 } +// { dg-error "extended initializer lists only available with" "" { target *-*-* } .-2 } +struct E replaceable_if_eligible {}; // { dg-warning "identifier 'replaceable_if_eligible' is a conditional keyword in" } +// { dg-error "variable 'E replaceable_if_eligible' has initializer but incomplete type" "" { target *-*-* } .-1 } +// { dg-error "extended initializer lists only available with" "" { target *-*-* } .-2 } +struct F trivially_relocatable_if_eligible replaceable_if_eligible {}; // { dg-warning "identifier 'trivially_relocatable_if_eligible' is a conditional keyword in" } +// { dg-error "expected initializer before 'replaceable_if_eligible'" "" { target *-*-* } .-1 } +struct G {}; +struct G trivially_relocatable_if_eligible {}; // { dg-warning "identifier 'trivially_relocatable_if_eligible' is a conditional keyword in" } +// { dg-error "extended initializer lists only available with" "" { target *-*-* } .-1 } +struct H {}; +struct H replaceable_if_eligible {}; // { dg-warning "identifier 'replaceable_if_eligible' is a conditional keyword in" } +// { dg-error "extended initializer lists only available with" "" { target *-*-* } .-1 } +struct I {}; +struct I trivially_relocatable_if_eligible replaceable_if_eligible {}; // { dg-warning "identifier 'trivially_relocatable_if_eligible' is a conditional keyword in" } +// { dg-error "expected initializer before 'replaceable_if_eligible'" "" { target *-*-* } .-1 } +struct J {}; +J foo (); +struct J trivially_relocatable_if_eligible = foo (); // { dg-warning "identifier 'trivially_relocatable_if_eligible' is a conditional keyword in" } +struct K {}; +K bar (); +struct K replaceable_if_eligible = bar (); // { dg-warning "identifier 'replaceable_if_eligible' is a conditional keyword in" } diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable7.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable7.C new file mode 100644 index 0000000..608c245 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable7.C @@ -0,0 +1,33 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++11 } } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++17 } } + +namespace std +{ +template <typename T, T v> +struct integral_constant +{ + static constexpr T value = v; +}; + +template <typename T> +inline constexpr bool is_trivially_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_trivially_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + // { dg-error "invalid use of incomplete type 'struct A'" "" { target *-*-* } .-1 } + +template <typename T> +inline constexpr bool is_nothrow_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_nothrow_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + // { dg-error "invalid use of incomplete type 'struct A'" "" { target *-*-* } .-1 } + +template <typename T> +inline constexpr bool is_replaceable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_replaceable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } +} // { dg-error "invalid use of incomplete type 'struct A'" "" { target *-*-* } .-1 } + +struct A; // { dg-message "forward declaration of 'struct A'" } + +auto a = std::is_trivially_relocatable_v <A>; // { dg-message "required from here" } +auto b = std::is_nothrow_relocatable_v <A>; // { dg-message "required from here" } +auto c = std::is_replaceable_v <A>; // { dg-message "required from here" } diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable8.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable8.C new file mode 100644 index 0000000..5f8390d --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable8.C @@ -0,0 +1,190 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++11 } } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++17 } } + +#if __cpp_trivial_relocatability < 202502L +#define trivially_relocatable_if_eligible __trivially_relocatable_if_eligible +#define replaceable_if_eligible __replaceable_if_eligible +#endif + +namespace std +{ +template <typename T, T v> +struct integral_constant +{ + static constexpr T value = v; +}; + +template <typename> +struct is_trivially_relocatable; + +template <typename> +struct is_replaceable; + +template<typename T> +struct is_trivially_relocatable + : public integral_constant <bool, __builtin_is_trivially_relocatable (T)> +{ +}; + +template<typename T> +struct is_nothrow_relocatable + : public integral_constant <bool, __builtin_is_nothrow_relocatable (T)> +{ +}; + +template<typename T> +struct is_replaceable + : public integral_constant <bool, __builtin_is_replaceable (T)> +{ +}; + +template <typename T> +inline constexpr bool is_trivially_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_trivially_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + +template <typename T> +inline constexpr bool is_nothrow_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_nothrow_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + +template <typename T> +inline constexpr bool is_replaceable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_replaceable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } +} + +struct A { A (A &&) = default; A &operator= (A &&) = default; ~A () = default; int a; }; + +static_assert (std::is_trivially_relocatable_v <A>, ""); +static_assert (std::is_nothrow_relocatable_v <A>, ""); +static_assert (std::is_replaceable_v <A>, ""); + +struct B { B (B &&); B &operator= (B &&) = default; ~B () = default; int a; }; + +static_assert (!std::is_trivially_relocatable_v <B>, ""); +static_assert (!std::is_nothrow_relocatable_v <B>, ""); +static_assert (!std::is_replaceable_v <B>, ""); + +struct C { C (C &&) = default; C &operator= (C &&); ~C () = default; int a; }; + +static_assert (!std::is_trivially_relocatable_v <C>, ""); +static_assert (std::is_nothrow_relocatable_v <C>, ""); +static_assert (!std::is_replaceable_v <C>, ""); + +struct D { D (D &&) = delete; D &operator= (D &&) = default; int a; }; + +static_assert (!std::is_trivially_relocatable_v <D>, ""); +static_assert (!std::is_nothrow_relocatable_v <D>, ""); +static_assert (!std::is_replaceable_v <D>, ""); + +struct E { E (E &&) = default; E &operator= (E &&) = delete; int a; }; + +static_assert (!std::is_trivially_relocatable_v <E>, ""); +static_assert (std::is_nothrow_relocatable_v <E>, ""); +static_assert (!std::is_replaceable_v <E>, ""); + +struct F { F (F &&) = default; F &operator= (F &&) = default; ~F () = delete; int a; }; + +static_assert (!std::is_trivially_relocatable_v <F>, ""); +static_assert (!std::is_nothrow_relocatable_v <F>, ""); +static_assert (!std::is_replaceable_v <F>, ""); + +struct G { G (const G &) = default; G &operator= (const G &) = default; int a; }; + +static_assert (std::is_trivially_relocatable_v <G>, ""); +static_assert (std::is_nothrow_relocatable_v <G>, ""); +static_assert (std::is_replaceable_v <G>, ""); + +struct H { H (const H &); H &operator= (const H &) = default; int a; }; + +static_assert (!std::is_trivially_relocatable_v <H>, ""); +static_assert (!std::is_nothrow_relocatable_v <H>, ""); +static_assert (!std::is_replaceable_v <H>, ""); + +struct I { I (const I &) = default; I &operator= (const I &); ~I () = default; int a; }; + +static_assert (!std::is_trivially_relocatable_v <I>, ""); +static_assert (std::is_nothrow_relocatable_v <I>, ""); +static_assert (!std::is_replaceable_v <I>, ""); + +struct J { J (const J &) = delete; J &operator= (const J &) = default; int a; }; + +static_assert (!std::is_trivially_relocatable_v <J>, ""); +static_assert (!std::is_nothrow_relocatable_v <J>, ""); +static_assert (!std::is_replaceable_v <J>, ""); + +struct K { K (const K &) = default; K &operator= (const K &) = delete; int a; }; + +static_assert (!std::is_trivially_relocatable_v <K>, ""); +static_assert (std::is_nothrow_relocatable_v <K>, ""); +static_assert (!std::is_replaceable_v <K>, ""); + +struct M; +struct L { L (L &&) = default; L (M &&); L &operator= (L &&) = default; int a; }; + +static_assert (std::is_trivially_relocatable_v <L>, ""); +static_assert (std::is_nothrow_relocatable_v <L>, ""); +static_assert (std::is_replaceable_v <L>, ""); + +struct M : public L { using L::L; M (const M &); M &operator= (M &&) = default; int b; }; + +static_assert (!std::is_trivially_relocatable_v <M>, ""); +static_assert (!std::is_nothrow_relocatable_v <M>, ""); +static_assert (!std::is_replaceable_v <M>, ""); + +struct O; +struct N { N (N &&) = default; N &operator= (N &&) = default; N &operator= (O &&); int a; }; + +static_assert (std::is_trivially_relocatable_v <N>, ""); +static_assert (std::is_nothrow_relocatable_v <N>, ""); +static_assert (std::is_replaceable_v <N>, ""); + +struct O : public N { using N::operator=; O (O &&) = default; int b; }; + +static_assert (!std::is_trivially_relocatable_v <O>, ""); +static_assert (std::is_nothrow_relocatable_v <O>, ""); +static_assert (!std::is_replaceable_v <O>, ""); + +struct Q; +struct P { template <typename T> P (T &&) {} }; + +static_assert (std::is_trivially_relocatable_v <P>, ""); +static_assert (std::is_nothrow_relocatable_v <P>, ""); +static_assert (std::is_replaceable_v <P>, ""); + +struct Q : public P { using P::P; Q (const Q &); }; + +static_assert (!std::is_trivially_relocatable_v <Q>, ""); +static_assert (!std::is_nothrow_relocatable_v <Q>, ""); +static_assert (!std::is_replaceable_v <Q>, ""); + +struct S; +struct R { R (const R &) = default; R (const M &); R &operator= (R &&) = default; int a; }; + +static_assert (std::is_trivially_relocatable_v <R>, ""); +static_assert (std::is_nothrow_relocatable_v <R>, ""); +static_assert (std::is_replaceable_v <R>, ""); + +struct S : public R { using R::R; S &operator= (S &&) = default; int b; }; + +static_assert (!std::is_trivially_relocatable_v <S>, ""); +static_assert (!std::is_nothrow_relocatable_v <S>, ""); +static_assert (!std::is_replaceable_v <S>, ""); + +struct T { T (T &&) = default; T &operator= (T &&) = default; ~T (); int a; }; + +static_assert (!std::is_trivially_relocatable_v <T>, ""); +static_assert (std::is_nothrow_relocatable_v <T>, ""); +static_assert (!std::is_replaceable_v <T>, ""); + +struct U { U (const U &) = default; U &operator= (const U &) = default; ~U (); int a; }; + +static_assert (!std::is_trivially_relocatable_v <U>, ""); +static_assert (std::is_nothrow_relocatable_v <U>, ""); +static_assert (!std::is_replaceable_v <U>, ""); + +struct V { public: V (); private: V (V &&) = default; V &operator= (V &&) = default; ~V () = default; int a; }; + +static_assert (std::is_trivially_relocatable_v <V>, ""); +static_assert (std::is_nothrow_relocatable_v <V>, ""); +static_assert (std::is_replaceable_v <V>, ""); diff --git a/gcc/testsuite/g++.dg/cpp26/trivially-relocatable9.C b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable9.C new file mode 100644 index 0000000..1c45b53 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp26/trivially-relocatable9.C @@ -0,0 +1,134 @@ +// P2786R13 - C++26 Trivial Relocatability +// { dg-do compile { target c++11 } } +// { dg-options "" } +// { dg-additional-options "-pedantic" { target c++17 } } + +#if __cpp_trivial_relocatability < 202502L +#define trivially_relocatable_if_eligible __trivially_relocatable_if_eligible +#define replaceable_if_eligible __replaceable_if_eligible +#endif + +namespace std +{ +template <typename T, T v> +struct integral_constant +{ + static constexpr T value = v; +}; + +template <typename> +struct is_trivially_relocatable; + +template <typename> +struct is_replaceable; + +template<typename T> +struct is_trivially_relocatable + : public integral_constant <bool, __builtin_is_trivially_relocatable (T)> +{ +}; + +template<typename T> +struct is_nothrow_relocatable + : public integral_constant <bool, __builtin_is_nothrow_relocatable (T)> +{ +}; + +template<typename T> +struct is_replaceable + : public integral_constant <bool, __builtin_is_replaceable (T)> +{ +}; + +template <typename T> +inline constexpr bool is_trivially_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_trivially_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + +template <typename T> +inline constexpr bool is_nothrow_relocatable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_nothrow_relocatable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } + +template <typename T> +inline constexpr bool is_replaceable_v // { dg-warning "inline variables are only available with" "" { target c++14_down } } + = __builtin_is_replaceable (T); // { dg-warning "variable templates only available with" "" { target c++11_down } .-1 } +} + +struct A trivially_relocatable_if_eligible { A (A &&); A &operator= (A &&); ~A (); int a; }; + +static_assert (std::is_trivially_relocatable_v <A>, ""); +static_assert (std::is_nothrow_relocatable_v <A>, ""); + +struct B { B (B &&); B &operator= (B &&); ~B (); int a; }; + +static_assert (!std::is_trivially_relocatable_v <B>, ""); +static_assert (!std::is_nothrow_relocatable_v <B>, ""); + +struct C trivially_relocatable_if_eligible : public A { C (C &&); C &operator= (C &&); ~C (); int a; }; + +static_assert (std::is_trivially_relocatable_v <C>, ""); +static_assert (std::is_nothrow_relocatable_v <C>, ""); + +struct D trivially_relocatable_if_eligible : public B { D (D &&); D &operator= (D &&); ~D (); int a; }; + +static_assert (!std::is_trivially_relocatable_v <D>, ""); +static_assert (!std::is_nothrow_relocatable_v <D>, ""); + +struct E trivially_relocatable_if_eligible { E (E &&); E &operator= (E &&); ~E (); A a; }; + +static_assert (std::is_trivially_relocatable_v <E>, ""); +static_assert (std::is_nothrow_relocatable_v <E>, ""); + +struct F trivially_relocatable_if_eligible { F (F &&) noexcept; F &operator= (F &&); ~F (); B a; }; + +static_assert (!std::is_trivially_relocatable_v <F>, ""); +static_assert (std::is_nothrow_relocatable_v <F>, ""); + +struct G trivially_relocatable_if_eligible { G (G &&); G &operator= (G &&); ~G () = delete; int a; }; + +static_assert (!std::is_trivially_relocatable_v <G>, ""); +static_assert (!std::is_nothrow_relocatable_v <G>, ""); + +struct H trivially_relocatable_if_eligible : virtual A { H (H &&); H &operator= (H &&); ~H (); int a; }; + +static_assert (!std::is_trivially_relocatable_v <H>, ""); +static_assert (!std::is_nothrow_relocatable_v <H>, ""); + +struct I trivially_relocatable_if_eligible { I (I &&); I &operator= (I &&); ~I (); A &a; int &b; }; + +static_assert (std::is_trivially_relocatable_v <I>, ""); +static_assert (std::is_nothrow_relocatable_v <I>, ""); + +struct J trivially_relocatable_if_eligible { J (J &&); J &operator= (J &&); ~J (); B &a; int &b; }; + +static_assert (std::is_trivially_relocatable_v <J>, ""); +static_assert (std::is_nothrow_relocatable_v <J>, ""); + +struct K trivially_relocatable_if_eligible { K (K &&) noexcept; K &operator= (K &&); ~K (); union { A a; int b; char c; }; }; + +static_assert (!std::is_trivially_relocatable_v <K>, ""); +static_assert (std::is_nothrow_relocatable_v <K>, ""); + +struct L trivially_relocatable_if_eligible { L (L &&); L &operator= (L &&); ~L (); union { int a; B b; short c; }; }; + +static_assert (!std::is_trivially_relocatable_v <L>, ""); +static_assert (!std::is_nothrow_relocatable_v <L>, ""); + +struct M trivially_relocatable_if_eligible { M (M &&); M &operator= (M &&); ~M () = default; int a; }; + +static_assert (std::is_trivially_relocatable_v <M>, ""); +static_assert (std::is_nothrow_relocatable_v <M>, ""); + +struct N trivially_relocatable_if_eligible { N (N &&); N &operator= (N &&); ~N (); union { M a; int b; char c; }; }; + +static_assert (std::is_trivially_relocatable_v <N>, ""); +static_assert (std::is_nothrow_relocatable_v <N>, ""); + +struct O trivially_relocatable_if_eligible { O (O &&); O &operator= (O &&); ~O (); union { unsigned long long a; int b; char c; }; }; + +static_assert (std::is_trivially_relocatable_v <O>, ""); +static_assert (std::is_nothrow_relocatable_v <O>, ""); + +struct P { P (P &&) noexcept; P &operator= (P &&); ~P (); int a; }; + +static_assert (!std::is_trivially_relocatable_v <P>, ""); +static_assert (std::is_nothrow_relocatable_v <P>, ""); diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-traits3.C b/gcc/testsuite/g++.dg/cpp2a/concepts-traits3.C index 3e87da4..90d859a 100644 --- a/gcc/testsuite/g++.dg/cpp2a/concepts-traits3.C +++ b/gcc/testsuite/g++.dg/cpp2a/concepts-traits3.C @@ -1,49 +1,58 @@ // PR c++/100474 // { dg-do compile { target c++20 } } -struct S { S() = delete; S(const S&); }; +struct S { S() = delete; S(const S&); }; // { dg-line S } template<class T> concept Aggregate = __is_aggregate(T); -// { dg-message "'S' is not an aggregate" "" { target *-*-* } .-1 } +// { dg-message "'S' is not an aggregate" "" { target *-*-* } S } template<class T> concept TriviallyCopyable = __is_trivially_copyable(T); -// { dg-message "'S' is not trivially copyable" "" { target *-*-* } .-1 } +// { dg-message "'S' is not trivially copyable" "" { target *-*-* } S } template<class T, class U> concept Assignable = __is_assignable(T, U); -// { dg-message "'S' is not assignable from 'int'" "" { target *-*-* } .-1 } +// { dg-message "'S' is not assignable from 'int', because" "" { target *-*-* } .-1 } +// { dg-error "no match for 'operator='" "" { target *-*-* } .-2 } template<class T, class U> concept TriviallyAssignable = __is_trivially_assignable(T, U); // { dg-message "'S' is not trivially assignable from 'int'" "" { target *-*-* } .-1 } +// { dg-error "no match for 'operator='" "" { target *-*-* } .-2 } template<class T, class U> concept NothrowAssignable = __is_nothrow_assignable(T, U); // { dg-message "'S' is not nothrow assignable from 'int'" "" { target *-*-* } .-1 } +// { dg-error "no match for 'operator='" "" { target *-*-* } .-2 } template<class T, class... Args> concept Constructible = __is_constructible(T, Args...); // { dg-message "'S' is not default constructible" "" { target *-*-* } .-1 } -// { dg-message "'S' is not constructible from 'int'" "" { target *-*-* } .-2 } -// { dg-message "'S' is not constructible from 'int, char'" "" { target *-*-* } .-3 } +// { dg-error "use of deleted function 'S::S\\(\\)'" "" { target *-*-* } .-2 } +// { dg-message "'S' is not constructible from 'int'" "" { target *-*-* } .-3 } +// { dg-message "'S' is not constructible from 'int, char'" "" { target *-*-* } .-4 } +// { dg-error "no matching function for call to 'S::S" "" { target *-*-* } .-5 } template<class T, class... Args> concept TriviallyConstructible = __is_trivially_constructible(T, Args...); // { dg-message "'S' is not trivially default constructible" "" { target *-*-* } .-1 } -// { dg-message "'S' is not trivially constructible from 'int'" "" { target *-*-* } .-2 } -// { dg-message "'S' is not trivially constructible from 'int, char'" "" { target *-*-* } .-3 } +// { dg-error "use of deleted function 'S::S\\(\\)'" "" { target *-*-* } .-2 } +// { dg-message "'S' is not trivially constructible from 'int'" "" { target *-*-* } .-3 } +// { dg-message "'S' is not trivially constructible from 'int, char'" "" { target *-*-* } .-4 } +// { dg-error "no matching function for call to 'S::S" "" { target *-*-* } .-5 } template<class T, class... Args> concept NothrowConstructible = __is_nothrow_constructible(T, Args...); // { dg-message "'S' is not nothrow default constructible" "" { target *-*-* } .-1 } -// { dg-message "'S' is not nothrow constructible from 'int'" "" { target *-*-* } .-2 } -// { dg-message "'S' is not nothrow constructible from 'int, char'" "" { target *-*-* } .-3 } +// { dg-error "use of deleted function 'S::S\\(\\)'" "" { target *-*-* } .-2 } +// { dg-message "'S' is not nothrow constructible from 'int'" "" { target *-*-* } .-3 } +// { dg-message "'S' is not nothrow constructible from 'int, char'" "" { target *-*-* } .-4 } +// { dg-error "no matching function for call to 'S::S" "" { target *-*-* } .-5 } template<class T> concept UniqueObjReps = __has_unique_object_representations(T); -// { dg-message "'S' does not have unique object representations" "" { target *-*-* } .-1 } +// { dg-message "'S' does not have unique object representations" "" { target *-*-* } S } static_assert(Aggregate<S>); // { dg-error "assert" } static_assert(TriviallyCopyable<S>); // { dg-error "assert" } diff --git a/gcc/testsuite/g++.dg/cpp2a/concepts-traits4.C b/gcc/testsuite/g++.dg/cpp2a/concepts-traits4.C new file mode 100644 index 0000000..caad816 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/concepts-traits4.C @@ -0,0 +1,77 @@ +// PR c++/117294 +// { dg-do compile { target c++20 } } +// { dg-additional-options "-fconcepts-diagnostics-depth=2" } + +template <typename T> struct norm + { static constexpr bool value = __is_constructible(T); }; +template <typename T> constexpr bool norm_v = __is_constructible(T); + +template <typename T> struct part + { static constexpr bool value = __is_constructible(T); }; +template <typename T> struct part<T*> + { static constexpr bool value = false; }; +template <typename T> struct part<const T> + { static constexpr bool value = __is_same(T, void); }; +template <typename T> constexpr bool part_v = __is_constructible(T); +template <typename T> constexpr bool part_v<T*> = false; +template <typename T> constexpr bool part_v<const T> = __is_same(T, void); + +template <typename T> struct expl + { static constexpr bool value = __is_constructible(T); }; +template <> struct expl<int*> + { static constexpr bool value = false; }; +template <> struct expl<const int> + { static constexpr bool value = __is_same(int, void); }; +template <typename T> constexpr bool expl_v = __is_constructible(T); +template <> constexpr bool expl_v<int*> = false; +template <> constexpr bool expl_v<const int> = __is_same(int, void); + +template <typename T> concept test_norm = norm<T>::value; // { dg-line norm } +template <typename T> concept test_part = part<T>::value; // { dg-line part } +template <typename T> concept test_expl = expl<T>::value; // { dg-line expl } +template <typename T> concept test_norm_v = norm_v<T>; // { dg-line norm_v } +template <typename T> concept test_part_v = part_v<T>; // { dg-line part_v } +template <typename T> concept test_expl_v = expl_v<T>; // { dg-line expl_v } + +static_assert(test_norm<void>); // { dg-error "assert" } +static_assert(test_part<void>); // { dg-error "assert" } +static_assert(test_expl<void>); // { dg-error "assert" } +static_assert(test_norm_v<void>); // { dg-error "assert" } +static_assert(test_part_v<void>); // { dg-error "assert" } +static_assert(test_expl_v<void>); // { dg-error "assert" } +// { dg-message "'void' is not default constructible" "" { target *-*-* } norm } +// { dg-message "'void' is not default constructible" "" { target *-*-* } part } +// { dg-message "'void' is not default constructible" "" { target *-*-* } expl } +// { dg-message "'void' is not default constructible" "" { target *-*-* } norm_v } +// { dg-message "'void' is not default constructible" "" { target *-*-* } part_v } +// { dg-message "'void' is not default constructible" "" { target *-*-* } expl_v } +// { dg-prune-output "'void' is incomplete" } + +static_assert(test_part<int*>); // { dg-error "assert" } +static_assert(test_expl<int*>); // { dg-error "assert" } +static_assert(test_part_v<int*>); // { dg-error "assert" } +static_assert(test_expl_v<int*>); // { dg-error "assert" } +// { dg-message ".with T = int\\*.. evaluated to .false." "" { target *-*-* } part } +// { dg-message ".with T = int\\*.. evaluated to .false." "" { target *-*-* } expl } +// { dg-message ".with T = int\\*.. evaluated to .false." "" { target *-*-* } part_v } +// { dg-message ".with T = int\\*.. evaluated to .false." "" { target *-*-* } expl_v } + +static_assert(test_part<const int>); // { dg-error "assert" } +static_assert(test_part_v<const int>); // { dg-error "assert" } +// { dg-message "'int' is not the same as 'void'" "" { target *-*-* } part } +// { dg-message "'int' is not the same as 'void'" "" { target *-*-* } part_v } + +struct S { S(int); }; +static_assert(requires { requires test_norm<S>; }); // { dg-error "assert" } +static_assert(requires { requires test_part<S>; }); // { dg-error "assert" } +static_assert(requires { requires test_expl<S>; }); // { dg-error "assert" } +static_assert(requires { requires test_norm_v<S>; }); // { dg-error "assert" } +static_assert(requires { requires test_part_v<S>; }); // { dg-error "assert" } +static_assert(requires { requires test_expl_v<S>; }); // { dg-error "assert" } +// { dg-message "'S' is not default constructible" "" { target *-*-* } norm } +// { dg-message "'S' is not default constructible" "" { target *-*-* } part } +// { dg-message "'S' is not default constructible" "" { target *-*-* } expl } +// { dg-message "'S' is not default constructible" "" { target *-*-* } norm_v } +// { dg-message "'S' is not default constructible" "" { target *-*-* } part_v } +// { dg-message "'S' is not default constructible" "" { target *-*-* } expl_v } +// { dg-prune-output "no matching function for call" } diff --git a/gcc/testsuite/g++.dg/cpp2a/consteval-memfn1.C b/gcc/testsuite/g++.dg/cpp2a/consteval-memfn1.C index ca92351..17a391b 100644 --- a/gcc/testsuite/g++.dg/cpp2a/consteval-memfn1.C +++ b/gcc/testsuite/g++.dg/cpp2a/consteval-memfn1.C @@ -4,13 +4,13 @@ struct fixed_string { consteval int size(int n) const { - if (n < 0) throw; // { dg-error "not a constant" } - return n; + if (n < 0) throw; // { dg-error "not a constant" "" { target c++23_down } } + return n; // { dg-error "'void __cxa_rethrow\\\(\\\)' called with no caught exceptions active" "" { target c++26 } .-1 } } static consteval int size_static(int n) { - if (n < 0) throw; // { dg-error "not a constant" } - return n; + if (n < 0) throw; // { dg-error "not a constant" "" { target c++23_down } } + return n; // { dg-error "'void __cxa_rethrow\\\(\\\)' called with no caught exceptions active" "" { target c++26 } .-1 } } consteval void operator()() const { } diff --git a/gcc/testsuite/g++.dg/cpp2a/consteval34.C b/gcc/testsuite/g++.dg/cpp2a/consteval34.C index 7562f40..73bcf77 100644 --- a/gcc/testsuite/g++.dg/cpp2a/consteval34.C +++ b/gcc/testsuite/g++.dg/cpp2a/consteval34.C @@ -1,42 +1,51 @@ // { dg-do compile { target c++20 } } // Explicit { dg-require-effective-target exceptions_enabled } to avoid verify compiler messages FAILs for '-fno-exceptions'. -consteval int bar (int i) { if (i != 1) throw 1; return 0; } // { dg-error "is not a constant expression" } +consteval int bar (int i) { if (i != 1) throw 1; return 0; } // { dg-error "is not a constant expression" "" { target c++23_down } } constexpr int foo (bool b) { - return b ? bar (3) : 2; // { dg-message "in .constexpr. expansion" } + return b ? bar (3) : 2; // { dg-message "in .constexpr. expansion" "" { target c++23_down } } // { dg-error "call to consteval function" "" { target *-*-* } .-1 } -} +} // { dg-error "uncaught exception '1'" "" { target c++26 } } static_assert (foo (false) == 2); -__extension__ constexpr int g1 = false ?: bar (2); // { dg-message "in .constexpr. expansion" } -__extension__ constexpr int g2 = false ?: (1 + bar (2)); // { dg-message "in .constexpr. expansion" } +__extension__ constexpr int g1 = false ?: bar (2); // { dg-message "in .constexpr. expansion" "" { target c++23_down } } +// { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } +__extension__ constexpr int g2 = false ?: (1 + bar (2)); // { dg-message "in .constexpr. expansion" "" { target c++23_down } } +// { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } __extension__ constexpr int g3 = true ?: bar (2); __extension__ constexpr int g4 = true ?: (1 + bar (2)); -constexpr int g5 = bar (2) ? 1 : 2; // { dg-message "in .constexpr. expansion" } -constexpr int g6 = bar (2) - 1 ? 1 : 2; // { dg-message "in .constexpr. expansion" } +constexpr int g5 = bar (2) ? 1 : 2; // { dg-message "in .constexpr. expansion" "" { target c++23_down } } +// { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } +constexpr int g6 = bar (2) - 1 ? 1 : 2; // { dg-message "in .constexpr. expansion" "" { target c++23_down } } +// { dg-error "uncaught exception '1'" "" { target c++26 } .-1 } void g () { - __extension__ int a1[bar(3)]; // { dg-message "in .constexpr. expansion" } + __extension__ int a1[bar(3)]; // { dg-message "in .constexpr. expansion" "" { target c++23_down } } // { dg-error "call to consteval function" "" { target *-*-* } .-1 } int a2[sizeof (bar(3))]; - int a3 = false ? (1 + bar (8)) : 1; // { dg-message "in .constexpr. expansion" } + int a3 = false ? (1 + bar (8)) : 1; // { dg-message "in .constexpr. expansion" "" { target c++23_down } } // { dg-error "call to consteval function" "" { target *-*-* } .-1 } - a3 += false ? (1 + bar (8)) : 1; // { dg-message "in .constexpr. expansion" } +// { dg-error "uncaught exception '1'" "" { target c++26 } .-2 } + a3 += false ? (1 + bar (8)) : 1; // { dg-message "in .constexpr. expansion" "" { target c++23_down } } // { dg-error "call to consteval function" "" { target *-*-* } .-1 } - __extension__ int a4 = false ?: (1 + bar (8)); // { dg-message "in .constexpr. expansion" } + __extension__ int a4 = false ?: (1 + bar (8)); // { dg-message "in .constexpr. expansion" "" { target c++23_down } } // { dg-error "call to consteval function" "" { target *-*-* } .-1 } - __extension__ int a5 = true ?: (1 + bar (8)); // { dg-message "in .constexpr. expansion" } +// { dg-error "uncaught exception '1'" "" { target c++26 } .-2 } + __extension__ int a5 = true ?: (1 + bar (8)); // { dg-message "in .constexpr. expansion" "" { target c++23_down } } // { dg-error "call to consteval function" "" { target *-*-* } .-1 } - int a6 = bar (2) ? 1 : 2; // { dg-message "in .constexpr. expansion" } +// { dg-error "uncaught exception '1'" "" { target c++26 } .-2 } + int a6 = bar (2) ? 1 : 2; // { dg-message "in .constexpr. expansion" "" { target c++23_down } } // { dg-error "call to consteval function" "" { target *-*-* } .-1 } - int a7 = bar (2) - 1 ? 1 : 2; // { dg-message "in .constexpr. expansion" } +// { dg-error "uncaught exception '1'" "" { target c++26 } .-2 } + int a7 = bar (2) - 1 ? 1 : 2; // { dg-message "in .constexpr. expansion" "" { target c++23_down } } // { dg-error "call to consteval function" "" { target *-*-* } .-1 } -} +// { dg-error "uncaught exception '1'" "" { target c++26 } .-2 } +} // { dg-error "uncaught exception '1'" "" { target c++26 } } diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic11.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic11.C index 9ee93c3..12a071a 100644 --- a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic11.C +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic11.C @@ -8,6 +8,22 @@ // a pointer to or object of the constructor or destructor's own class or one // of its bases, the dynamic_cast results in undefined behavior. +#if __cpp_constexpr_exceptions >= 202411L +namespace std { + struct exception { + constexpr exception () noexcept {} + constexpr virtual ~exception () noexcept {} + constexpr exception (const exception &) = default; + constexpr exception &operator= (const exception &) = default; + constexpr virtual const char *what () const noexcept { return "std::exception"; } + }; + struct bad_cast : public exception { + constexpr virtual ~bad_cast () noexcept {} + constexpr virtual const char *what () const noexcept { return "std::bad_cast"; } + }; +} +#endif + struct V { virtual void f(); }; @@ -19,7 +35,7 @@ struct B : V { }; struct D : A, B { - constexpr D() : B((A*)this, this) { } // { dg-message "in 'constexpr' expansion of" } + constexpr D() : B((A*)this, this) { } // { dg-message "in 'constexpr' expansion of" "" { target c++23_down } } }; constexpr B::B(V* v, A* a) @@ -29,8 +45,9 @@ constexpr B::B(V* v, A* a) if (b != nullptr) __builtin_abort (); - B& br = dynamic_cast<B&>(*v); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "dynamic type .A. of its operand does not have an unambiguous public base class .B." "" { target *-*-* } .-1 } + B& br = dynamic_cast<B&>(*v); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "dynamic type .A. of its operand does not have an unambiguous public base class .B." "" { target c++23_down } .-1 } } -constexpr D d; // { dg-message "in 'constexpr' expansion of" } +constexpr D d; // { dg-message "in 'constexpr' expansion of" "" { target c++23_down } } +// { dg-error "uncaught exception" "" { target c++26 } .-1 } diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic14.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic14.C index cc1cada..f966db4 100644 --- a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic14.C +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic14.C @@ -4,6 +4,22 @@ // Adopted from g++.old-deja/g++.other/dyncast1.C. // But use reference dynamic_cast. +#if __cpp_constexpr_exceptions >= 202411L +namespace std { + struct exception { + constexpr exception () noexcept {} + constexpr virtual ~exception () noexcept {} + constexpr exception (const exception &) = default; + constexpr exception &operator= (const exception &) = default; + constexpr virtual const char *what () const noexcept { return "std::exception"; } + }; + struct bad_cast : public exception { + constexpr virtual ~bad_cast () noexcept {} + constexpr virtual const char *what () const noexcept { return "std::bad_cast"; } + }; +} +#endif + // 1. downcast // 1.1. single inheritance case @@ -21,27 +37,35 @@ class CCC : protected B {}; class DDD : protected CCC {}; constexpr D d; -constexpr bool b01 = (dynamic_cast<D&> ((A&)d), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const A. of its operand is a non-public base class of dynamic type .D." "" { target *-*-* } .-1 } -constexpr bool b02 = (dynamic_cast<D&> ((B&)d), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .D." "" { target *-*-* } .-1 } +constexpr bool b01 = (dynamic_cast<D&> ((A&)d), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const A. of its operand is a non-public base class of dynamic type .D." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } +constexpr bool b02 = (dynamic_cast<D&> ((B&)d), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .D." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } static_assert (&d == &dynamic_cast<const D&> ((C&)d)); -constexpr bool b03 = (dynamic_cast<C&> ((B&)d), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .D." "" { target *-*-* } .-1 } +constexpr bool b03 = (dynamic_cast<C&> ((B&)d), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .D." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } constexpr DD dd; -constexpr bool b04 = (dynamic_cast<DD&> ((A&)dd), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const A. of its operand is a non-public base class of dynamic type .DD." "" { target *-*-* } .-1 } -constexpr bool b05 = (dynamic_cast<DD&> ((B&)dd), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .DD." "" { target *-*-* } .-1 } +constexpr bool b04 = (dynamic_cast<DD&> ((A&)dd), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const A. of its operand is a non-public base class of dynamic type .DD." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } +constexpr bool b05 = (dynamic_cast<DD&> ((B&)dd), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .DD." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } constexpr DDD ddd; -constexpr bool b06 = (dynamic_cast<DDD&> ((A&)ddd), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const A. of its operand is a non-public base class of dynamic type .DDD." "" { target *-*-* } .-1 } -constexpr bool b07 = (dynamic_cast<DDD&> ((B&)ddd), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .DDD." "" { target *-*-* } .-1 } -constexpr bool b08 = (dynamic_cast<CCC&> ((B&)ddd), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .DDD." "" { target *-*-* } .-1 } +constexpr bool b06 = (dynamic_cast<DDD&> ((A&)ddd), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const A. of its operand is a non-public base class of dynamic type .DDD." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } +constexpr bool b07 = (dynamic_cast<DDD&> ((B&)ddd), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .DDD." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } +constexpr bool b08 = (dynamic_cast<CCC&> ((B&)ddd), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .DDD." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } // 1.2. multiple inheritance case // 1.2.1. all bases are public @@ -50,19 +74,23 @@ struct E : D, CC {}; struct EE : CC, D {}; //Will search in reverse order. constexpr E e; -constexpr bool b09 = (dynamic_cast<E&> ((A&)(D&)e), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .A. of its operand is a non-public base class of dynamic type .E." "" { target *-*-* } .-1 } -constexpr bool b10 = (dynamic_cast<E&> ((B&)(D&)e), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .B. of its operand is a non-public base class of dynamic type .E." "" { target *-*-* } .-1 } +constexpr bool b09 = (dynamic_cast<E&> ((A&)(D&)e), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .A. of its operand is a non-public base class of dynamic type .E." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } +constexpr bool b10 = (dynamic_cast<E&> ((B&)(D&)e), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .B. of its operand is a non-public base class of dynamic type .E." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } static_assert (&e == &dynamic_cast<E&> ((C&)(D&)e)); static_assert (&e == &dynamic_cast<E&> ((B&)(CC&)e)); static_assert (&(CC&)e == &dynamic_cast<CC&> ((B&)(CC&)e)); constexpr EE ee; -constexpr bool b11 = (dynamic_cast<EE&> ((A&)(D&)ee), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .A. of its operand is a non-public base class of dynamic type .EE." "" { target *-*-* } .-1 } -constexpr bool b12 = (dynamic_cast<EE&> ((B&)(D&)ee), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .B. of its operand is a non-public base class of dynamic type .EE." "" { target *-*-* } .-1 } +constexpr bool b11 = (dynamic_cast<EE&> ((A&)(D&)ee), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .A. of its operand is a non-public base class of dynamic type .EE." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } +constexpr bool b12 = (dynamic_cast<EE&> ((B&)(D&)ee), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .B. of its operand is a non-public base class of dynamic type .EE." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } static_assert (&ee == &dynamic_cast<EE&> ((C&)(D&)ee)); static_assert (&ee == &dynamic_cast<EE&> ((B&)(CC&)ee)); static_assert (&(CC&)ee == &dynamic_cast<CC&> ((B&)(CC&)ee)); @@ -78,14 +106,17 @@ constexpr X x; static_assert (&x == &dynamic_cast<X&>((B&)(CC&)(E&)x)); constexpr XX xx; -constexpr bool b13 = (dynamic_cast<XX&>((B&)(CC&)(E&)xx), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .B. of its operand is a non-public base class of dynamic type .XX." "" { target *-*-* } .-1 } +constexpr bool b13 = (dynamic_cast<XX&>((B&)(CC&)(E&)xx), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .B. of its operand is a non-public base class of dynamic type .XX." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } constexpr Y y; -constexpr bool b14 = (dynamic_cast<Y&>((B&)y), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .Y." "" { target *-*-* } .-1 } -constexpr bool b15 = (dynamic_cast<Y&>((A&)(B&)y), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .A. of its operand is a non-public base class of dynamic type .Y." "" { target *-*-* } .-1 } +constexpr bool b14 = (dynamic_cast<Y&>((B&)y), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const B. of its operand is a non-public base class of dynamic type .Y." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } +constexpr bool b15 = (dynamic_cast<Y&>((A&)(B&)y), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .A. of its operand is a non-public base class of dynamic type .Y." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } // 2. crosscast @@ -93,13 +124,16 @@ struct J { virtual void j(); }; struct K : CC, private J {}; class KK : J, CC{}; -constexpr bool b16 = (dynamic_cast<CC&> ((B&)(D&)e), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .B. of its operand is a non-public base class of dynamic type .CC." "" { target *-*-* } .-1 } +constexpr bool b16 = (dynamic_cast<CC&> ((B&)(D&)e), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .B. of its operand is a non-public base class of dynamic type .CC." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } static_assert (&(CC&)e == &dynamic_cast<CC&> ((C&)(D&)e)); constexpr K k; -constexpr bool b17 = (dynamic_cast<J&> ((B&)k), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "dynamic type .K. of its operand does not have an unambiguous public base class .J." "" { target *-*-* } .-1 } +constexpr bool b17 = (dynamic_cast<J&> ((B&)k), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "dynamic type .K. of its operand does not have an unambiguous public base class .J." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } constexpr KK kk; -constexpr bool b18 = (dynamic_cast<J&> ((CC&)kk), true); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const CC. of its operand is a non-public base class of dynamic type .KK." "" { target *-*-* } .-1 } +constexpr bool b18 = (dynamic_cast<J&> ((CC&)kk), true); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const CC. of its operand is a non-public base class of dynamic type .KK." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic18.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic18.C index 25d98c2..112ff8a 100644 --- a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic18.C +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic18.C @@ -2,6 +2,22 @@ // { dg-do compile { target c++20 } } // Here 'b' doesn't point/refer to a public base of Derived. +#if __cpp_constexpr_exceptions >= 202411L +namespace std { + struct exception { + constexpr exception () noexcept {} + constexpr virtual ~exception () noexcept {} + constexpr exception (const exception &) = default; + constexpr exception &operator= (const exception &) = default; + constexpr virtual const char *what () const noexcept { return "std::exception"; } + }; + struct bad_cast : public exception { + constexpr virtual ~bad_cast () noexcept {} + constexpr virtual const char *what () const noexcept { return "std::bad_cast"; } + }; +} +#endif + struct Base { constexpr virtual ~Base(){} }; @@ -11,12 +27,12 @@ struct Derived: Base { }; constexpr const Derived& cast(const Base& b) { - return dynamic_cast<const Derived&>(b); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "dynamic type .const Base. of its operand does not have a base class of type .Derived." "" { target *-*-* } .-1 } + return dynamic_cast<const Derived&>(b); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "dynamic type .const Base. of its operand does not have a base class of type .Derived." "" { target c++23_down } .-1 } } auto test() { static constexpr Base b; - constexpr auto res = cast(b); + constexpr auto res = cast(b); // { dg-error "uncaught exception" "" { target c++26 } } return res; } diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic4.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic4.C index da647bf..a237134 100644 --- a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic4.C +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic4.C @@ -4,6 +4,22 @@ // From clang's constant-expression-cxx2a.cpp. +#if __cpp_constexpr_exceptions >= 202411L +namespace std { + struct exception { + constexpr exception () noexcept {} + constexpr virtual ~exception () noexcept {} + constexpr exception (const exception &) = default; + constexpr exception &operator= (const exception &) = default; + constexpr virtual const char *what () const noexcept { return "std::exception"; } + }; + struct bad_cast : public exception { + constexpr virtual ~bad_cast () noexcept {} + constexpr virtual const char *what () const noexcept { return "std::bad_cast"; } + }; +} +#endif + struct A2 { virtual void a2(); }; struct A : A2 { virtual void a(); }; struct B : A {}; @@ -26,31 +42,36 @@ static_assert(dynamic_cast<const A*>(static_cast<const C2*>(&g)) == nullptr); static_assert(g.f == (void*)(F*)&g); static_assert(dynamic_cast<const void*>(static_cast<const D*>(&g)) == &g); -constexpr int d_a = (dynamic_cast<const A&>(static_cast<const D&>(g)), 0); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message ".A. is an ambiguous base class of dynamic type .G." "" { target *-*-* } .-1 } - +constexpr int d_a = (dynamic_cast<const A&>(static_cast<const D&>(g)), 0); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message ".A. is an ambiguous base class of dynamic type .G." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } // Can navigate from A2 to its A... static_assert(&dynamic_cast<A&>((A2&)(B&)g) == &(A&)(B&)g); // ... and from B to its A ... static_assert(&dynamic_cast<A&>((B&)g) == &(A&)(B&)g); // ... but not from D. -static_assert(&dynamic_cast<A&>((D&)g) == &(A&)(B&)g); // { dg-error "non-constant condition for static assertion|reference .dynamic_cast. failed" } -// { dg-message ".A. is an ambiguous base class of dynamic type .G." "" { target *-*-* } .-1 } - +static_assert(&dynamic_cast<A&>((D&)g) == &(A&)(B&)g); // { dg-error "non-constant condition for static assertion" } +// { dg-message ".A. is an ambiguous base class of dynamic type .G." "" { target c++23_down } .-1 } +// { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } .-2 } +// { dg-error "uncaught exception" "" { target c++26 } .-3 } // Can cast from A2 to sibling class D. static_assert(&dynamic_cast<D&>((A2&)(B&)g) == &(D&)g); // Cannot cast from private base E to derived class F. -constexpr int e_f = (dynamic_cast<F&>((E&)g), 0); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const E. of its operand is a non-public base class of dynamic type .G." "" { target *-*-* } .-1 } +constexpr int e_f = (dynamic_cast<F&>((E&)g), 0); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const E. of its operand is a non-public base class of dynamic type .G." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } // Cannot cast from B to private sibling E. -constexpr int b_e = (dynamic_cast<E&>((B&)g), 0); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "dynamic type .G. of its operand does not have an unambiguous public base class .E." "" { target *-*-* } .-1 } +constexpr int b_e = (dynamic_cast<E&>((B&)g), 0); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "dynamic type .G. of its operand does not have an unambiguous public base class .E." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } struct Unrelated { virtual void unrelated(); }; -constexpr int b_unrelated = (dynamic_cast<Unrelated&>((B&)g), 0); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "dynamic type .G. of its operand does not have an unambiguous public base class .Unrelated." "" { target *-*-* } .-1 } -constexpr int e_unrelated = (dynamic_cast<Unrelated&>((E&)g), 0); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const E. of its operand is a non-public base class of dynamic type .G." "" { target *-*-* } .-1 } +constexpr int b_unrelated = (dynamic_cast<Unrelated&>((B&)g), 0); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "dynamic type .G. of its operand does not have an unambiguous public base class .Unrelated." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } +constexpr int e_unrelated = (dynamic_cast<Unrelated&>((E&)g), 0); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const E. of its operand is a non-public base class of dynamic type .G." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic6.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic6.C index d67c307..4434a1a 100644 --- a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic6.C +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic6.C @@ -1,6 +1,22 @@ // PR c++/88337 - Implement P1327R1: Allow dynamic_cast/typeid in constexpr. // { dg-do compile { target c++20 } } +#if __cpp_constexpr_exceptions >= 202411L +namespace std { + struct exception { + constexpr exception () noexcept {} + constexpr virtual ~exception () noexcept {} + constexpr exception (const exception &) = default; + constexpr exception &operator= (const exception &) = default; + constexpr virtual const char *what () const noexcept { return "std::exception"; } + }; + struct bad_cast : public exception { + constexpr virtual ~bad_cast () noexcept {} + constexpr virtual const char *what () const noexcept { return "std::bad_cast"; } + }; +} +#endif + // Private base. struct P1 { virtual void p1(); }; @@ -12,14 +28,16 @@ struct A : B, C, private P2 { virtual void a(); }; constexpr A a; // P1 is a non-public base of A. -constexpr bool b1 = (dynamic_cast<B&>((P1&)a), false); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const P1. of its operand is a non-public base class of dynamic type .A." "" { target *-*-* } .-1 } +constexpr bool b1 = (dynamic_cast<B&>((P1&)a), false); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const P1. of its operand is a non-public base class of dynamic type .A." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } // Don't error here. static_assert (dynamic_cast<B*>((P1*)&a) == nullptr); -constexpr bool b2 = (dynamic_cast<C&>((P2&)a), false); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const P2. of its operand is a non-public base class of dynamic type .A." "" { target *-*-* } .-1 } +constexpr bool b2 = (dynamic_cast<C&>((P2&)a), false); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const P2. of its operand is a non-public base class of dynamic type .A." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } static_assert (dynamic_cast<C*>((P1*)&a) == nullptr); static_assert (dynamic_cast<C*>((P2*)&a) == nullptr); diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic7.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic7.C index bc3efd0..d504efd 100644 --- a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic7.C +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic7.C @@ -1,6 +1,22 @@ // PR c++/88337 - Implement P1327R1: Allow dynamic_cast/typeid in constexpr. // { dg-do compile { target c++20 } } +#if __cpp_constexpr_exceptions >= 202411L +namespace std { + struct exception { + constexpr exception () noexcept {} + constexpr virtual ~exception () noexcept {} + constexpr exception (const exception &) = default; + constexpr exception &operator= (const exception &) = default; + constexpr virtual const char *what () const noexcept { return "std::exception"; } + }; + struct bad_cast : public exception { + constexpr virtual ~bad_cast () noexcept {} + constexpr virtual const char *what () const noexcept { return "std::bad_cast"; } + }; +} +#endif + // Protected base. struct P1 { virtual void p1(); }; @@ -12,14 +28,16 @@ struct A : B, C, protected P2 { virtual void a(); }; constexpr A a; // P1 is a non-public base of A. -constexpr bool b1 = (dynamic_cast<B&>((P1&)a), false); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const P1. of its operand is a non-public base class of dynamic type .A." "" { target *-*-* } .-1 } +constexpr bool b1 = (dynamic_cast<B&>((P1&)a), false); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const P1. of its operand is a non-public base class of dynamic type .A." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } // Don't error here. static_assert (dynamic_cast<B*>((P1*)&a) == nullptr); -constexpr bool b2 = (dynamic_cast<C&>((P2&)a), false); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const P2. of its operand is a non-public base class of dynamic type .A." "" { target *-*-* } .-1 } +constexpr bool b2 = (dynamic_cast<C&>((P2&)a), false); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const P2. of its operand is a non-public base class of dynamic type .A." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } static_assert (dynamic_cast<C*>((P1*)&a) == nullptr); static_assert (dynamic_cast<C*>((P2*)&a) == nullptr); diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic8.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic8.C index 1958cae4..2fc8242 100644 --- a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic8.C +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic8.C @@ -1,6 +1,22 @@ // PR c++/88337 - Implement P1327R1: Allow dynamic_cast/typeid in constexpr. // { dg-do compile { target c++20 } } +#if __cpp_constexpr_exceptions >= 202411L +namespace std { + struct exception { + constexpr exception () noexcept {} + constexpr virtual ~exception () noexcept {} + constexpr exception (const exception &) = default; + constexpr exception &operator= (const exception &) = default; + constexpr virtual const char *what () const noexcept { return "std::exception"; } + }; + struct bad_cast : public exception { + constexpr virtual ~bad_cast () noexcept {} + constexpr virtual const char *what () const noexcept { return "std::bad_cast"; } + }; +} +#endif + // Unrelated type. struct B { virtual void b(); }; @@ -12,12 +28,15 @@ constexpr A a; struct U { virtual void u(); }; -constexpr bool b1 = (dynamic_cast<U&>((B&)a), 0); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "dynamic type .A. of its operand does not have an unambiguous public base class .U." "" { target *-*-* } .-1 } -constexpr bool b2 = (dynamic_cast<U&>((P1&)a), 0); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const P1. of its operand is a non-public base class of dynamic type .A." "" { target *-*-* } .-1 } -constexpr bool b3 = (dynamic_cast<U&>((P2&)a), 0); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message "static type .const P2. of its operand is a non-public base class of dynamic type .A." "" { target *-*-* } .-1 } +constexpr bool b1 = (dynamic_cast<U&>((B&)a), 0); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "dynamic type .A. of its operand does not have an unambiguous public base class .U." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } +constexpr bool b2 = (dynamic_cast<U&>((P1&)a), 0); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const P1. of its operand is a non-public base class of dynamic type .A." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } +constexpr bool b3 = (dynamic_cast<U&>((P2&)a), 0); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message "static type .const P2. of its operand is a non-public base class of dynamic type .A." "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } static_assert (dynamic_cast<U*>((B*)&a) == nullptr); static_assert (dynamic_cast<U*>((P1*)&a) == nullptr); diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic9.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic9.C index 7d42ffa..3a50dde 100644 --- a/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic9.C +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-dynamic9.C @@ -1,6 +1,22 @@ // PR c++/88337 - Implement P1327R1: Allow dynamic_cast/typeid in constexpr. // { dg-do compile { target c++20 } } +#if __cpp_constexpr_exceptions >= 202411L +namespace std { + struct exception { + constexpr exception () noexcept {} + constexpr virtual ~exception () noexcept {} + constexpr exception (const exception &) = default; + constexpr exception &operator= (const exception &) = default; + constexpr virtual const char *what () const noexcept { return "std::exception"; } + }; + struct bad_cast : public exception { + constexpr virtual ~bad_cast () noexcept {} + constexpr virtual const char *what () const noexcept { return "std::bad_cast"; } + }; +} +#endif + // Ambiguous base. struct A { virtual void a(); }; @@ -11,7 +27,8 @@ struct E : B, C, D { virtual void d(); }; constexpr E e; -constexpr bool b1 = (dynamic_cast<A&>((D&)e), false); // { dg-error "reference .dynamic_cast. failed" } -// { dg-message ".A. is an ambiguous base class of dynamic type .E. of its operand" "" { target *-*-* } .-1 } +constexpr bool b1 = (dynamic_cast<A&>((D&)e), false); // { dg-error "reference .dynamic_cast. failed" "" { target c++23_down } } +// { dg-message ".A. is an ambiguous base class of dynamic type .E. of its operand" "" { target c++23_down } .-1 } +// { dg-error "uncaught exception" "" { target c++26 } .-2 } static_assert (dynamic_cast<A*>((D*)&e) == nullptr); diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-new27.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-new27.C new file mode 100644 index 0000000..a26fc7e --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-new27.C @@ -0,0 +1,41 @@ +// { dg-do compile { target c++20 } } + +#if __cpp_constexpr_exceptions >= 202411L +namespace std { + struct exception { + constexpr exception () noexcept {} + constexpr virtual ~exception () noexcept {} + constexpr exception (const exception &) = default; + constexpr exception &operator= (const exception &) = default; + constexpr virtual const char *what () const noexcept { return "std::exception"; } + }; + struct bad_alloc : public exception { + constexpr virtual ~bad_alloc () noexcept {} + constexpr virtual const char *what () const noexcept { return "std::bad_alloc"; } + }; + struct bad_array_new_length : public bad_alloc { + constexpr virtual ~bad_array_new_length () noexcept {} + constexpr virtual const char *what () const noexcept { return "std::bad_array_new_length"; } + }; +} +#endif + +constexpr int +foo (__SIZE_TYPE__ x, int y, int z) +{ + char (*a)[2] = new char[x][2]; // { dg-error "call to non-'constexpr' function 'void __cxa_throw_bad_array_new_length\\\(\\\)'" "" { target c++23_down } } + delete[] a; // { dg-message "declared here" "" { target c++23_down } .-1 } + int *b = new int[y]; // { dg-error "call to non-'constexpr' function 'void __cxa_throw_bad_array_new_length\\\(\\\)'" "" { target c++23_down } } + delete[] b; + int *c = new int[z]{1, 2, 3}; // { dg-error "call to non-'constexpr' function 'void __cxa_throw_bad_array_new_length\\\(\\\)'" "" { target c++23_down } } + delete[] c; + return 0; +} + +constexpr int a = foo (16, 2, 3); +constexpr int b = foo (-64, 2, 3); // { dg-message "in 'constexpr' expansion of" "" { target c++23_down } } + // { dg-error "uncaught exception" "" { target c++26 } .-1 } +constexpr int c = foo (16, -1, 3); // { dg-message "in 'constexpr' expansion of" "" { target c++23_down } } + // { dg-error "uncaught exception" "" { target c++26 } .-1 } +constexpr int d = foo (16, 2, 1); // { dg-message "in 'constexpr' expansion of" "" { target c++23_down } } + // { dg-error "uncaught exception" "" { target c++26 } .-1 } diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-typeid5.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-typeid5.C new file mode 100644 index 0000000..567383d --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-typeid5.C @@ -0,0 +1,20 @@ +// PR c++/88337 - Implement P1327R1: Allow dynamic_cast/typeid in constexpr. +// { dg-do compile { target c++17 } } + +#include <typeinfo> + +template <class T> +constexpr bool foo () +{ + bool r = false; + const std::type_info &s = typeid( (r = true), *(T *) 0); // { dg-error "call to non-'constexpr' function 'void __cxa_bad_typeid\\\(\\\)'" "" { target c++23_down } } + return r; // { dg-message "declared here" "" { target c++23_down } .-1 } +} + +struct A {}; +struct B { virtual ~B () {} }; + +static_assert (!foo <int> ()); +static_assert (!foo <A> ()); +constexpr bool a = foo <B> (); // { dg-message "in 'constexpr' expansion of" "" { target c++23_down } } +// { dg-error "uncaught exception" "" { target c++26 } .-1 } diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-union6.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-union6.C index 00bda53..ab8c979 100644 --- a/gcc/testsuite/g++.dg/cpp2a/constexpr-union6.C +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-union6.C @@ -45,9 +45,9 @@ constexpr int test5() { union { int data[1]; } u; - std::construct_at(u.data, 0); // { dg-message "in .constexpr. expansion" } + std::construct_at(u.data, 0); // { dg-bogus "in .constexpr. expansion" } return 0; } -constexpr int x5 = test5(); // { dg-message "in .constexpr. expansion" } +constexpr int x5 = test5(); // { dg-bogus "in .constexpr. expansion" } // { dg-error "accessing (uninitialized member|.* member instead of)" "" { target *-*-* } 0 } diff --git a/gcc/testsuite/g++.dg/cpp2a/constexpr-union9.C b/gcc/testsuite/g++.dg/cpp2a/constexpr-union9.C new file mode 100644 index 0000000..7db1030 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/constexpr-union9.C @@ -0,0 +1,33 @@ +// PR c++/120577 +// { dg-do compile { target c++20 } } + +template <class _Tp> struct optional { + union { + _Tp __val_; + }; + template <class... _Args> + constexpr optional(_Args... __args) + : __val_(__args...) {} +}; +template <class _Tp, class... _Args> +constexpr optional<_Tp> make_optional(_Args... __args) { + return optional<_Tp>(__args...); +} + +struct __non_trivial_if { + constexpr __non_trivial_if() {} +}; +struct allocator : __non_trivial_if {}; +struct __padding {}; +struct __short { + [[__no_unique_address__]] __padding __padding_; + int __data_; +}; +struct basic_string { + union { + __short __s; + }; + [[__no_unique_address__]] allocator __alloc_; + constexpr basic_string(int, int) {} +}; +auto opt = make_optional<basic_string>(4, 'X'); diff --git a/gcc/testsuite/g++.dg/diagnostic/static_assert5.C b/gcc/testsuite/g++.dg/diagnostic/static_assert5.C new file mode 100644 index 0000000..16681b2 --- /dev/null +++ b/gcc/testsuite/g++.dg/diagnostic/static_assert5.C @@ -0,0 +1,70 @@ +// PR c++/117294 +// { dg-do compile { target c++14 } } + +template <typename T> struct norm + { static constexpr bool value = __is_constructible(T); }; +template <typename T> constexpr bool norm_v = __is_constructible(T); + +template <typename T> struct part + { static constexpr bool value = __is_constructible(T); }; +template <typename T> struct part<T*> + { static constexpr bool value = false; }; +template <typename T> struct part<const T> + { static constexpr bool value = __is_same(T, void); }; +template <typename T> constexpr bool part_v = __is_constructible(T); +template <typename T> constexpr bool part_v<T*> = false; +template <typename T> constexpr bool part_v<const T> = __is_same(T, void); + +template <typename T> struct expl + { static constexpr bool value = __is_constructible(T); }; +template <> struct expl<int*> + { static constexpr bool value = false; }; +template <> struct expl<const int> + { static constexpr bool value = __is_same(int, void); }; +template <typename T> constexpr bool expl_v = __is_constructible(T); +template <> constexpr bool expl_v<int*> = false; +template <> constexpr bool expl_v<const int> = __is_same(int, void); + +// === Primary template can give customised diagnostics when using traits +static_assert(norm<void>::value); // { dg-error "assert" } +// { dg-message "'void' is not default constructible" "" { target *-*-* } .-1 } +static_assert(part<void>::value); // { dg-error "assert" } +// { dg-message "'void' is not default constructible" "" { target *-*-* } .-1 } +static_assert(expl<void>::value); // { dg-error "assert" } +// { dg-message "'void' is not default constructible" "" { target *-*-* } .-1 } +static_assert(norm_v<void>); // { dg-error "assert" } +// { dg-message "'void' is not default constructible" "" { target *-*-* } .-1 } +static_assert(part_v<void>); // { dg-error "assert" } +// { dg-message "'void' is not default constructible" "" { target *-*-* } .-1 } +static_assert(expl_v<void>); // { dg-error "assert" } +// { dg-message "'void' is not default constructible" "" { target *-*-* } .-1 } + +// { dg-prune-output "'void' is incomplete" } + + +// === Specialisations don't customise just because primary template had trait +static_assert(part<int*>::value); // { dg-error "assert" } +// { dg-bogus "default constructible" "" { target *-*-* } .-1 } +static_assert(expl<int*>::value); // { dg-error "assert" } +// { dg-bogus "default constructible" "" { target *-*-* } .-1 } +static_assert(part_v<int*>); // { dg-error "assert" } +// { dg-bogus "default constructible" "" { target *-*-* } .-1 } +static_assert(expl_v<int*>); // { dg-error "assert" } +// { dg-bogus "default constructible" "" { target *-*-* } .-1 } + + +// === But partial specialisations actually using a trait can customise +static_assert(part<const int>::value); // { dg-error "assert" } +// { dg-message "'int' is not the same as 'void'" "" { target *-*-* } .-1 } +static_assert(part_v<const int>); // { dg-error "assert" } +// { dg-message "'int' is not the same as 'void'" "" { target *-*-* } .-1 } + + +// === For these cases, we no longer know that the error was caused by the trait +// === because it's been folded away before we process the failure. +static_assert(expl<const int>::value); // { dg-error "assert" } +// { dg-bogus "because" "" { target *-*-* } .-1 } +static_assert(expl_v<const int>); // { dg-error "assert" } +// { dg-bogus "because" "" { target *-*-* } .-1 } +static_assert(__is_constructible(void)); // { dg-error "assert" } +// { dg-bogus "because" "" { target *-*-* } .-1 } diff --git a/gcc/testsuite/g++.dg/ext/has_virtual_destructor2.C b/gcc/testsuite/g++.dg/ext/has_virtual_destructor2.C new file mode 100644 index 0000000..14eea80 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/has_virtual_destructor2.C @@ -0,0 +1,27 @@ +// { dg-do compile { target c++11 } } + +template <typename T> struct has_virtual_destructor { + static constexpr bool value = __has_virtual_destructor(T); +}; + +static_assert(has_virtual_destructor<int>::value, ""); // { dg-error "assert" } +// { dg-message "'int' does not have a virtual destructor" "" { target *-*-* } .-1 } + +struct A {}; // { dg-message "'A' does not have a virtual destructor" } +static_assert(has_virtual_destructor<A>::value, ""); // { dg-error "assert" } + +struct B { + ~B(); // { dg-message "'B' does not have a virtual destructor" } +}; +static_assert(has_virtual_destructor<B>::value, ""); // { dg-error "assert" } + +struct C { // { dg-bogus "" } + virtual ~C(); // { dg-bogus "" } +}; +static_assert(has_virtual_destructor<C[5]>::value, ""); // { dg-error "assert" } +// { dg-message "'C \\\[5\\\]' does not have a virtual destructor" "" { target *-*-* } .-1 } + +union U { // { dg-message "'U' does not have a virtual destructor" } + ~U(); +}; +static_assert(has_virtual_destructor<U>::value, ""); // { dg-error "assert" } diff --git a/gcc/testsuite/g++.dg/ext/is_assignable2.C b/gcc/testsuite/g++.dg/ext/is_assignable2.C new file mode 100644 index 0000000..b346d7b --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_assignable2.C @@ -0,0 +1,36 @@ +// { dg-do compile { target c++11 } } + +template <typename T> +struct is_copy_assignable { + static constexpr bool value = __is_assignable(T&, const T&); +}; + +static_assert(is_copy_assignable<const int>::value, ""); // { dg-error "assert" } +// { dg-error "assignment to read-only type 'const int'" "" { target *-*-* } .-1 } + +struct A { + void operator=(A) = delete; // { dg-message "declared here" } +}; +static_assert(is_copy_assignable<A>::value, ""); // { dg-error "assert" } +// { dg-message "is not assignable" "" { target *-*-* } .-1 } +// { dg-error "use of deleted function" "" { target *-*-* } .-2 } + +template <typename T> +struct is_nothrow_copy_assignable { + static constexpr bool value = __is_nothrow_assignable(T&, const T&); +}; +struct B { + void operator=(const B&); // { dg-message "noexcept" } +}; +static_assert(is_nothrow_copy_assignable<B>::value, ""); // { dg-error "assert" } +// { dg-message "is not nothrow assignable" "" { target *-*-* } .-1 } + +template <typename T> +struct is_trivially_copy_assignable { + static constexpr bool value = __is_trivially_assignable(T&, const T&); +}; +struct C { + void operator=(const C&); // { dg-message "non-trivial" } +}; +static_assert(is_trivially_copy_assignable<C>::value, ""); // { dg-error "assert" } +// { dg-message "is not trivially assignable" "" { target *-*-* } .-1 } diff --git a/gcc/testsuite/g++.dg/ext/is_constructible9.C b/gcc/testsuite/g++.dg/ext/is_constructible9.C new file mode 100644 index 0000000..5448878 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_constructible9.C @@ -0,0 +1,60 @@ +// { dg-do compile { target c++11 } } + +template <typename T, typename... Args> +struct is_constructible { + static constexpr bool value = __is_constructible(T, Args...); +}; + +static_assert(is_constructible<void>::value, ""); // { dg-error "assert" } +// { dg-message "'void' is not default constructible, because" "" { target *-*-* } .-1 } +// { dg-error "'void' is incomplete" "" { target *-*-* } .-2 } + +static_assert(is_constructible<int&, const int&>::value, ""); // { dg-error "assert" } +// { dg-message "'int&' is not constructible from 'const int&', because" "" { target *-*-* } .-1 } +// { dg-error "discards qualifiers" "" { target *-*-* } .-2 } + +static_assert(is_constructible<int, int, int>::value, ""); // { dg-error "assert" } +// { dg-message "'int' is not constructible from 'int, int', because" "" { target *-*-* } .-1 } +// { dg-error "too many initializers for non-class type 'int'" "" { target *-*-* } .-2 } + +struct A { + A(int); // { dg-message "candidate" } +}; +static_assert(is_constructible<A, int, int>::value, ""); // { dg-error "assert" } +// { dg-message "'A' is not constructible from 'int, int', because" "" { target *-*-* } .-1 } +// { dg-error "no matching function for call to" "" { target *-*-* } .-2 } + +template <typename T, typename... Args> +struct is_nothrow_constructible { + static constexpr bool value = __is_nothrow_constructible(T, Args...); +}; + +struct B { + B(int); // { dg-message "candidate" } +}; +static_assert(is_nothrow_constructible<B>::value, ""); // { dg-error "assert" } +// { dg-message "'B' is not nothrow default constructible, because" "" { target *-*-* } .-1 } +// { dg-error "no matching function for call to" "" { target *-*-* } .-2 } + +struct C { + C(int); // { dg-message "noexcept" } +}; +static_assert(is_nothrow_constructible<C, int>::value, ""); // { dg-error "assert" } +// { dg-message "'C' is not nothrow constructible from 'int', because" "" { target *-*-* } .-1 } + +template <typename T, typename... Args> +struct is_trivially_constructible { + static constexpr bool value = __is_trivially_constructible(T, Args...); +}; + +struct D { + D(); // { dg-message "non-trivial" } +}; +static_assert(is_trivially_constructible<D>::value, ""); // { dg-error "assert" } +// { dg-message "'D' is not trivially default constructible, because" "" { target *-*-* } .-1 } + +struct E { + operator int(); // { dg-message "non-trivial" } +}; +static_assert(is_trivially_constructible<int, E>::value, ""); // { dg-error "assert" } +// { dg-message "'int' is not trivially constructible from 'E', because" "" { target *-*-* } .-1 } diff --git a/gcc/testsuite/g++.dg/ext/is_convertible7.C b/gcc/testsuite/g++.dg/ext/is_convertible7.C new file mode 100644 index 0000000..b38fc04 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_convertible7.C @@ -0,0 +1,29 @@ +// { dg-do compile { target c++11 } } + +template <typename T, typename U> +struct is_convertible { + static constexpr bool value = __is_convertible(T, U); +}; + +static_assert(is_convertible<int*, int>::value, ""); // { dg-error "assert" } +// { dg-error "invalid conversion" "" { target *-*-* } .-1 } + +static_assert(is_convertible<int(), double (*)()>::value, ""); // { dg-error "assert" } +// { dg-error "invalid conversion" "" { target *-*-* } .-1 } + +struct A { + explicit A(int); +}; +static_assert(is_convertible<int, A>::value, ""); // { dg-error "assert" } +// { dg-error "could not convert 'int' to 'A'" "" { target *-*-* } .-1 } + +template <typename T, typename U> +struct is_nothrow_convertible { + static constexpr bool value = __is_nothrow_convertible(T, U); +}; + +struct B { + B(int); // { dg-message "noexcept" } +}; +static_assert(is_nothrow_convertible<int, B>::value, ""); // { dg-error "assert" } +// { dg-message "'int' is not nothrow convertible from 'B', because" "" { target *-*-* } .-1 } diff --git a/gcc/testsuite/g++.dg/ext/is_destructible3.C b/gcc/testsuite/g++.dg/ext/is_destructible3.C new file mode 100644 index 0000000..a8501d6 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_destructible3.C @@ -0,0 +1,65 @@ +// { dg-do compile { target c++11 } } + +template <typename T> +struct is_destructible { + static constexpr bool value = __is_destructible(T); +}; + +static_assert(is_destructible<void>::value, ""); // { dg-error "assert" } +// { dg-message "'void' is not destructible, because" "" { target *-*-* } .-1 } +// { dg-error "'void' is incomplete" "" { target *-*-* } .-2 } + +struct A { + ~A() = delete; // { dg-message "declared here" } +}; +static_assert(is_destructible<A>::value, ""); // { dg-error "assert" } +// { dg-message "'A' is not destructible, because" "" { target *-*-* } .-1 } +// { dg-error "use of deleted function" "" { target *-*-* } .-2 } + +struct B { +private: + ~B(); // { dg-message "declared private here" } +}; +static_assert(is_destructible<B>::value, ""); // { dg-error "assert" } +// { dg-message "'B' is not destructible, because" "" { target *-*-* } .-1 } +// { dg-error "private within this context" "" { target *-*-* } .-2 } + +template <typename T> +struct is_nothrow_destructible { + static constexpr bool value = __is_nothrow_destructible(T); +}; + +struct C { + ~C() noexcept(false); // { dg-message "noexcept" } +}; +static_assert(is_nothrow_destructible<C>::value, ""); // { dg-error "assert" } +// { dg-message "'C' is not nothrow destructible, because" "" { target *-*-* } .-1 } + +struct D { +private: + ~D() {} // { dg-message "declared private here" } +}; +static_assert(is_nothrow_destructible<D>::value, ""); // { dg-error "assert" } +// { dg-message "'D' is not nothrow destructible, because" "" { target *-*-* } .-1 } +// { dg-error "private within this context" "" { target *-*-* } .-2 } + +template <typename T> +struct is_trivially_destructible { + static constexpr bool value = __is_trivially_destructible(T); +}; + +struct E { + ~E(); +}; +struct F { E d; }; // { dg-message "non-trivial" } +static_assert(is_trivially_destructible<F>::value, ""); // { dg-error "assert" } +// { dg-message "'F' is not trivially destructible, because" "" { target *-*-* } .-1 } + +struct G { +private: + ~G(); // { dg-message "declared private here" } +}; +struct H { G g; }; // { dg-error "private within this context" } +static_assert(is_trivially_destructible<H>::value, ""); // { dg-error "assert" } +// { dg-message "'H' is not trivially destructible, because" "" { target *-*-* } .-1 } +// { dg-error "use of deleted function" "" { target *-*-* } .-2 } diff --git a/gcc/testsuite/g++.dg/ext/is_invocable5.C b/gcc/testsuite/g++.dg/ext/is_invocable5.C new file mode 100644 index 0000000..460eed5 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_invocable5.C @@ -0,0 +1,15 @@ +// PR c++/121055 +// { dg-do compile { target c++11 } } +// { dg-skip-if "requires hosted libstdc++ for functional function" { ! hostedlib } } + +#include <functional> + +#define SA(X) static_assert((X),#X) + +struct F; + +SA( __is_invocable(void (F::*)() &, std::reference_wrapper<F>) ); +SA( ! __is_invocable(void (F::*)() &&, std::reference_wrapper<F>) ); + +SA( __is_invocable(void (F::*)(int) &, std::reference_wrapper<F>, int) ); +SA( ! __is_invocable(void (F::*)(int) &&, std::reference_wrapper<F>, int) ); diff --git a/gcc/testsuite/g++.dg/ext/is_invocable6.C b/gcc/testsuite/g++.dg/ext/is_invocable6.C new file mode 100644 index 0000000..64c5c76 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_invocable6.C @@ -0,0 +1,45 @@ +// { dg-do compile { target c++11 } } + +template <typename F, typename... Args> +struct is_invocable { + static constexpr bool value = __is_invocable(F, Args...); +}; + +static_assert(is_invocable<int>::value, ""); // { dg-error "assert" } +// { dg-message "'int' is not invocable, because" "" { target *-*-* } .-1 } +// { dg-error "'int' cannot be used as a function" "" { target *-*-* } .-2 } + +static_assert(is_invocable<void(*)(), int>::value, ""); // { dg-error "assert" } +// { dg-message "'void \[^'\]*' is not invocable by 'int', because" "" { target *-*-* } .-1 } +// { dg-error "too many arguments" "" { target *-*-* } .-2 } + +static_assert(is_invocable<void(void*), void() const>::value, ""); // { dg-error "assert" } +// { dg-message "'void.void..' is not invocable by 'void.. const', because" "" { target *-*-* } .-1 } +// { dg-error "qualified function type" "" { target *-*-* } .-2 } + +struct A {}; +static_assert(is_invocable<const A&&, int, double>::value, ""); // { dg-error "assert" } +// { dg-message "'const A&&' is not invocable by 'int, double', because" "" { target *-*-* } .-1 } +// { dg-error "no match for call to " "" { target *-*-* } .-2 } + +struct B { + void operator()() = delete; // { dg-message "declared here" } +}; +static_assert(is_invocable<B>::value, ""); // { dg-error "assert" } +// { dg-message "'B' is not invocable, because" "" { target *-*-* } .-1 } +// { dg-error "use of deleted function" "" { target *-*-* } .-2 } + +template <typename F, typename... Args> +struct is_nothrow_invocable { + static constexpr bool value = __is_nothrow_invocable(F, Args...); +}; + +static_assert(is_nothrow_invocable<void(*)()>::value, ""); // { dg-error "assert" } +// { dg-message "'void \[^'\]*' is not nothrow invocable, because" "" { target *-*-* } .-1 } +// { dg-message "'void \[^'\]*' is not 'noexcept'" "" { target *-*-* } .-2 } + +struct C { + int operator()(int, double) const; // { dg-message "noexcept" } +}; +static_assert(is_nothrow_invocable<const C&, int, int>::value, ""); // { dg-error "assert" } +// { dg-message "'const C&' is not nothrow invocable by 'int, int', because" "" { target *-*-* } .-1 } diff --git a/gcc/testsuite/g++.dg/ext/is_invocable7.C b/gcc/testsuite/g++.dg/ext/is_invocable7.C new file mode 100644 index 0000000..5c852fc --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_invocable7.C @@ -0,0 +1,21 @@ +// PR c++/121291 +// { dg-do compile { target c++17 } } + +template <typename T> +constexpr bool is_invocable = __is_invocable(T); + +template <typename T> +constexpr bool is_nothrow_invocable = __is_nothrow_invocable(T); + +struct S { +private: + int operator()() noexcept; // { dg-message "here" } +}; + +static_assert(is_invocable<S>); // { dg-error "assert" } +// { dg-message "not invocable" "" { target *-*-* } .-1 } +// { dg-error "private within this context" "" { target *-*-* } .-2 } + +static_assert(is_nothrow_invocable<S>); // { dg-error "assert" } +// { dg-message "not nothrow invocable" "" { target *-*-* } .-1 } +// { dg-error "private within this context" "" { target *-*-* } .-2 } diff --git a/gcc/testsuite/g++.dg/ext/is_nothrow_convertible5.C b/gcc/testsuite/g++.dg/ext/is_nothrow_convertible5.C new file mode 100644 index 0000000..0ce8fb8 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_nothrow_convertible5.C @@ -0,0 +1,15 @@ +// PR c++/121291 +// { dg-do compile { target c++17 } } + +template <typename T, typename U> +constexpr bool is_nothrow_convertible = __is_nothrow_convertible(T, U); + +struct A {}; +struct B { +private: + operator A() noexcept; // { dg-message "here" } +}; + +static_assert(is_nothrow_convertible<B, A>); // { dg-error "assert" } +// { dg-message "not nothrow convertible" "" { target *-*-* } .-1 } +// { dg-error "private within this context" "" { target *-*-* } .-2 } diff --git a/gcc/testsuite/g++.dg/ext/is_virtual_base_of_diagnostic2.C b/gcc/testsuite/g++.dg/ext/is_virtual_base_of_diagnostic2.C new file mode 100644 index 0000000..ac28121 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/is_virtual_base_of_diagnostic2.C @@ -0,0 +1,13 @@ +// { dg-do compile { target c++11 } } + +template <typename T, typename U> +struct is_virtual_base_of { + static constexpr bool value = __builtin_is_virtual_base_of(T, U); +}; + +static_assert(is_virtual_base_of<int, int>::value, ""); // { dg-error "assert" } +// { dg-message "'int' is not a virtual base of 'int'" "" { target *-*-* } .-1 } + +struct A {}; // { dg-message "'A' is not a virtual base of 'B'" } +struct B : A {}; // { dg-message "declared here" } +static_assert(is_virtual_base_of<A, B>::value, ""); // { dg-error "assert" } diff --git a/gcc/testsuite/g++.dg/lookup/operator-8.C b/gcc/testsuite/g++.dg/lookup/operator-8.C index 64d8a97..32d432d 100644 --- a/gcc/testsuite/g++.dg/lookup/operator-8.C +++ b/gcc/testsuite/g++.dg/lookup/operator-8.C @@ -16,11 +16,16 @@ struct A { template<class T> void f() { A a; - (void)(a != 0, 0 != a); // { dg-bogus "deleted" "" { xfail *-*-* } } - (void)(a < 0, 0 < a); // { dg-bogus "deleted" "" { xfail *-*-* } } - (void)(a <= 0, 0 <= a); // { dg-bogus "deleted" "" { xfail *-*-* } } - (void)(a > 0, 0 > a); // { dg-bogus "deleted" "" { xfail *-*-* } } - (void)(a >= 0, 0 >= a); // { dg-bogus "deleted" "" { xfail *-*-* } } + (void)(a != 0); + (void)(0 != a); + (void)(a < 0); + (void)(0 < a); + (void)(a <= 0); + (void)(0 <= a); + (void)(a > 0); + (void)(0 > a); + (void)(a >= 0); + (void)(0 >= a); } // These later-declared namespace-scope overloads shouldn't be considered @@ -31,4 +36,10 @@ bool operator<=(A, int) = delete; bool operator>(A, int) = delete; bool operator>=(A, int) = delete; +bool operator!=(int, A) = delete; +bool operator<(int, A) = delete; +bool operator<=(int, A) = delete; +bool operator>(int, A) = delete; +bool operator>=(int, A) = delete; + template void f<int>(); diff --git a/gcc/testsuite/g++.dg/lto/pr114790_0.C b/gcc/testsuite/g++.dg/lto/pr114790_0.C new file mode 100644 index 0000000..eed112d --- /dev/null +++ b/gcc/testsuite/g++.dg/lto/pr114790_0.C @@ -0,0 +1,16 @@ +// { dg-lto-do link } +// { dg-lto-options { { -w -flto -g -flto-partition=1to1 -O2 -shared -fPIC -fvisibility=hidden} } } +// { dg-require-effective-target fpic } +// { dg-require-effective-target shared } +struct APITracerContext { + virtual ~APITracerContext() = default; + virtual void releaseActivetracersList() = 0; +}; +struct APITracerContextImp : APITracerContext { + ~APITracerContextImp() override; + void releaseActivetracersList() override; +}; +struct APITracerContextImp globalAPITracerContextImp; +struct APITracerContextImp *pGlobalAPITracerContextImp = &globalAPITracerContextImp; +APITracerContextImp::~APITracerContextImp() {} + diff --git a/gcc/testsuite/g++.dg/lto/pr114790_1.C b/gcc/testsuite/g++.dg/lto/pr114790_1.C new file mode 100644 index 0000000..511fae4 --- /dev/null +++ b/gcc/testsuite/g++.dg/lto/pr114790_1.C @@ -0,0 +1,15 @@ +struct APITracerContext { + virtual void releaseActivetracersList() = 0; +}; +extern struct APITracerContextImp *pGlobalAPITracerContextImp; +struct APITracerContextImp : APITracerContext { void releaseActivetracersList();}; +int g(); +inline int +apiTracerWrapperImp( ) { + for (int i = 0; i < g(); i++) + pGlobalAPITracerContextImp->releaseActivetracersList(); +} +__attribute__((visibility("default"))) int +zeCommandListAppendMemoryCopyTracing() { + return apiTracerWrapperImp( ); +} diff --git a/gcc/testsuite/g++.dg/missing-return.C b/gcc/testsuite/g++.dg/missing-return.C index 5f8e2cc..f6934b0 100644 --- a/gcc/testsuite/g++.dg/missing-return.C +++ b/gcc/testsuite/g++.dg/missing-return.C @@ -5,4 +5,6 @@ int foo(int a) { } /* { dg-warning "no return statement" } */ -/* { dg-final { scan-tree-dump "__builtin_unreachable" "optimized" } } */ +/* For targets without traps, it will be an infinite loop */ +/* { dg-final { scan-tree-dump "__builtin_unreachable" "optimized" { target trap } } } */ +/* { dg-final { scan-tree-dump "goto <" "optimized" { target { ! trap } } } } */ diff --git a/gcc/testsuite/g++.dg/modules/class-11_a.H b/gcc/testsuite/g++.dg/modules/class-11_a.H new file mode 100644 index 0000000..799dbdd --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/class-11_a.H @@ -0,0 +1,36 @@ +// Check for some additional lang_type flags that we'd missed. +// { dg-additional-options "-fmodule-header -fabi-version=21 -Wabi=15" } +// { dg-module-cmi {} } + +#if __cpp_trivial_relocatability < 202502L +#define trivially_relocatable_if_eligible __trivially_relocatable_if_eligible +#define replaceable_if_eligible __replaceable_if_eligible +#endif + +struct A trivially_relocatable_if_eligible { A(A&&); }; +struct B replaceable_if_eligible { B(B&&); B& operator=(B&&); }; +struct C {}; +static_assert(__builtin_is_trivially_relocatable(C) && __builtin_is_replaceable(C), ""); + + +struct pr106381 { + long l; + char c = -1; +}; +struct L1 : pr106381 { + char x; // { dg-warning "offset" "" { target c++14 } } +}; +static_assert(sizeof(L1) == sizeof(pr106381), ""); + + +struct pr120012 { + pr120012(const pr120012&) = default; + pr120012(pr120012&&) = default; + pr120012& operator=(pr120012&&) = default; + unsigned int a; + unsigned char b; +}; +struct L2 : pr120012 { + unsigned char y; // { dg-warning "offset" "" { target c++20 } } +}; +static_assert(sizeof(L2) > sizeof(pr120012), ""); diff --git a/gcc/testsuite/g++.dg/modules/class-11_b.C b/gcc/testsuite/g++.dg/modules/class-11_b.C new file mode 100644 index 0000000..2450a45 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/class-11_b.C @@ -0,0 +1,15 @@ +// { dg-additional-options "-fmodules -fabi-version=21 -Wabi=15" } + +import "class-11_a.H"; + +static_assert(__builtin_is_trivially_relocatable(A), ""); +static_assert(__builtin_is_replaceable(B), ""); +static_assert(__builtin_is_trivially_relocatable(C) && __builtin_is_replaceable(C), ""); + +struct M1 : pr106381 { + char x; // { dg-warning "offset" "" { target c++14 } } +}; + +struct M2 : pr120012 { + unsigned char y; // { dg-warning "offset" "" { target c++20 } } +}; diff --git a/gcc/testsuite/g++.dg/modules/internal-14_a.C b/gcc/testsuite/g++.dg/modules/internal-14_a.C new file mode 100644 index 0000000..07eb965 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/internal-14_a.C @@ -0,0 +1,17 @@ +// PR c++/120412 +// { dg-additional-options "-fmodules -std=c++20 -Wtemplate-names-tu-local" } +// { dg-module-cmi m:part } + +export module m:part; + +export template <typename F> +auto fun1(F) { + return true; +} + +using Dodgy = decltype([]{}); + +export template <typename T> +auto fun2(T&&) { // { dg-warning "TU-local" } + return fun1(Dodgy{}); +} diff --git a/gcc/testsuite/g++.dg/modules/internal-14_b.C b/gcc/testsuite/g++.dg/modules/internal-14_b.C new file mode 100644 index 0000000..ad3b09d --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/internal-14_b.C @@ -0,0 +1,6 @@ +// PR c++/120412 +// { dg-additional-options "-fmodules -std=c++20 -Wtemplate-names-tu-local" } +// { dg-module-cmi m } + +export module m; +export import :part; diff --git a/gcc/testsuite/g++.dg/modules/internal-14_c.C b/gcc/testsuite/g++.dg/modules/internal-14_c.C new file mode 100644 index 0000000..4f8e785c --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/internal-14_c.C @@ -0,0 +1,9 @@ +// PR c++/120412 +// { dg-additional-options "-fmodules -std=c++20" } + +import m; + +int main() { + // { dg-error "instantiation exposes TU-local entity '(fun1|Dodgy)'" "" { target *-*-* } 0 } + fun2(123); // { dg-message "required from here" } +} diff --git a/gcc/testsuite/g++.dg/modules/merge-19.h b/gcc/testsuite/g++.dg/modules/merge-19.h new file mode 100644 index 0000000..c3faadc --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/merge-19.h @@ -0,0 +1,21 @@ +// PR c++/121238 + +inline void inc(const char*& __first) { + ++__first; +} + +template <typename = void> +bool parse_integer(const char *first) { + const char *start = first; + inc(first); + return first != start; +} +template bool parse_integer<void>(const char*); + + +struct S { ~S() {} int x; }; +template <typename = void> +bool take_by_invisiref(S s) { + return s.x == 5; +} +template bool take_by_invisiref<void>(S); diff --git a/gcc/testsuite/g++.dg/modules/merge-19_a.H b/gcc/testsuite/g++.dg/modules/merge-19_a.H new file mode 100644 index 0000000..149a447 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/merge-19_a.H @@ -0,0 +1,5 @@ +// PR c++/121238 +// { dg-additional-options "-fmodule-header" } +// { dg-module-cmi {} } + +#include "merge-19.h" diff --git a/gcc/testsuite/g++.dg/modules/merge-19_b.C b/gcc/testsuite/g++.dg/modules/merge-19_b.C new file mode 100644 index 0000000..345e7fe --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/merge-19_b.C @@ -0,0 +1,16 @@ +// PR c++/121238 +// { dg-module-do run } +// { dg-additional-options "-fmodules -fno-module-lazy" } + +#include "merge-19.h" +import "merge-19_a.H"; + +int main() { + const char fmt[] = "5"; + if (!parse_integer<void>(fmt)) + __builtin_abort(); + + S s{ 5 }; + if (!take_by_invisiref(s)) + __builtin_abort(); +} diff --git a/gcc/testsuite/g++.dg/modules/pr108080.H b/gcc/testsuite/g++.dg/modules/pr108080.H new file mode 100644 index 0000000..b05d957 --- /dev/null +++ b/gcc/testsuite/g++.dg/modules/pr108080.H @@ -0,0 +1,5 @@ +// PR c++/108080 +// { dg-additional-options "-fmodules" } +// Give a diagnostic message rather than a crash for unsupported features. + +[[gnu::optimize("-O3")]] void foo(); // { dg-warning "optimize" } diff --git a/gcc/testsuite/g++.dg/plugin/show-template-tree-color-labels.C b/gcc/testsuite/g++.dg/plugin/show-template-tree-color-labels.C index 3e93126..71ae8f2 100644 --- a/gcc/testsuite/g++.dg/plugin/show-template-tree-color-labels.C +++ b/gcc/testsuite/g++.dg/plugin/show-template-tree-color-labels.C @@ -1,4 +1,4 @@ -/* Verify colorization of the labels in diagnostic-show-locus.c +/* Verify colorization of the labels in diagnostics/source-printing.cc for template comparisons. Doing so requires a plugin; see the comments in the plugin for the rationale. */ diff --git a/gcc/testsuite/g++.dg/plugin/show_template_tree_color_plugin.cc b/gcc/testsuite/g++.dg/plugin/show_template_tree_color_plugin.cc index 6151b6e..5d185ff 100644 --- a/gcc/testsuite/g++.dg/plugin/show_template_tree_color_plugin.cc +++ b/gcc/testsuite/g++.dg/plugin/show_template_tree_color_plugin.cc @@ -21,7 +21,8 @@ int plugin_is_GPL_compatible; void -noop_text_starter_fn (diagnostic_text_output_format &, const diagnostic_info *) +noop_text_starter_fn (diagnostics::text_sink &, + const diagnostics::diagnostic_info *) { } @@ -32,7 +33,7 @@ plugin_init (struct plugin_name_args *plugin_info, if (!plugin_default_version_check (version, &gcc_version)) return 1; - diagnostic_text_starter (global_dc) = noop_text_starter_fn; + diagnostics::text_starter (global_dc) = noop_text_starter_fn; return 0; } diff --git a/gcc/testsuite/g++.dg/tc1/dr49.C b/gcc/testsuite/g++.dg/tc1/dr49.C index 753d96b..6ddea6b 100644 --- a/gcc/testsuite/g++.dg/tc1/dr49.C +++ b/gcc/testsuite/g++.dg/tc1/dr49.C @@ -10,8 +10,8 @@ template struct R<&p>; // OK template struct S<&p>; // OK due to parameter adjustment int *ptr; -template struct R<ptr>; // { dg-error "argument" } -template struct S<ptr>; // { dg-error "argument" } +template struct R<ptr>; // { dg-error "template argument|constant expression" } +template struct S<ptr>; // { dg-error "template argument|constant expression" } int v[5]; template struct R<v>; // OK due to implicit argument conversion diff --git a/gcc/testsuite/g++.dg/template/func2.C b/gcc/testsuite/g++.dg/template/func2.C index 0116f23..360f430 100644 --- a/gcc/testsuite/g++.dg/template/func2.C +++ b/gcc/testsuite/g++.dg/template/func2.C @@ -4,8 +4,7 @@ typedef void (*fptr)(); fptr zeroptr = 0; template<typename T, fptr F> struct foo { }; template<typename T> struct foo<T,zeroptr> { }; -// { dg-error "not a valid template argument" "not valid" { target *-*-* } .-1 } -// { dg-message "must be the address" "must be the address " { target *-*-* } .-2 } +// { dg-error "template argument|constant expression" "not valid" { target *-*-* } .-1 } // The rest is needed to trigger the ICE in 4.0 to 4.3: void f() { } diff --git a/gcc/testsuite/g++.dg/torture/pr120119-1.C b/gcc/testsuite/g++.dg/torture/pr120119-1.C new file mode 100644 index 0000000..1206feb --- /dev/null +++ b/gcc/testsuite/g++.dg/torture/pr120119-1.C @@ -0,0 +1,15 @@ +// { dg-do compile } +// { dg-additional-options "-mcpu=cortex-a57" { target aarch64*-*-* } } + +// PR target/120119 + +struct a { + float operator()(int b, int c) { return d[c * 4 + b]; } + float *d; +}; +float e(float *); +auto f(a b) { + float g[]{b(1, 1), b(2, 1), b(3, 1), b(1, 2), b(2, 2), b(3, 2), b(1, 3), + b(2, 3), b(3, 3), b(3, 2), b(1, 3), b(2, 3), b(3, 3)}; + return b.d[0] * e(g); +} diff --git a/gcc/testsuite/g++.dg/tree-prof/eh1.C b/gcc/testsuite/g++.dg/tree-prof/eh1.C new file mode 100644 index 0000000..10a3596 --- /dev/null +++ b/gcc/testsuite/g++.dg/tree-prof/eh1.C @@ -0,0 +1,34 @@ +/* { dg-options "-O3 -fdump-ipa-profile-details -fno-inline -fdump-tree-fixup_cfg3-details -fdump-tree-optimized-details" } */ +char a[10000]; +char b[10000]; +int sz = 1000; + +__attribute__((noipa)) + void test2 () +{ + throw (sz); +} +void +test () +{ + try + { + test2 (); + } + catch (int v) + { + __builtin_memcpy (b, a, v); + } +} +int +main () +{ + for (int i = 0; i < 100000; i++) + test (); +} +/* { dg-final-use-not-autofdo { scan-ipa-dump-times "Average value sum:100000000" 2 "profile" } } */ +/* 1 zero count for resx block. */ +/* { dg-final-use-not-autofdo { scan-tree-dump-times "count: 0" 1 "fixup_cfg3" } } */ +/* 2 zero count for resx block and return block since return gets duplicated by tracer. */ +/* { dg-final-use-not-autofdo { scan-tree-dump-times "count: 0" 2 "optimized" } } */ +/* { dg-final-use-not-autofdo { scan-tree-dump-times "Average value sum:100000000" 1 "optimized" } } */ diff --git a/gcc/testsuite/g++.dg/warn/Wformat-gcc_diag-1.C b/gcc/testsuite/g++.dg/warn/Wformat-gcc_diag-1.C index dd41b08..db85150 100644 --- a/gcc/testsuite/g++.dg/warn/Wformat-gcc_diag-1.C +++ b/gcc/testsuite/g++.dg/warn/Wformat-gcc_diag-1.C @@ -29,6 +29,8 @@ typedef struct diagnostic_event_id_t diagnostic_event_id_t; namespace pp_markup { class element; } typedef pp_markup::element pp_element; +typedef class string_slice string_slice; + #define FORMAT(kind) __attribute__ ((format (__gcc_## kind ##__, 1, 2))) void diag (const char*, ...) FORMAT (diag); @@ -63,7 +65,7 @@ void test_diag (tree t, gimple *gc, diagnostic_event_id_t *event_id_ptr, diag ("%e", 42); /* { dg-warning "format" } */ } -void test_cdiag (tree t, gimple *gc) +void test_cdiag (tree t, gimple *gc, string_slice *s) { cdiag ("%<"); /* { dg-warning "unterminated quoting directive" } */ cdiag ("%>"); /* { dg-warning "unmatched quoting directive " } */ @@ -74,6 +76,7 @@ void test_cdiag (tree t, gimple *gc) cdiag ("%F", t); /* { dg-warning ".F. conversion used unquoted" } */ cdiag ("%G", gc); /* { dg-warning "format" } */ cdiag ("%K", t); /* { dg-warning "format" } */ + cdiag ("%B", s); cdiag ("%R"); /* { dg-warning "unmatched color reset directive" } */ cdiag ("%r", ""); /* { dg-warning "unterminated color directive" } */ @@ -90,6 +93,7 @@ void test_cdiag (tree t, gimple *gc) cdiag ("%<%F%>", t); cdiag ("%<%G%>", gc); /* { dg-warning "format" } */ cdiag ("%<%K%>", t); /* { dg-warning "format" } */ + cdiag ("%<%B%>", s); cdiag ("%<%R%>"); /* { dg-warning "unmatched color reset directive" } */ cdiag ("%<%r%>", ""); /* { dg-warning "unterminated color directive" } */ @@ -101,9 +105,10 @@ void test_cdiag (tree t, gimple *gc) cdiag ("%<%qD%>", t); /* { dg-warning ".q. flag used within a quoted sequence" } */ cdiag ("%<%qE%>", t); /* { dg-warning ".q. flag used within a quoted sequence" } */ cdiag ("%<%qT%>", t); /* { dg-warning ".q. flag used within a quoted sequence" } */ + cdiag ("%<%qB%>", s); /* { dg-warning ".q. flag used within a quoted sequence" } */ } -void test_tdiag (tree t, gimple *gc) +void test_tdiag (tree t, gimple *gc, string_slice *s) { tdiag ("%<"); /* { dg-warning "unterminated quoting directive" } */ tdiag ("%>"); /* { dg-warning "unmatched quoting directive " } */ @@ -113,6 +118,7 @@ void test_tdiag (tree t, gimple *gc) tdiag ("%E", t); tdiag ("%G", gc); /* { dg-warning "format" } */ tdiag ("%K", t); /* { dg-warning "format" } */ + tdiag ("%B", s); tdiag ("%R"); /* { dg-warning "unmatched color reset directive" } */ tdiag ("%r", ""); /* { dg-warning "unterminated color directive" } */ @@ -138,9 +144,10 @@ void test_tdiag (tree t, gimple *gc) tdiag ("%<%qD%>", t); /* { dg-warning ".q. flag used within a quoted sequence" } */ tdiag ("%<%qE%>", t); /* { dg-warning ".q. flag used within a quoted sequence" } */ tdiag ("%<%qT%>", t); /* { dg-warning ".q. flag used within a quoted sequence" } */ + tdiag ("%<%qB%>", s); /* { dg-warning ".q. flag used within a quoted sequence" } */ } -void test_cxxdiag (tree t, gimple *gc) +void test_cxxdiag (tree t, gimple *gc, string_slice *s) { cxxdiag ("%A", t); /* { dg-warning ".A. conversion used unquoted" } */ cxxdiag ("%D", t); /* { dg-warning ".D. conversion used unquoted" } */ @@ -148,6 +155,7 @@ void test_cxxdiag (tree t, gimple *gc) cxxdiag ("%F", t); /* { dg-warning ".F. conversion used unquoted" } */ cxxdiag ("%G", gc); /* { dg-warning "format" } */ cxxdiag ("%K", t); /* { dg-warning "format" } */ + cxxdiag ("%B", s); cxxdiag ("%R"); /* { dg-warning "unmatched color reset directive" } */ cxxdiag ("%r", ""); /* { dg-warning "unterminated color directive" } */ @@ -172,9 +180,10 @@ void test_cxxdiag (tree t, gimple *gc) cxxdiag ("%<%T%>", t); cxxdiag ("%<%V%>", t); cxxdiag ("%<%X%>", t); + cxxdiag ("%<%B%>", s); } -void test_dump (tree t, gimple *stmt, cgraph_node *node) +void test_dump (tree t, gimple *stmt, cgraph_node *node, string_slice *s) { dump ("%<"); /* { dg-warning "unterminated quoting directive" } */ dump ("%>"); /* { dg-warning "unmatched quoting directive " } */ @@ -197,4 +206,5 @@ void test_dump (tree t, gimple *stmt, cgraph_node *node) dump ("%C", node); dump ("%f", 1.0); dump ("%4.2f", 1.0); /* { dg-warning "format" } */ + dump ("%B", s); } diff --git a/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-5.C b/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-5.C index bac2b68..a21e864 100644 --- a/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-5.C +++ b/gcc/testsuite/g++.dg/warn/Wmismatched-new-delete-5.C @@ -31,7 +31,7 @@ void warn_placement_new () void warn_placement_array_new () { - void *p = malloc (sizeof (int)); + void *p = malloc (sizeof (int) * 2); int *q = new (p) int[2]; delete q; // { dg-warning "-Wmismatched-new-delete" } } diff --git a/gcc/testsuite/g++.dg/warn/Wunused-parm-12.C b/gcc/testsuite/g++.dg/warn/Wunused-parm-12.C new file mode 100644 index 0000000..03029f9 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wunused-parm-12.C @@ -0,0 +1,59 @@ +// PR c/44677 +// { dg-do compile } +// { dg-options "-O2 -Wunused-but-set-parameter" } + +void baz (int); + +template <int N> +void +foo (int a, // { dg-warning "parameter 'a' set but not used" } + int b, // { dg-warning "parameter 'b' set but not used" } + int c, // { dg-warning "parameter 'c' set but not used" } + int d, // { dg-warning "parameter 'd' set but not used" } + int e, // { dg-warning "parameter 'e' set but not used" } + int f, // { dg-warning "parameter 'f' set but not used" } + int g, // { dg-warning "parameter 'g' set but not used" } + int h, // { dg-warning "parameter 'h' set but not used" } + int i, // { dg-warning "parameter 'i' set but not used" } + int j, // { dg-warning "parameter 'j' set but not used" } + int k, // { dg-warning "parameter 'k' set but not used" } + int l, // { dg-warning "parameter 'l' set but not used" } + int m) // { dg-warning "parameter 'm' set but not used" } +{ + a = 1; + ++b; + c++; + --d; + e--; + f += 2; + g |= 2; + h -= 2; + i &= 2; + j ^= 2; + k *= 2; + l %= 2; + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +template <int N> +int +bar (int a, int b, int c, int d, int e, int f, int g, int h, int i, int j, + int k, int l, int m, int n) +{ + b = ++a; + d = --c; + f = e--; + h = g++; + j = i += 42; + l = k *= 4; + n = m |= 2; + return b + d + f + h + j + l + n; +} + +void +test () +{ + foo <0> (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + bar <0> (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); +} diff --git a/gcc/testsuite/g++.dg/warn/Wunused-parm-13.C b/gcc/testsuite/g++.dg/warn/Wunused-parm-13.C new file mode 100644 index 0000000..f2d357f --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wunused-parm-13.C @@ -0,0 +1,59 @@ +// PR c/44677 +// { dg-do compile } +// { dg-options "-O2 -Wunused-but-set-parameter" } + +void baz (int); + +template <typename T> +void +foo (T a, // { dg-warning "parameter 'a' set but not used" } + T b, // { dg-warning "parameter 'b' set but not used" } + T c, // { dg-warning "parameter 'c' set but not used" } + T d, // { dg-warning "parameter 'd' set but not used" } + T e, // { dg-warning "parameter 'e' set but not used" } + T f, // { dg-warning "parameter 'f' set but not used" } + T g, // { dg-warning "parameter 'g' set but not used" } + T h, // { dg-warning "parameter 'h' set but not used" } + T i, // { dg-warning "parameter 'i' set but not used" } + T j, // { dg-warning "parameter 'j' set but not used" } + T k, // { dg-warning "parameter 'k' set but not used" } + T l, // { dg-warning "parameter 'l' set but not used" } + T m) // { dg-warning "parameter 'm' set but not used" } +{ + a = 1; + ++b; + c++; + --d; + e--; + f += 2; + g |= 2; + h -= 2; + i &= 2; + j ^= 2; + k *= 2; + l %= 2; + for (T n = 4; n < 10; n++, m++) + baz (n); +} + +template <typename T> +T +bar (T a, T b, T c, T d, T e, T f, T g, T h, T i, T j, + T k, T l, T m, T n) +{ + b = ++a; + d = --c; + f = e--; + h = g++; + j = i += 42; + l = k *= 4; + n = m |= 2; + return b + d + f + h + j + l + n; +} + +void +test () +{ + foo <int> (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); + bar <int> (0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); +} diff --git a/gcc/testsuite/g++.dg/warn/Wunused-var-2.C b/gcc/testsuite/g++.dg/warn/Wunused-var-2.C index 0b21ef1..869065f 100644 --- a/gcc/testsuite/g++.dg/warn/Wunused-var-2.C +++ b/gcc/testsuite/g++.dg/warn/Wunused-var-2.C @@ -18,9 +18,9 @@ f1 () } void -f2 (int x) +f2 (int x) // { dg-warning "parameter 'x' set but not used" } { - int a = 0; + int a = 0; // { dg-warning "variable 'a' set but not used" } x++; ++a; } diff --git a/gcc/testsuite/g++.dg/warn/Wunused-var-40.C b/gcc/testsuite/g++.dg/warn/Wunused-var-40.C new file mode 100644 index 0000000..9351367 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wunused-var-40.C @@ -0,0 +1,69 @@ +// PR c/44677 +// { dg-do compile } +// { dg-options "-O2 -Wunused-but-set-variable" } + +void baz (int); + +template <int N> +void +foo (void) +{ + int a = 0; // { dg-warning "variable 'a' set but not used" } + a = 1; + int b = 0; // { dg-warning "variable 'b' set but not used" } + ++b; + int c = 0; // { dg-warning "variable 'c' set but not used" } + c++; + int d = 0; // { dg-warning "variable 'd' set but not used" } + --d; + int e = 0; // { dg-warning "variable 'e' set but not used" } + e--; + int f = 0; // { dg-warning "variable 'f' set but not used" } + f += 2; + int g = 0; // { dg-warning "variable 'g' set but not used" } + g |= 2; + int h = 0; // { dg-warning "variable 'h' set but not used" } + h -= 2; + int i = 0; // { dg-warning "variable 'i' set but not used" } + i &= 2; + int j = 0; // { dg-warning "variable 'j' set but not used" } + j ^= 2; + int k = 0; // { dg-warning "variable 'k' set but not used" } + k *= 2; + int l = 0; // { dg-warning "variable 'l' set but not used" } + l %= 2; + int m = 0; // { dg-warning "variable 'm' set but not used" } + for (int n = 4; n < 10; n++, m++) + baz (n); +} + +template <int N> +int +bar (void) +{ + int a = 0; + int b = ++a; + int c = 0; + int d = --c; + int e = 0; + int f = e--; + int g = 0; + int h = g++; + int i = 0; + int j; + j = i += 42; + int k = 0; + int l; + l = k *= 4; + int m = 0; + int n; + n = m |= 2; + return b + d + f + h + j + l + n; +} + +void +test () +{ + foo <0> (); + bar <0> (); +} diff --git a/gcc/testsuite/g++.dg/warn/Wunused-var-41.C b/gcc/testsuite/g++.dg/warn/Wunused-var-41.C new file mode 100644 index 0000000..ff981ee --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wunused-var-41.C @@ -0,0 +1,69 @@ +// PR c/44677 +// { dg-do compile } +// { dg-options "-O2 -Wunused-but-set-variable" } + +void baz (int); + +template <typename T> +void +foo (void) +{ + T a = 0; // { dg-warning "variable 'a' set but not used" } + a = 1; + T b = 0; // { dg-warning "variable 'b' set but not used" } + ++b; + T c = 0; // { dg-warning "variable 'c' set but not used" } + c++; + T d = 0; // { dg-warning "variable 'd' set but not used" } + --d; + T e = 0; // { dg-warning "variable 'e' set but not used" } + e--; + T f = 0; // { dg-warning "variable 'f' set but not used" } + f += 2; + T g = 0; // { dg-warning "variable 'g' set but not used" } + g |= 2; + T h = 0; // { dg-warning "variable 'h' set but not used" } + h -= 2; + T i = 0; // { dg-warning "variable 'i' set but not used" } + i &= 2; + T j = 0; // { dg-warning "variable 'j' set but not used" } + j ^= 2; + T k = 0; // { dg-warning "variable 'k' set but not used" } + k *= 2; + T l = 0; // { dg-warning "variable 'l' set but not used" } + l %= 2; + T m = 0; // { dg-warning "variable 'm' set but not used" } + for (T n = 4; n < 10; n++, m++) + baz (n); +} + +template <typename T> +T +bar (void) +{ + T a = 0; + T b = ++a; + T c = 0; + T d = --c; + T e = 0; + T f = e--; + T g = 0; + T h = g++; + T i = 0; + T j; + j = i += 42; + T k = 0; + T l; + l = k *= 4; + T m = 0; + T n; + n = m |= 2; + return b + d + f + h + j + l + n; +} + +void +test () +{ + foo <int> (); + bar <int> (); +} diff --git a/gcc/testsuite/g++.dg/warn/pr121133-1.C b/gcc/testsuite/g++.dg/warn/pr121133-1.C new file mode 100644 index 0000000..6d6e13b --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/pr121133-1.C @@ -0,0 +1,16 @@ +// PR c++/121133 +// { dg-do compile } +// { dg-options "-std=c++98 -Wno-long-long -pedantic-errors" } + +__extension__ typedef long long L; +__extension__ long long a; +struct S { + __extension__ long long b; +}; + +void +foo () +{ + __extension__ long long c; + c = c + (__extension__ (long long) 1); +} diff --git a/gcc/testsuite/g++.dg/warn/pr121133-2.C b/gcc/testsuite/g++.dg/warn/pr121133-2.C new file mode 100644 index 0000000..cd97a76 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/pr121133-2.C @@ -0,0 +1,5 @@ +// PR c++/121133 +// { dg-do compile } +// { dg-options "-std=c++98 -pedantic-errors" } + +#include "pr121133-1.C" diff --git a/gcc/testsuite/g++.dg/warn/pr121133-3.C b/gcc/testsuite/g++.dg/warn/pr121133-3.C new file mode 100644 index 0000000..9ffd407 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/pr121133-3.C @@ -0,0 +1,5 @@ +// PR c++/121133 +// { dg-do compile { target c++11 } } +// { dg-options "-pedantic-errors" } + +#include "pr121133-1.C" diff --git a/gcc/testsuite/g++.dg/warn/pr121133-4.C b/gcc/testsuite/g++.dg/warn/pr121133-4.C new file mode 100644 index 0000000..76885ba --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/pr121133-4.C @@ -0,0 +1,5 @@ +// PR c++/121133 +// { dg-do compile { target c++11 } } +// { dg-options "-pedantic-errors -Wlong-long" } + +#include "pr121133-1.C" diff --git a/gcc/testsuite/g++.target/aarch64/mv-cpu-features.C b/gcc/testsuite/g++.target/aarch64/mv-cpu-features.C new file mode 100644 index 0000000..ad6accd --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/mv-cpu-features.C @@ -0,0 +1,82 @@ +/* { dg-do run } */ +/* { dg-require-ifunc "" } */ +/* { dg-require-effective-target mmap } */ +/* { dg-options "-Wno-experimental-fmv-target" } */ + +#include <cstdint> +#include <sys/auxv.h> + +__attribute__((target_version ("default"))) +int foo () +{ + return 0; +} + +__attribute__((target_version ("rng"))) +int foo () +{ + return 1; +} + +__attribute__((target_version ("lse"))) +int foo () +{ + return 2; +} + +typedef struct { + uint64_t size; + uint64_t hwcap; + uint64_t hwcap2; + uint64_t hwcap3; + uint64_t hwcap4; +} ifunc_arg_t; + +int impl () +{ + return 0; +} + +#ifndef _IFUNC_ARG_HWCAP +#define _IFUNC_ARG_HWCAP (1ULL << 62) +#endif + +extern "C" void +__init_cpu_features_resolver (unsigned long hwcap, const ifunc_arg_t *arg); + +extern "C" void * +fun_resolver (uint64_t a0, const ifunc_arg_t *a1) +{ + ifunc_arg_t arg = {}; + arg.size = sizeof (ifunc_arg_t); + /* These flags determine that the implementation of foo () + that returns 2 will be selected. */ + arg.hwcap = HWCAP_ATOMICS; + arg.hwcap2 = HWCAP2_RNG; + __init_cpu_features_resolver (arg.hwcap | _IFUNC_ARG_HWCAP, &arg); + return (void *)(uintptr_t)impl; +} + +extern "C" int fun (void) __attribute__((ifunc ("fun_resolver"))); + +/* In this test we expect that the manual resolver for the fun () + function will be executed before the automatic resolver for the + FMV function foo (). This is because resolvers from the same TU + are executed according to the offset of corresponding relocations. + + Automatic resolver is generated in a dedicated section while the + manually written resolver will be put in the .text section which + will come first. + + The manual resolver above calls __init_cpu_features_resolver() + supplying synthetic ifunc_arg_t fields that will determine the + choice for the FMV implementation. + */ + +int main () +{ + int res = fun (); + if (res == 0 && foo () == 2) + return 0; + return 1; +} diff --git a/gcc/testsuite/g++.target/aarch64/sme/sme_throw_1.C b/gcc/testsuite/g++.target/aarch64/sme/sme_throw_1.C new file mode 100644 index 0000000..76f1e8b --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/sme/sme_throw_1.C @@ -0,0 +1,55 @@ +/* { dg-do run { target { aarch64*-linux-gnu* && aarch64_sme_hw } } } */ + +#include <signal.h> +#include <arm_sme.h> + +static bool caught; + +[[gnu::noipa]] void thrower(int) +{ + throw 1; +} + +[[gnu::noipa]] void bar() +{ + *(volatile int *)0 = 0; +} + +[[gnu::noipa]] void foo() +{ + try + { + bar(); + } + catch (int) + { + caught = true; + } +} + +__arm_new("za") __arm_locally_streaming void sme_user() +{ + svbool_t all = svptrue_b8(); + for (unsigned int i = 0; i < svcntb(); ++i) + { + svint8_t expected = svindex_s8(i + 1, i); + svwrite_hor_za8_m(0, i, all, expected); + } + foo(); + for (unsigned int i = 0; i < svcntb(); ++i) + { + svint8_t expected = svindex_s8(i + 1, i); + svint8_t actual = svread_hor_za8_m(svdup_s8(0), all, 0, i); + if (svptest_any(all, svcmpne(all, expected, actual))) + __builtin_abort(); + } + if (!caught) + __builtin_abort(); +} + +int main() +{ + signal(SIGSEGV, thrower); + sme_user(); + return 0; +} diff --git a/gcc/testsuite/g++.target/aarch64/sme/sme_throw_2.C b/gcc/testsuite/g++.target/aarch64/sme/sme_throw_2.C new file mode 100644 index 0000000..db3197c --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/sme/sme_throw_2.C @@ -0,0 +1,4 @@ +/* { dg-do run { target { aarch64*-linux-gnu* && aarch64_sme_hw } } } */ +/* { dg-options "-O2" } */ + +#include "sme_throw_1.C" diff --git a/gcc/testsuite/g++.target/aarch64/sve/unpacked_binary_bf16_1.C b/gcc/testsuite/g++.target/aarch64/sve/unpacked_binary_bf16_1.C new file mode 100644 index 0000000..9d6342b --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/sve/unpacked_binary_bf16_1.C @@ -0,0 +1,35 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-signed-zeros -ffinite-math-only -msve-vector-bits=2048" } */ + +#pragma GCC target "arch=armv9-a+sve-b16b16" + +#define ADD(a, b) a + b +#define SUB(a, b) a - b +#define MUL(a, b) a * b +#define MAX(a, b) (a > b) ? a : b +#define MIN(a, b) (a > b) ? b : a + +#define TEST_OP(TYPE, OP) \ + TYPE test_##TYPE##_##OP (TYPE a, TYPE b) { return OP (a, b); } \ + +#define TEST_ALL(TYPE, SIZE) \ + typedef TYPE TYPE##SIZE __attribute__((vector_size(SIZE))); \ + TEST_OP (TYPE##SIZE, ADD) \ + TEST_OP (TYPE##SIZE, SUB) \ + TEST_OP (TYPE##SIZE, MUL) \ + TEST_OP (TYPE##SIZE, MIN) \ + TEST_OP (TYPE##SIZE, MAX) + +TEST_ALL (__bf16, 64) + +TEST_ALL (__bf16, 128) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 5 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 5 } } */ + +/* { dg-final { scan-assembler-times {\tbfadd\tz[0-9]+\.h, p[0-7]/m. z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tbfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tbfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tbfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tbfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/g++.target/aarch64/sve/unpacked_binary_bf16_2.C b/gcc/testsuite/g++.target/aarch64/sve/unpacked_binary_bf16_2.C new file mode 100644 index 0000000..63de293 --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/sve/unpacked_binary_bf16_2.C @@ -0,0 +1,15 @@ +/* { dg-do compile }*/ +/* { dg-options "-O2 -ffinite-math-only -fno-signed-zeros -fno-trapping-math -msve-vector-bits=2048 " } */ + +#include "unpacked_binary_bf16_1.C" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 10 } } */ + +/* { dg-final { scan-assembler-times {\tbfadd\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tbfsub\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tbfmul\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tbfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tbfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_binary_bf16_1.C b/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_binary_bf16_1.C new file mode 100644 index 0000000..560d874 --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_binary_bf16_1.C @@ -0,0 +1,46 @@ +/* { dg-do compile }*/ +/* { dg-options "-O -ffinite-math-only -fno-signed-zeros -fno-trapping-math -msve-vector-bits=2048 " } */ + +#include <stdint.h> +#pragma GCC target "arch=armv9-a+sve-b16b16" + +#define ADD(a, b) a + b +#define SUB(a, b) a - b +#define MUL(a, b) a * b +#define MAX(a, b) (a > b) ? a : b +#define MIN(a, b) (a > b) ? b : a + +#define COND_OP(OP, TYPE, PRED_TYPE, ARG2, MERGE) \ + TYPE test_##OP##_##TYPE##_##ARG2##_##MERGE (TYPE a, TYPE b, TYPE c, PRED_TYPE p) \ + {return p ? OP (a, ARG2) : MERGE; } + +#define TEST_OP(OP, TYPE, PRED_TYPE, T) \ + T (OP, TYPE, PRED_TYPE, b, a) \ + T (OP, TYPE, PRED_TYPE, b, b) \ + T (OP, TYPE, PRED_TYPE, b, c) + +#define TEST_ALL(TYPE, PRED_TYPE, T) \ + TEST_OP (ADD, TYPE, PRED_TYPE, T) \ + TEST_OP (SUB, TYPE, PRED_TYPE, T) \ + TEST_OP (MUL, TYPE, PRED_TYPE, T) \ + TEST_OP (MAX, TYPE, PRED_TYPE, T) \ + TEST_OP (MIN, TYPE, PRED_TYPE, T) + +#define TEST(TYPE, PTYPE, SIZE) \ + typedef TYPE TYPE##SIZE __attribute__ ((vector_size (SIZE))); \ + typedef PTYPE PTYPE##SIZE __attribute__ ((vector_size (SIZE))); \ + TEST_ALL (TYPE##SIZE, PTYPE##SIZE, COND_OP) + +TEST (__bf16, uint16_t, 128) + +TEST (__bf16, uint16_t, 64) + +/* { dg-final { scan-assembler-times {\tbfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tbfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tbfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ + +/* { dg-final { scan-assembler-times {\tbfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tbfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ + +// There's no BFSUBR. +/* { dg-final { scan-assembler-times {\tsel\t} 2 } } */ diff --git a/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_binary_bf16_2.C b/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_binary_bf16_2.C new file mode 100644 index 0000000..02880ef --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_binary_bf16_2.C @@ -0,0 +1,18 @@ +/* { dg-do compile }*/ +/* { dg-options "-O -ffinite-math-only -fno-signed-zeros -msve-vector-bits=2048 " } */ + +#include "unpacked_cond_binary_bf16_1.C" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 15 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 15 } } */ +/* { dg-final { scan-assembler-times {\tand} 30 } } */ + +/* { dg-final { scan-assembler-times {\tbfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tbfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tbfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ + +/* { dg-final { scan-assembler-times {\tbfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tbfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ + +// There's no BFSUBR. +/* { dg-final { scan-assembler-times {\tsel\t} 2 } } */ diff --git a/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_ternary_bf16_1.C b/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_ternary_bf16_1.C new file mode 100644 index 0000000..95cd698 --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_ternary_bf16_1.C @@ -0,0 +1,35 @@ +/* { dg-do compile }*/ +/* { dg-options "-O2 -fno-trapping-math -msve-vector-bits=2048 " } */ + +#include <stdint.h> +#pragma GCC target "arch=armv9-a+sve-b16b16" + +#define COND_BFMLA(TYPE, PRED_TYPE, MERGE) \ + TYPE test_bfmla_##TYPE##_##MERGE (TYPE a, TYPE b, TYPE c, PRED_TYPE p) \ + {return p ? a * b + c : MERGE; } + +#define COND_BFMLS(TYPE, PRED_TYPE, MERGE) \ + TYPE test_bfmls_##TYPE##_##MERGE (TYPE a, TYPE b, TYPE c, PRED_TYPE p) \ + {return p ? a * -b + c : MERGE; } + +#define TEST_OP(TYPE, PRED_TYPE, T) \ + T (TYPE, PRED_TYPE, c) \ + T (TYPE, PRED_TYPE, 0) + +#define TEST(TYPE, PTYPE, SIZE) \ + typedef TYPE TYPE##SIZE __attribute__ ((vector_size (SIZE))); \ + typedef PTYPE PTYPE##SIZE __attribute__ ((vector_size (SIZE))); \ + TEST_OP (TYPE##SIZE, PTYPE##SIZE, COND_BFMLA) \ + TEST_OP (TYPE##SIZE, PTYPE##SIZE, COND_BFMLS) + +TEST (__bf16, uint16_t, 128) + +TEST (__bf16, uint16_t, 64) + +/* { dg-final { scan-assembler-times {\tptrue} 8 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/z, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tbfmla\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tbfmls\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_ternary_bf16_2.C b/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_ternary_bf16_2.C new file mode 100644 index 0000000..c0d7c50 --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/sve/unpacked_cond_ternary_bf16_2.C @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msve-vector-bits=2048" } */ + +#include "unpacked_cond_ternary_bf16_1.C" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tand} 8 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/z, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tbfmla\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tbfmls\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/g++.target/aarch64/sve/unpacked_ternary_bf16_1.C b/gcc/testsuite/g++.target/aarch64/sve/unpacked_ternary_bf16_1.C new file mode 100644 index 0000000..19bfe95 --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/sve/unpacked_ternary_bf16_1.C @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msve-vector-bits=2048" } */ + +#define BFMLA(TYPE) \ + TYPE test_bfmla_##TYPE (TYPE a, TYPE b, TYPE c) \ + { return a * b + c; } + +#define BFMLS(TYPE) \ + TYPE test_bfmls_##TYPE (TYPE a, TYPE b, TYPE c) \ + { return a * -b + c; } + +#define TEST_TYPE(TYPE, SIZE) \ + typedef TYPE TYPE##SIZE __attribute__((vector_size(SIZE))); \ + BFMLA (TYPE##SIZE) \ + BFMLS (TYPE##SIZE) + +#pragma GCC target "arch=armv9-a+sve-b16b16" + +TEST_TYPE (__bf16, 128) + +TEST_TYPE (__bf16, 64) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tbfmla\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tbfmls\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/g++.target/aarch64/sve/unpacked_ternary_bf16_2.C b/gcc/testsuite/g++.target/aarch64/sve/unpacked_ternary_bf16_2.C new file mode 100644 index 0000000..ef37400 --- /dev/null +++ b/gcc/testsuite/g++.target/aarch64/sve/unpacked_ternary_bf16_2.C @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msve-vector-bits=2048 -fno-trapping-math" } */ + +#include "unpacked_ternary_bf16_1.C" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 4 } } */ + +/* { dg-final { scan-assembler-times {\tbfmla\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tbfmls\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.dg/20021014-1.c b/gcc/testsuite/gcc.dg/20021014-1.c index e43f7b2..ee5d459 100644 --- a/gcc/testsuite/gcc.dg/20021014-1.c +++ b/gcc/testsuite/gcc.dg/20021014-1.c @@ -2,6 +2,7 @@ /* { dg-require-profiling "-p" } */ /* { dg-options "-O2 -p" } */ /* { dg-options "-O2 -p -static" { target hppa*-*-hpux* } } */ +/* { dg-additional-options "-mfentry -fno-pic" { target i?86-*-gnu* x86_64-*-gnu* } } */ /* { dg-error "profiler" "No profiler support" { target xstormy16-*-* } 0 } */ /* { dg-message "" "consider using `-pg' instead of `-p' with gprof(1)" { target *-*-freebsd* } 0 } */ diff --git a/gcc/testsuite/gcc.dg/Warray-parameter-11.c b/gcc/testsuite/gcc.dg/Warray-parameter-11.c index 8ca1b55..e05835c 100644 --- a/gcc/testsuite/gcc.dg/Warray-parameter-11.c +++ b/gcc/testsuite/gcc.dg/Warray-parameter-11.c @@ -9,7 +9,7 @@ typedef __INTPTR_TYPE__ intptr_t; void f0 (double[!copysign (~2, 3)]); void f1 (double[!copysign (~2, 3)]); -void f1 (double[1]); // { dg-warning "-Warray-parameter" } +void f1 (double[1]); // { dg-warning "-Wvla-parameter" } void f2 (int[(int)+1.0]); void f2 (int[(int)+1.1]); @@ -21,4 +21,4 @@ extern struct S *sp; void f3 (int[(intptr_t)((char*)sp->a - (char*)sp)]); void f3 (int[(intptr_t)((char*)&sp->a[0] - (char*)sp)]); -void f3 (int[(intptr_t)((char*)&sp->a[1] - (char*)sp)]); // { dg-warning "-Warray-parameter" } +void f3 (int[(intptr_t)((char*)&sp->a[1] - (char*)sp)]); // { dg-warning "-Wvla-parameter" } diff --git a/gcc/testsuite/gcc.dg/Warray-parameter.c b/gcc/testsuite/gcc.dg/Warray-parameter.c index 6c5195a..31879a8 100644 --- a/gcc/testsuite/gcc.dg/Warray-parameter.c +++ b/gcc/testsuite/gcc.dg/Warray-parameter.c @@ -118,8 +118,7 @@ typedef int IA2[2]; typedef int IA3[3]; // The message should differentiate between the [] form and *. -void f1IAx_A1 (IAx); // { dg-message "previously declared as 'int\\\[]'" "pr?????" { xfail *-*-* } } - // { dg-message "previously declared as 'int *\\\*'" "note" { target *-*-* } .-1 } +void f1IAx_A1 (IAx); // { dg-message "previously declared as 'int\\\[]'" } void f1IAx_A1 (IA1); // { dg-message "argument 1 of type 'int\\\[1]' with mismatched bound" } void f1IA1_A2 (IA1); // { dg-message "previously declared as 'int\\\[1]'" } diff --git a/gcc/testsuite/gcc.dg/analyzer/state-diagram-1-sarif.py b/gcc/testsuite/gcc.dg/analyzer/state-diagram-1-sarif.py index d2967d4..d92af83 100644 --- a/gcc/testsuite/gcc.dg/analyzer/state-diagram-1-sarif.py +++ b/gcc/testsuite/gcc.dg/analyzer/state-diagram-1-sarif.py @@ -6,7 +6,7 @@ import pytest def sarif(): return sarif_from_env() -def test_xml_state(sarif): +def test_state_graph(sarif): result = get_result_by_index(sarif, 0) assert result['level'] == 'warning' @@ -17,16 +17,49 @@ def test_xml_state(sarif): # Event "(1)": "entry to 'test'" (index == 0) assert events[0]['location']['message']['text'] == "entry to 'test'" - state0 = get_xml_state(events, 0) - memory_regions = state0.find('memory-regions') - assert memory_regions is not None - stack = memory_regions.find('stack') - assert stack is not None - frame = stack.find('stack-frame') - assert frame.get('function') == 'test' + state0 = get_state_graph(events, 0) + + stack = state0['nodes'][0] + assert stack['id'] == 'stack' + assert get_state_node_kind(stack) == 'stack' + + frame = stack['children'][0] + assert frame['id'].startswith('frame-region-') + assert get_state_node_kind(frame) == 'stack-frame' + assert get_state_node_attr(frame, 'function') == 'test' + assert frame['location']['logicalLocations'][0]['fullyQualifiedName'] == 'test' # Final event: assert events[-1]['location']['message']['text'].startswith("use after 'free' of ") - state = get_xml_state(events, -1) - # TODO + state = get_state_graph(events, -1) + + stack = state['nodes'][0] + assert stack['id'] == 'stack' + assert get_state_node_kind(stack) == 'stack' + + frame = stack['children'][0] + assert frame['id'].startswith('frame-region-') + assert get_state_node_kind(frame) == 'stack-frame' + assert get_state_node_attr(frame, 'function') == 'test' + assert frame['location']['logicalLocations'][0]['fullyQualifiedName'] == 'test' + + heap = state['nodes'][1] + assert heap['id'] == 'heap' + assert get_state_node_kind(heap) == 'heap' + + assert len(heap['children']) == 3 + heap_buffer0 = heap['children'][0] + assert heap_buffer0['id'].startswith('heap-allocated-region-') + assert get_state_node_kind(heap_buffer0) == 'dynalloc-buffer' + + globals_ = state['nodes'][2] + assert globals_['id'] == 'globals' + assert get_state_node_kind(globals_) == 'globals' + first = globals_['children'][0] + assert first['id'].startswith('decl-region-') + assert get_state_node_kind(first) == 'variable' + assert get_state_node_name(first) == 'first' + assert get_state_node_type(first) == 'struct node *' + + assert len(state['edges']) == 3 diff --git a/gcc/testsuite/gcc.dg/analyzer/state-diagram-1.c b/gcc/testsuite/gcc.dg/analyzer/state-diagram-1.c index 3d853d2..3b35cfa 100644 --- a/gcc/testsuite/gcc.dg/analyzer/state-diagram-1.c +++ b/gcc/testsuite/gcc.dg/analyzer/state-diagram-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-fdiagnostics-add-output=sarif:xml-state=yes" } */ +/* { dg-additional-options "-fdiagnostics-add-output=sarif:state-graphs=yes" } */ #include "analyzer-decls.h" diff --git a/gcc/testsuite/gcc.dg/analyzer/state-diagram-5-sarif.c b/gcc/testsuite/gcc.dg/analyzer/state-diagram-5-sarif.c index 28cf580..b981cf9 100644 --- a/gcc/testsuite/gcc.dg/analyzer/state-diagram-5-sarif.c +++ b/gcc/testsuite/gcc.dg/analyzer/state-diagram-5-sarif.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-fdiagnostics-add-output=sarif:xml-state=yes" } */ +/* { dg-additional-options "-fdiagnostics-add-output=sarif:state-graphs=yes" } */ #include "analyzer-decls.h" diff --git a/gcc/testsuite/gcc.dg/analyzer/state-diagram-5-sarif.py b/gcc/testsuite/gcc.dg/analyzer/state-diagram-5-sarif.py index 484da96..3a2c6f8 100644 --- a/gcc/testsuite/gcc.dg/analyzer/state-diagram-5-sarif.py +++ b/gcc/testsuite/gcc.dg/analyzer/state-diagram-5-sarif.py @@ -1,5 +1,3 @@ -import xml.etree.ElementTree as ET - from sarif import * import pytest @@ -8,7 +6,7 @@ import pytest def sarif(): return sarif_from_env() -def test_nested_types_in_xml_state(sarif): +def test_nested_types_in_state_graph(sarif): result = get_result_by_index(sarif, 0) assert result['level'] == 'note' @@ -16,16 +14,17 @@ def test_nested_types_in_xml_state(sarif): events = result["codeFlows"][0]["threadFlows"][0]['locations'] assert events[0]['location']['message']['text'] == 'here' - state = get_xml_state(events, 0) - - memory_regions = state.find('memory-regions') - assert memory_regions is not None + state = get_state_graph(events, 0) - stack = memory_regions.find('stack') - assert stack is not None + stack = state['nodes'][0] + assert stack['id'] == 'stack' + assert get_state_node_kind(stack) == 'stack' - frame = stack.find('stack-frame') - assert frame.get('function') == 'test' + frame = stack['children'][0] + assert frame['id'].startswith('frame-region-') + assert get_state_node_kind(frame) == 'stack-frame' + assert get_state_node_attr(frame, 'function') == 'test' + assert frame['location']['logicalLocations'][0]['fullyQualifiedName'] == 'test' # We have: # baz_arr[1].m_bars[1].m_foos[2].m_ints[1] = 42; @@ -34,40 +33,57 @@ def test_nested_types_in_xml_state(sarif): # representation to nested elements and fields. # "baz_arr": - baz_arr = frame.find("variable[@name='baz_arr']") - assert baz_arr.get('type') == 'struct baz[2]' + baz_arr = frame['children'][0] + assert get_state_node_kind(baz_arr) == 'variable' + assert get_state_node_type(baz_arr) == 'struct baz[2]' + + assert len(baz_arr['children']) == 2 + + bindings = baz_arr['children'][0] + assert bindings['id'].startswith('concrete-bindings-') + assert get_state_node_kind(bindings) == 'other' + assert get_state_node_value(bindings['children'][0]) == '(int)42' # "baz_arr[1]": - baz_arr_1 = baz_arr.find("element[@index='1']") - assert baz_arr_1.get('type') == 'struct baz' + baz_arr_1 = baz_arr['children'][1] + assert get_state_node_type(baz_arr_1) == 'struct baz' + assert get_state_node_kind(baz_arr_1) == 'element' + assert get_state_node_attr(baz_arr_1, 'index') == '1' - assert baz_arr.find("element[@index='0']") is None + assert len(baz_arr_1['children']) == 1 # "baz_arr[1].m_bars": - baz_arr_1_m_bars = baz_arr_1.find("field[@name='m_bars']") - assert baz_arr_1_m_bars.get('type') == 'struct bar[2]' + baz_arr_1_m_bars = baz_arr_1['children'][0] + assert get_state_node_name(baz_arr_1_m_bars) == 'm_bars' + assert get_state_node_type(baz_arr_1_m_bars) == 'struct bar[2]' # "baz_arr[1].m_bars[1]" - baz_arr_1_m_bars_1 = baz_arr_1_m_bars.find("element[@index='1']") - assert baz_arr_1_m_bars_1.get('type') == 'struct bar' + baz_arr_1_m_bars_1 = baz_arr_1_m_bars['children'][0] + assert get_state_node_type(baz_arr_1_m_bars_1) == 'struct bar' + assert get_state_node_kind(baz_arr_1_m_bars_1) == 'element' + assert get_state_node_attr(baz_arr_1_m_bars_1, 'index') == '1' # "baz_arr[1].m_bars[1].m_foos" - baz_arr_1_m_bars_1_m_foos = baz_arr_1_m_bars_1.find("field[@name='m_foos']") - assert baz_arr_1_m_bars_1_m_foos.get('type') == 'struct foo[3]' + baz_arr_1_m_bars_1_m_foos = baz_arr_1_m_bars_1['children'][0] + assert get_state_node_kind(baz_arr_1_m_bars_1_m_foos) == 'field' + assert get_state_node_name(baz_arr_1_m_bars_1_m_foos) == 'm_foos' + assert get_state_node_type(baz_arr_1_m_bars_1_m_foos) == 'struct foo[3]' # "baz_arr[1].m_bars[1].m_foos[2]" - baz_arr_1_m_bars_1_m_foos_2 = baz_arr_1_m_bars_1_m_foos.find("element[@index='2']") - assert baz_arr_1_m_bars_1_m_foos_2.get('type') == 'struct foo' - + baz_arr_1_m_bars_1_m_foos_2 = baz_arr_1_m_bars_1_m_foos['children'][0] + assert get_state_node_type(baz_arr_1_m_bars_1_m_foos_2) == 'struct foo' + assert get_state_node_kind(baz_arr_1_m_bars_1_m_foos_2) == 'element' + assert get_state_node_attr(baz_arr_1_m_bars_1_m_foos_2, 'index') == '2' + # "baz_arr[1].m_bars[1].m_foos[2].m_ints" - baz_arr_1_m_bars_1_m_foos_2_m_ints = baz_arr_1_m_bars_1_m_foos_2.find('field[@name="m_ints"]') - assert baz_arr_1_m_bars_1_m_foos_2_m_ints.get('type') == 'int[4]' - - # "baz_arr[1].m_bars[1].m_foos[2].m_ints[1]" - baz_arr_1_m_bars_1_m_foos_2_m_ints_1 = baz_arr_1_m_bars_1_m_foos_2_m_ints.find('element[@index="1"]') - assert baz_arr_1_m_bars_1_m_foos_2_m_ints_1.get('type') == 'int' + baz_arr_1_m_bars_1_m_foos_2_m_ints = baz_arr_1_m_bars_1_m_foos_2['children'][0] + assert get_state_node_kind(baz_arr_1_m_bars_1_m_foos_2_m_ints) == 'field' + assert get_state_node_name(baz_arr_1_m_bars_1_m_foos_2_m_ints) == 'm_ints' + assert get_state_node_type(baz_arr_1_m_bars_1_m_foos_2_m_ints) == 'int[4]' - value = baz_arr_1_m_bars_1_m_foos_2_m_ints_1.find('value-of-region') - constant = value.find('constant') - assert constant.get('value') == '42' - assert constant.get('type') == 'int' + # "baz_arr[1].m_bars[1].m_foos[2].m_ints[1]" + baz_arr_1_m_bars_1_m_foos_2_m_ints_1 = baz_arr_1_m_bars_1_m_foos_2_m_ints['children'][0] + assert get_state_node_type(baz_arr_1_m_bars_1_m_foos_2_m_ints_1) == 'int' + assert get_state_node_kind(baz_arr_1_m_bars_1_m_foos_2_m_ints_1) == 'element' + assert get_state_node_attr(baz_arr_1_m_bars_1_m_foos_2_m_ints_1, 'index') == '1' + assert get_state_node_value(baz_arr_1_m_bars_1_m_foos_2_m_ints_1) == '(int)42' diff --git a/gcc/testsuite/gcc.dg/aru-2.c b/gcc/testsuite/gcc.dg/aru-2.c index 054223c..61898de 100644 --- a/gcc/testsuite/gcc.dg/aru-2.c +++ b/gcc/testsuite/gcc.dg/aru-2.c @@ -1,6 +1,7 @@ /* { dg-do run } */ /* { dg-require-profiling "-pg" } */ /* { dg-options "-O2 -pg" } */ +/* { dg-additional-options "-mfentry -fno-pic" { target i?86-*-gnu* x86_64-*-gnu* } } */ static int __attribute__((noinline)) bar (int x) diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-1.c b/gcc/testsuite/gcc.dg/asm-hard-reg-1.c new file mode 100644 index 0000000..6a5a9ad --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-1.c @@ -0,0 +1,85 @@ +/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-* riscv*-*-* s390*-*-* x86_64-*-* } } */ + +#if defined (__aarch64__) +# define GPR "{x4}" +/* { dg-final { scan-assembler-times "foo\tx4" 8 { target { aarch64*-*-* } } } } */ +#elif defined (__arm__) +# define GPR "{r4}" +/* { dg-final { scan-assembler-times "foo\tr4" 8 { target { arm*-*-* } } } } */ +#elif defined (__i386__) +# define GPR "{ecx}" +/* { dg-final { scan-assembler-times "foo\t%cl" 2 { target { i?86-*-* } } } } */ +/* { dg-final { scan-assembler-times "foo\t%cx" 2 { target { i?86-*-* } } } } */ +/* { dg-final { scan-assembler-times "foo\t%ecx" 4 { target { i?86-*-* } } } } */ +#elif defined (__powerpc__) || defined (__POWERPC__) +# define GPR "{r5}" +/* { dg-final { scan-assembler-times "foo\t5" 8 { target { powerpc*-*-* } } } } */ +#elif defined (__riscv) +# define GPR "{t5}" +/* { dg-final { scan-assembler-times "foo\tt5" 8 { target { riscv*-*-* } } } } */ +#elif defined (__s390__) +# define GPR "{r4}" +/* { dg-final { scan-assembler-times "foo\t%r4" 8 { target { s390*-*-* } } } } */ +#elif defined (__x86_64__) +# define GPR "{rcx}" +/* { dg-final { scan-assembler-times "foo\t%cl" 2 { target { x86_64-*-* } } } } */ +/* { dg-final { scan-assembler-times "foo\t%cx" 2 { target { x86_64-*-* } } } } */ +/* { dg-final { scan-assembler-times "foo\t%ecx" 2 { target { x86_64-*-* } } } } */ +/* { dg-final { scan-assembler-times "foo\t%rcx" 2 { target { x86_64-*-* } } } } */ +#endif + +char +test_char (char x) +{ + __asm__ ("foo\t%0" : "+"GPR (x)); + return x; +} + +char +test_char_from_mem (char *x) +{ + __asm__ ("foo\t%0" : "+"GPR (*x)); + return *x; +} + +short +test_short (short x) +{ + __asm__ ("foo\t%0" : "+"GPR (x)); + return x; +} + +short +test_short_from_mem (short *x) +{ + __asm__ ("foo\t%0" : "+"GPR (*x)); + return *x; +} + +int +test_int (int x) +{ + __asm__ ("foo\t%0" : "+"GPR (x)); + return x; +} + +int +test_int_from_mem (int *x) +{ + __asm__ ("foo\t%0" : "+"GPR (*x)); + return *x; +} + +long +test_long (long x) +{ + __asm__ ("foo\t%0" : "+"GPR (x)); + return x; +} + +long +test_long_from_mem (long *x) +{ + __asm__ ("foo\t%0" : "+"GPR (*x)); + return *x; +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-2.c b/gcc/testsuite/gcc.dg/asm-hard-reg-2.c new file mode 100644 index 0000000..7dabf96 --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-2.c @@ -0,0 +1,33 @@ +/* { dg-do compile { target aarch64*-*-* powerpc64*-*-* riscv64-*-* s390*-*-* x86_64-*-* } } */ +/* { dg-options "-std=c99" } we need long long */ + +#if defined (__aarch64__) +# define GPR "{x4}" +/* { dg-final { scan-assembler-times "foo\tx4" 2 { target { aarch64*-*-* } } } } */ +#elif defined (__powerpc__) || defined (__POWERPC__) +# define GPR "{r5}" +/* { dg-final { scan-assembler-times "foo\t5" 2 { target { powerpc64*-*-* } } } } */ +#elif defined (__riscv) +# define GPR "{t5}" +/* { dg-final { scan-assembler-times "foo\tt5" 2 { target { riscv64-*-* } } } } */ +#elif defined (__s390__) +# define GPR "{r4}" +/* { dg-final { scan-assembler-times "foo\t%r4" 2 { target { s390*-*-* } } } } */ +#elif defined (__x86_64__) +# define GPR "{rcx}" +/* { dg-final { scan-assembler-times "foo\t%rcx" 2 { target { x86_64-*-* } } } } */ +#endif + +long long +test_longlong (long long x) +{ + __asm__ ("foo\t%0" : "+"GPR (x)); + return x; +} + +long long +test_longlong_from_mem (long long *x) +{ + __asm__ ("foo\t%0" : "+"GPR (*x)); + return *x; +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-3.c b/gcc/testsuite/gcc.dg/asm-hard-reg-3.c new file mode 100644 index 0000000..fa4472a --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-3.c @@ -0,0 +1,25 @@ +/* { dg-do compile { target { { aarch64*-*-* powerpc64*-*-* riscv64-*-* s390*-*-* x86_64-*-* } && int128 } } } */ +/* { dg-options "-O2" } get rid of -ansi since we use __int128 */ + +#if defined (__aarch64__) +# define REG "{x4}" +/* { dg-final { scan-assembler-times "foo\tx4" 1 { target { aarch64*-*-* } } } } */ +#elif defined (__powerpc__) || defined (__POWERPC__) +# define REG "{r5}" +/* { dg-final { scan-assembler-times "foo\t5" 1 { target { powerpc*-*-* } } } } */ +#elif defined (__riscv) +# define REG "{t5}" +/* { dg-final { scan-assembler-times "foo\tt5" 1 { target { riscv*-*-* } } } } */ +#elif defined (__s390__) +# define REG "{r4}" +/* { dg-final { scan-assembler-times "foo\t%r4" 1 { target { s390*-*-* } } } } */ +#elif defined (__x86_64__) +# define REG "{xmm0}" +/* { dg-final { scan-assembler-times "foo\t%xmm0" 1 { target { x86_64-*-* } } } } */ +#endif + +void +test (void) +{ + __asm__ ("foo\t%0" :: REG ((__int128) 42)); +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-4.c b/gcc/testsuite/gcc.dg/asm-hard-reg-4.c new file mode 100644 index 0000000..0134bf0 --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-4.c @@ -0,0 +1,50 @@ +/* { dg-do compile { target aarch64*-*-* arm*-*-* powerpc*-*-* riscv*-*-* s390*-*-* x86_64-*-* } } */ + +#if defined (__aarch64__) +# define FPR "{d5}" +/* { dg-final { scan-assembler-times "foo\tv5" 4 { target { aarch64*-*-* } } } } */ +#elif defined (__arm__) +# define FPR "{d5}" +/* { dg-additional-options "-march=armv7-a+fp -mfloat-abi=hard" { target arm*-*-* } } */ +/* { dg-final { scan-assembler-times "foo\ts10" 4 { target { arm*-*-* } } } } */ +#elif defined (__powerpc__) || defined (__POWERPC__) +# define FPR "{5}" +/* { dg-final { scan-assembler-times "foo\t5" 4 { target { powerpc*-*-* } } } } */ +#elif defined (__riscv) +# define FPR "{fa5}" +/* { dg-final { scan-assembler-times "foo\tfa5" 4 { target { rsicv*-*-* } } } } */ +#elif defined (__s390__) +# define FPR "{f5}" +/* { dg-final { scan-assembler-times "foo\t%f5" 4 { target { s390*-*-* } } } } */ +#elif defined (__x86_64__) +# define FPR "{xmm5}" +/* { dg-final { scan-assembler-times "foo\t%xmm5" 4 { target { x86_64-*-* } } } } */ +#endif + +float +test_float (float x) +{ + __asm__ ("foo\t%0" : "+"FPR (x)); + return x; +} + +float +test_float_from_mem (float *x) +{ + __asm__ ("foo\t%0" : "+"FPR (*x)); + return *x; +} + +double +test_double (double x) +{ + __asm__ ("foo\t%0" : "+"FPR (x)); + return x; +} + +double +test_double_from_mem (double *x) +{ + __asm__ ("foo\t%0" : "+"FPR (*x)); + return *x; +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-5.c b/gcc/testsuite/gcc.dg/asm-hard-reg-5.c new file mode 100644 index 0000000..a9e25ce --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-5.c @@ -0,0 +1,36 @@ +/* { dg-do compile { target aarch64*-*-* powerpc64*-*-* riscv64-*-* s390*-*-* x86_64-*-* } } */ + +typedef int V __attribute__ ((vector_size (4 * sizeof (int)))); + +#if defined (__aarch64__) +# define VR "{v20}" +/* { dg-final { scan-assembler-times "foo\tv20" 2 { target { aarch64*-*-* } } } } */ +#elif defined (__powerpc__) || defined (__POWERPC__) +# define VR "{v5}" +/* { dg-final { scan-assembler-times "foo\t5" 2 { target { powerpc64*-*-* } } } } */ +#elif defined (__riscv) +# define VR "{v5}" +/* { dg-additional-options "-march=rv64imv" { target riscv64-*-* } } */ +/* { dg-final { scan-assembler-times "foo\tv5" 2 { target { riscv*-*-* } } } } */ +#elif defined (__s390__) +# define VR "{v5}" +/* { dg-require-effective-target s390_mvx { target s390*-*-* } } */ +/* { dg-final { scan-assembler-times "foo\t%v5" 2 { target s390*-*-* } } } */ +#elif defined (__x86_64__) +# define VR "{xmm9}" +/* { dg-final { scan-assembler-times "foo\t%xmm9" 2 { target { x86_64-*-* } } } } */ +#endif + +V +test (V x) +{ + __asm__ ("foo\t%0" : "+"VR (x)); + return x; +} + +V +test_from_mem (V *x) +{ + __asm__ ("foo\t%0" : "+"VR (*x)); + return *x; +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-6.c b/gcc/testsuite/gcc.dg/asm-hard-reg-6.c new file mode 100644 index 0000000..d9b7fae --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-6.c @@ -0,0 +1,60 @@ +/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-* riscv*-*-* s390*-*-* x86_64-*-* } } */ +/* { dg-options "-O2" } */ + +/* Test multiple alternatives. */ + +#if defined (__aarch64__) +# define GPR1 "{x1}" +# define GPR2 "{x2}" +# define GPR3 "{x3}" +/* { dg-final { scan-assembler-times "foo\tx1,x3" 1 { target { aarch64*-*-* } } } } */ +/* { dg-final { scan-assembler-times "bar\tx2,\\\[x1\\\]" 1 { target { aarch64*-*-* } } } } */ +#elif defined (__arm__) +# define GPR1 "{r1}" +# define GPR2 "{r2}" +# define GPR3 "{r3}" +/* { dg-final { scan-assembler-times "foo\tr1,r3" 1 { target { arm*-*-* } } } } */ +/* { dg-final { scan-assembler-times "bar\tr2,\\\[r1\\\]" 1 { target { arm*-*-* } } } } */ +#elif defined (__i386__) +# define GPR1 "{eax}" +# define GPR2 "{ebx}" +# define GPR3 "{ecx}" +/* { dg-final { scan-assembler-times "foo\t4\\(%esp\\),%ecx" 1 { target { i?86-*-* } } } } */ +/* { dg-final { scan-assembler-times "bar\t%ebx,\\(%eax\\)" 1 { target { i?86-*-* } } } } */ +#elif defined (__powerpc__) || defined (__POWERPC__) +# define GPR1 "{r4}" +# define GPR2 "{r5}" +# define GPR3 "{r6}" +/* { dg-final { scan-assembler-times "foo\t4,6" 1 { target { powerpc*-*-* } } } } */ +/* { dg-final { scan-assembler-times "bar\t5,0\\(4\\)" 1 { target { powerpc*-*-* } } } } */ +#elif defined (__riscv) +# define GPR1 "{t1}" +# define GPR2 "{t2}" +# define GPR3 "{t3}" +/* { dg-final { scan-assembler-times "foo\tt1,t3" 1 { target { riscv*-*-* } } } } */ +/* { dg-final { scan-assembler-times "bar\tt2,0\\(a1\\)" 1 { target { riscv*-*-* } } } } */ +#elif defined (__s390__) +# define GPR1 "{r0}" +# define GPR2 "{r1}" +# define GPR3 "{r2}" +/* { dg-final { scan-assembler-times "foo\t%r0,%r2" 1 { target { s390*-*-* } } } } */ +/* { dg-final { scan-assembler-times "bar\t%r1,0\\(%r3\\)" 1 { target { s390*-*-* } } } } */ +#elif defined (__x86_64__) +# define GPR1 "{eax}" +# define GPR2 "{ebx}" +# define GPR3 "{rcx}" +/* { dg-final { scan-assembler-times "foo\t%eax,%rcx" 1 { target { x86_64-*-* } } } } */ +/* { dg-final { scan-assembler-times "bar\t%ebx,\\(%rsi\\)" 1 { target { x86_64-*-* } } } } */ +#endif + +void +test_reg_reg (int x, long long *y) +{ + __asm__ ("foo\t%0,%1" :: GPR1"m,"GPR2 (x), GPR3",m" (y)); +} + +void +test_reg_mem (int x, long long *y) +{ + __asm__ ("bar\t%0,%1" :: GPR1"m,"GPR2 (x), GPR3",m" (*y)); +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-7.c b/gcc/testsuite/gcc.dg/asm-hard-reg-7.c new file mode 100644 index 0000000..761a6b7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-7.c @@ -0,0 +1,41 @@ +/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-* riscv*-*-* s390*-*-* x86_64-*-* } } */ +/* { dg-options "-O2" } */ + +/* Test multiple alternatives. */ + +#if defined (__aarch64__) +# define GPR "{x1}" +/* { dg-final { scan-assembler-times "foo\tx1,x1" 2 { target { aarch64*-*-* } } } } */ +#elif defined (__arm__) +# define GPR "{r1}" +/* { dg-final { scan-assembler-times "foo\tr1,r1" 2 { target { arm*-*-* } } } } */ +#elif defined (__i386__) +# define GPR "{eax}" +/* { dg-final { scan-assembler-times "foo\t%eax,%eax" 2 { target { i?86-*-* } } } } */ +#elif defined (__powerpc__) || defined (__POWERPC__) +# define GPR "{r4}" +/* { dg-final { scan-assembler-times "foo\t4,4" 2 { target { powerpc*-*-* } } } } */ +#elif defined (__riscv) +# define GPR "{t1}" +/* { dg-final { scan-assembler-times "foo\tt1,t1" 2 { target { riscv*-*-* } } } } */ +#elif defined (__s390__) +# define GPR "{r0}" +/* { dg-final { scan-assembler-times "foo\t%r0,%r0" 2 { target { s390*-*-* } } } } */ +#elif defined (__x86_64__) +# define GPR "{eax}" +/* { dg-final { scan-assembler-times "foo\t%eax,%eax" 2 { target { x86_64-*-* } } } } */ +#endif + +int +test_1 (int x) +{ + __asm__ ("foo\t%0,%0" : "+"GPR (x)); + return x; +} + +int +test_2 (int x, int y) +{ + __asm__ ("foo\t%0,%1" : "="GPR (x) : GPR (y)); + return x; +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-8.c b/gcc/testsuite/gcc.dg/asm-hard-reg-8.c new file mode 100644 index 0000000..cda5e3e --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-8.c @@ -0,0 +1,49 @@ +/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-* riscv*-*-* s390*-*-* x86_64-*-* } } */ + +/* Due to hard register constraints, X must be copied. */ + +#if defined (__aarch64__) +# define GPR1 "{x1}" +# define GPR2 "{x2}" +#elif defined (__arm__) +# define GPR1 "{r1}" +# define GPR2 "{r2}" +#elif defined (__i386__) +# define GPR1 "{eax}" +# define GPR2 "{ebx}" +#elif defined (__powerpc__) || defined (__POWERPC__) +# define GPR1 "{r4}" +# define GPR2 "{r5}" +#elif defined (__riscv) +# define GPR1 "{t1}" +# define GPR2 "{t2}" +#elif defined (__s390__) +# define GPR1 "{r0}" +# define GPR2 "{r1}" +#elif defined (__x86_64__) +# define GPR1 "{eax}" +# define GPR2 "{ebx}" +#endif + +#define TEST(T) \ +int \ +test_##T (T x) \ +{ \ + int out; \ + __asm__ ("foo" : "=r" (out) : GPR1 (x), GPR2 (x)); \ + return out; \ +} + +TEST(char) +TEST(short) +TEST(int) +TEST(long) + +int +test_subreg (long x) +{ + int out; + short subreg_x = x; + __asm__ ("foo" : "=r" (out) : GPR1 (x), GPR2 (subreg_x)); + return out; +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-error-1.c b/gcc/testsuite/gcc.dg/asm-hard-reg-error-1.c new file mode 100644 index 0000000..0d7c2f2 --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-error-1.c @@ -0,0 +1,83 @@ +/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-* riscv*-*-* s390*-*-* x86_64-*-* } } */ + +#if defined (__aarch64__) +# define GPR1_RAW "x0" +# define GPR2 "{x1}" +# define GPR3 "{x2}" +# define INVALID_GPR_A "{x31}" +#elif defined (__arm__) +# define GPR1_RAW "r0" +# define GPR2 "{r1}" +# define GPR3 "{r2}" +# define INVALID_GPR_A "{r16}" +#elif defined (__i386__) +# define GPR1_RAW "%eax" +# define GPR2 "{%ebx}" +# define GPR3 "{%edx}" +# define INVALID_GPR_A "{%eex}" +#elif defined (__powerpc__) || defined (__POWERPC__) +# define GPR1_RAW "r4" +# define GPR2 "{r5}" +# define GPR3 "{r6}" +# define INVALID_GPR_A "{r33}" +#elif defined (__riscv) +# define GPR1_RAW "t4" +# define GPR2 "{t5}" +# define GPR3 "{t6}" +# define INVALID_GPR_A "{t7}" +#elif defined (__s390__) +# define GPR1_RAW "r4" +# define GPR2 "{r5}" +# define GPR3 "{r6}" +# define INVALID_GPR_A "{r17}" +#elif defined (__x86_64__) +# define GPR1_RAW "rax" +# define GPR2 "{rbx}" +# define GPR3 "{rcx}" +# define INVALID_GPR_A "{rex}" +#endif + +#define GPR1 "{"GPR1_RAW"}" +#define INVALID_GPR_B "{"GPR1_RAW + +struct { int a[128]; } s = {0}; + +void +test (void) +{ + int x, y; + register int gpr1 __asm__ (GPR1_RAW) = 0; + + __asm__ ("" :: "{}" (42)); /* { dg-error "invalid input constraint: \{\}" } */ + __asm__ ("" :: INVALID_GPR_A (42)); /* { dg-error "invalid input constraint" } */ + __asm__ ("" :: INVALID_GPR_B (42)); /* { dg-error "invalid input constraint" } */ + + __asm__ ("" :: GPR1 (s)); /* { dg-error "data type isn't suitable for register .* of operand 0" } */ + + __asm__ ("" :: "r" (gpr1), GPR1 (42)); /* { dg-error "multiple inputs to hard register" } */ + __asm__ ("" :: GPR1 (42), "r" (gpr1)); /* { dg-error "multiple inputs to hard register" } */ + __asm__ ("" :: GPR1 (42), GPR1 (42)); /* { dg-error "multiple inputs to hard register" } */ + __asm__ ("" :: GPR1","GPR2 (42), GPR2","GPR3 (42)); + __asm__ ("" :: GPR1","GPR2 (42), GPR3","GPR2 (42)); /* { dg-error "multiple inputs to hard register" } */ + __asm__ ("" :: GPR1","GPR2 (42), GPR1","GPR3 (42)); /* { dg-error "multiple inputs to hard register" } */ + __asm__ ("" :: GPR1 GPR2 (42), GPR2 (42)); /* { dg-error "multiple inputs to hard register" } */ + __asm__ ("" : "+"GPR1 (x), "="GPR1 (y)); /* { dg-error "multiple outputs to hard register" } */ + __asm__ ("" : "="GPR1 (y) : GPR1 (42), "0" (42)); /* { dg-error "multiple inputs to hard register" } */ + __asm__ ("" : "+"GPR1 (x) : GPR1 (42)); /* { dg-error "multiple inputs to hard register" } */ + + __asm__ ("" : "="GPR1 (gpr1)); + __asm__ ("" : "="GPR2 (gpr1)); /* { dg-error "constraint and register 'asm' for output operand 0 are unsatisfiable" } */ + __asm__ ("" :: GPR2 (gpr1)); /* { dg-error "constraint and register 'asm' for input operand 0 are unsatisfiable" } */ + __asm__ ("" : "="GPR1 (x) : "0" (gpr1)); + __asm__ ("" : "="GPR1 GPR2 (x) : "0" (gpr1)); /* { dg-error "constraint and register 'asm' for input operand 0 are unsatisfiable" } */ + + __asm__ ("" : "=&"GPR1 (x) : "0" (gpr1)); + __asm__ ("" : "=&"GPR1 (x) : "0" (42)); + __asm__ ("" : "=&"GPR2","GPR1 (x) : "r,"GPR1 (42)); + __asm__ ("" : "="GPR2",&"GPR1 (x) : "r,"GPR1 (42)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */ + __asm__ ("" : "=&"GPR1 (x) : GPR1 (42)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */ + __asm__ ("" : "=&"GPR2","GPR1 (x) : "r,r" (gpr1)); + __asm__ ("" : "="GPR2",&"GPR1 (x) : "r,r" (gpr1)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */ + __asm__ ("" : "=&r" (gpr1) : GPR1 (42)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */ + __asm__ ("" : "=&"GPR1 (x), "=r" (y) : "1" (gpr1)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */ +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-error-2.c b/gcc/testsuite/gcc.dg/asm-hard-reg-error-2.c new file mode 100644 index 0000000..d0d5cfe --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-error-2.c @@ -0,0 +1,26 @@ +/* { dg-do compile { target { { aarch64*-*-* s390x-*-* } && int128 } } } */ +/* { dg-options "-O2" } get rid of -ansi since we use __int128 */ + +/* Test register pairs. */ + +#if defined (__aarch64__) +# define GPR1 "{x4}" +# define GPR2_RAW "x5" +#elif defined (__s390__) +# define GPR1 "{r4}" +# define GPR2_RAW "r5" +#endif + +#define GPR2 "{"GPR2_RAW"}" + +void +test (void) +{ + __asm__ ("" :: GPR1 ((__int128) 42)); + __asm__ ("" :: GPR2 ((__int128) 42)); /* { dg-error "register .* for operand 0 isn't suitable for data type" } */ + __asm__ ("" :: GPR1 ((__int128) 42), GPR2 (42)); /* { dg-error "multiple inputs to hard register" } */ + + __int128 x; + __asm__ ("" : "="GPR1 (x) :: GPR2_RAW); /* { dg-error "hard register constraint for output 0 conflicts with 'asm' clobber list" } */ + __asm__ ("" : "=r" (x) : GPR1 (x) : GPR2_RAW); /* { dg-error "hard register constraint for input 0 conflicts with 'asm' clobber list" } */ +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-error-3.c b/gcc/testsuite/gcc.dg/asm-hard-reg-error-3.c new file mode 100644 index 0000000..17b2317 --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-error-3.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target arm-*-* s390-*-* } } */ +/* { dg-options "-std=c99" } we need long long */ +/* { dg-additional-options "-march=armv7-a" { target arm-*-* } } */ + +/* Test register pairs. */ + +#if defined (__arm__) +# define GPR1 "{r4}" +# define GPR2_RAW "r5" +#elif defined (__s390__) +# define GPR1 "{r4}" +# define GPR2_RAW "r5" +#endif + +#define GPR2 "{"GPR2_RAW"}" + +void +test (void) +{ + __asm__ ("" :: GPR1 (42ll)); + __asm__ ("" :: GPR2 (42ll)); /* { dg-error "register .* for operand 0 isn't suitable for data type" } */ + __asm__ ("" :: GPR1 (42ll), GPR2 (42)); /* { dg-error "multiple inputs to hard register" } */ + + long long x; + __asm__ ("" : "="GPR1 (x) :: GPR2_RAW); /* { dg-error "hard register constraint for output 0 conflicts with 'asm' clobber list" } */ + __asm__ ("" : "=r" (x) : GPR1 (x) : GPR2_RAW); /* { dg-error "hard register constraint for input 0 conflicts with 'asm' clobber list" } */ +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c b/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c new file mode 100644 index 0000000..465f24b --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-error-4.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ + +/* Verify output operands. */ + +int +test (void) +{ + int x; + register int y __asm__ ("0"); + + /* Preserve status quo and don't error out. */ + __asm__ ("" : "=r" (x), "=r" (x)); + + /* Be more strict for hard register constraints and error out. */ + __asm__ ("" : "={0}" (x), "={1}" (x)); /* { dg-error "multiple outputs to lvalue 'x'" } */ + + /* Still error out in case of a mixture. */ + __asm__ ("" : "=r" (x), "={1}" (x)); /* { dg-error "multiple outputs to lvalue 'x'" } */ + + return x + y; +} diff --git a/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c b/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c new file mode 100644 index 0000000..85398f0 --- /dev/null +++ b/gcc/testsuite/gcc.dg/asm-hard-reg-error-5.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ + +/* Test clobbers. + See asm-hard-reg-error-{2,3}.c for tests involving register pairs. */ + +int +test (void) +{ + int x, y; + __asm__ ("" : "={0}" (x), "={1}" (y) : : "1"); /* { dg-error "hard register constraint for output 1 conflicts with 'asm' clobber list" } */ + __asm__ ("" : "={0}" (x) : "{0}" (y), "{1}" (y) : "1"); /* { dg-error "hard register constraint for input 1 conflicts with 'asm' clobber list" } */ + return x + y; +} diff --git a/gcc/testsuite/gcc.dg/bitint-124.c b/gcc/testsuite/gcc.dg/bitint-124.c new file mode 100644 index 0000000..160a1e3 --- /dev/null +++ b/gcc/testsuite/gcc.dg/bitint-124.c @@ -0,0 +1,30 @@ +/* PR tree-optimization/121131 */ +/* { dg-do run { target bitint } } */ +/* { dg-options "-O2" } */ + +#if __BITINT_MAXWIDTH__ >= 156 +struct A { _BitInt(156) b : 135; }; + +static inline _BitInt(156) +foo (struct A *x) +{ + return x[1].b; +} + +__attribute__((noipa)) _BitInt(156) +bar (void) +{ + struct A a[] = { 1, 1, -13055525270329736316393717310914023773847wb, + 1, 1, 1, 1, 1, 1, 1, 1, 1 }; + return foo (&a[1]); +} +#endif + +int +main () +{ +#if __BITINT_MAXWIDTH__ >= 156 + if (bar () != -13055525270329736316393717310914023773847wb) + __builtin_abort (); +#endif +} diff --git a/gcc/testsuite/gcc.dg/darwin-minversion-link.c b/gcc/testsuite/gcc.dg/darwin-minversion-link.c index af712a1b..55f7c7e 100644 --- a/gcc/testsuite/gcc.dg/darwin-minversion-link.c +++ b/gcc/testsuite/gcc.dg/darwin-minversion-link.c @@ -20,6 +20,7 @@ /* { dg-additional-options "-mmacosx-version-min=013.000.00 -DCHECK=130000" { target *-*-darwin22* } } */ /* { dg-additional-options "-mmacosx-version-min=014.000.00 -DCHECK=140000" { target *-*-darwin23* } } */ /* { dg-additional-options "-mmacosx-version-min=015.000.00 -DCHECK=150000" { target *-*-darwin24* } } */ +/* { dg-additional-options "-mmacosx-version-min=026.000.00 -DCHECK=260000" { target *-*-darwin25* } } */ int main () diff --git a/gcc/testsuite/gcc.dg/flex-array-counted-by-pr121000.c b/gcc/testsuite/gcc.dg/flex-array-counted-by-pr121000.c new file mode 100644 index 0000000..5b9a2c6 --- /dev/null +++ b/gcc/testsuite/gcc.dg/flex-array-counted-by-pr121000.c @@ -0,0 +1,43 @@ +/* PR middle-end/121000 */ +/* { dg-do run } */ +/* { dg-options "-O" } */ + +#include "builtin-object-size-common.h" + +/* The parameter m must be const qualified to avoid the m is + marked as TREE_SIDE_EFFECTS in IR. + The __builtin_dynamic_object_size will be folded as -1 by + fold_builtin_object_size when m is NOT const qualified. */ + +void +foo (int n, const int m) +{ + typedef int A[m]; + struct S { int n, m; A a[2]; A b[] __attribute__((counted_by (n))); } *p; + p = __builtin_malloc (sizeof (struct S) + sizeof (A) * n); + p->n = n; + p->m = m; + EXPECT (__builtin_dynamic_object_size (p->b, 1), sizeof (A) * n); +} + +/* The parameter m1, m2 must be const qualified to avoid the m is + marked as TREE_SIDE_EFFECTS in IR. + The __builtin_dynamic_object_size will be folded as -1 by + fold_builtin_object_size when m1 or m2 is NOT const qualified. */ +void +foo_1 (int n, const int m1, const int m2) +{ + typedef int A[m1][m2]; + struct S { int n; A a[2]; A b[] __attribute__((counted_by (n))); } *p; + p = __builtin_malloc (sizeof (struct S) + sizeof (A) * n); + p->n = n; + EXPECT (__builtin_dynamic_object_size (p->b, 1), sizeof (A) * n); +} + +int +main () +{ + foo (2, 10); + foo_1 (2, 10, 20); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/memchr-3.c b/gcc/testsuite/gcc.dg/memchr-3.c index 9a35735..9caa2ac 100644 --- a/gcc/testsuite/gcc.dg/memchr-3.c +++ b/gcc/testsuite/gcc.dg/memchr-3.c @@ -17,9 +17,10 @@ struct SX const struct SX sx = { 0x1221 }; const char sx_rep[] = { }; -void test_find (void) +int test_find (void) { int n = 0, nb = (const char*)&sx.a - (const char*)&sx; const char *p = (const char*)&sx, *q = sx_rep; n += p + 1 == memchr (p, q[1], nb); + return n; } diff --git a/gcc/testsuite/gcc.dg/nest.c b/gcc/testsuite/gcc.dg/nest.c index 5734c11..2dce65e 100644 --- a/gcc/testsuite/gcc.dg/nest.c +++ b/gcc/testsuite/gcc.dg/nest.c @@ -3,6 +3,7 @@ /* { dg-require-profiling "-pg" } */ /* { dg-options "-O2 -pg" } */ /* { dg-options "-O2 -pg -static" { target hppa*-*-hpux* } } */ +/* { dg-additional-options "-mfentry -fno-pic" { target i?86-*-gnu* x86_64-*-gnu* } } */ /* { dg-error "profiler" "No profiler support" { target xstormy16-*-* } 0 } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/plugin/analyzer_cpython_plugin.cc b/gcc/testsuite/gcc.dg/plugin/analyzer_cpython_plugin.cc index 1fe5b5c..01ab766 100644 --- a/gcc/testsuite/gcc.dg/plugin/analyzer_cpython_plugin.cc +++ b/gcc/testsuite/gcc.dg/plugin/analyzer_cpython_plugin.cc @@ -23,8 +23,8 @@ #include "target.h" #include "fold-const.h" #include "tree-pretty-print.h" -#include "diagnostic-color.h" -#include "diagnostic-metadata.h" +#include "diagnostics/color.h" +#include "diagnostics/metadata.h" #include "tristate.h" #include "bitmap.h" #include "selftest.h" diff --git a/gcc/testsuite/gcc.dg/plugin/analyzer_gil_plugin.cc b/gcc/testsuite/gcc.dg/plugin/analyzer_gil_plugin.cc index fa2f2fa..c101c45 100644 --- a/gcc/testsuite/gcc.dg/plugin/analyzer_gil_plugin.cc +++ b/gcc/testsuite/gcc.dg/plugin/analyzer_gil_plugin.cc @@ -16,7 +16,7 @@ #include "gimple.h" #include "gimple-iterator.h" #include "gimple-walk.h" -#include "diagnostic-event-id.h" +#include "diagnostics/event-id.h" #include "analyzer/common.h" #include "analyzer/analyzer-logging.h" #include "json.h" @@ -120,20 +120,22 @@ public: return false; } - diagnostic_event::meaning + diagnostics::paths::event::meaning get_meaning_for_state_change (const evdesc::state_change &change) const final override { + using event = diagnostics::paths::event; + if (change.is_global_p ()) { if (change.m_new_state == m_sm.m_released_gil) - return diagnostic_event::meaning (diagnostic_event::verb::release, - diagnostic_event::noun::lock); + return event::meaning (event::verb::release, + event::noun::lock); else if (change.m_new_state == m_sm.get_start_state ()) - return diagnostic_event::meaning (diagnostic_event::verb::acquire, - diagnostic_event::noun::lock); + return event::meaning (event::verb::acquire, + event::noun::lock); } - return diagnostic_event::meaning (); + return event::meaning (); } protected: gil_diagnostic (const gil_state_machine &sm) : m_sm (sm) diff --git a/gcc/testsuite/gcc.dg/plugin/analyzer_kernel_plugin.cc b/gcc/testsuite/gcc.dg/plugin/analyzer_kernel_plugin.cc index 18e054b..fc282a7 100644 --- a/gcc/testsuite/gcc.dg/plugin/analyzer_kernel_plugin.cc +++ b/gcc/testsuite/gcc.dg/plugin/analyzer_kernel_plugin.cc @@ -23,8 +23,8 @@ #include "target.h" #include "fold-const.h" #include "tree-pretty-print.h" -#include "diagnostic-color.h" -#include "diagnostic-metadata.h" +#include "diagnostics/color.h" +#include "diagnostics/metadata.h" #include "tristate.h" #include "bitmap.h" #include "selftest.h" diff --git a/gcc/testsuite/gcc.dg/plugin/analyzer_known_fns_plugin.cc b/gcc/testsuite/gcc.dg/plugin/analyzer_known_fns_plugin.cc index 5a6e075..44fcf37 100644 --- a/gcc/testsuite/gcc.dg/plugin/analyzer_known_fns_plugin.cc +++ b/gcc/testsuite/gcc.dg/plugin/analyzer_known_fns_plugin.cc @@ -23,8 +23,8 @@ #include "target.h" #include "fold-const.h" #include "tree-pretty-print.h" -#include "diagnostic-color.h" -#include "diagnostic-metadata.h" +#include "diagnostics/color.h" +#include "diagnostics/metadata.h" #include "tristate.h" #include "bitmap.h" #include "selftest.h" diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-html.c b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-html.c new file mode 100644 index 0000000..2256a63 --- /dev/null +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-html.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-fdiagnostics-add-output=experimental-html:javascript=no" } */ + +extern void here (void); + +void test_graphs (void) +{ + here (); /* { dg-error "this is a placeholder error, with graphs" } */ +} + +/* Use a Python script to verify various properties about the generated + HTML file: + { dg-final { run-html-pytest diagnostic-test-graphs-html.c "diagnostic-test-graphs-html.py" } } */ diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-html.py b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-html.py new file mode 100644 index 0000000..11e5fd1 --- /dev/null +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-html.py @@ -0,0 +1,48 @@ +# Verify that metadata works in HTML output. + +from htmltest import * + +import pytest + +@pytest.fixture(scope='function', autouse=True) +def html_tree(): + return html_tree_from_env() + +def test_result_graph(html_tree): + root = html_tree.getroot () + assert root.tag == make_tag('html') + + body = root.find('xhtml:body', ns) + assert body is not None + + diag_list = body.find('xhtml:div', ns) + assert diag_list is not None + assert diag_list.attrib['class'] == 'gcc-diagnostic-list' + + diag = diag_list.find('xhtml:div', ns) + assert diag is not None + + message = diag.find("./xhtml:div[@class='gcc-message']", ns) + assert message.attrib['id'] == 'gcc-diag-0-message' + + assert message[0].tag == make_tag('strong') + assert message[0].tail == ' this is a placeholder error, with graphs ' + + graph = diag.find("./xhtml:div[@class='gcc-directed-graph']", ns) + assert graph is not None + + header = graph.find("./xhtml:h2", ns) + assert header.text == 'foo' + +def test_run_graph(html_tree): + root = html_tree.getroot () + assert root.tag == make_tag('html') + + body = root.find('xhtml:body', ns) + assert body is not None + + graph = body.find("./xhtml:div[@class='gcc-directed-graph']", ns) + assert graph is not None + + header = graph.find("./xhtml:h2", ns) + assert header.text == 'Optimization Passes' diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-sarif.c b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-sarif.c new file mode 100644 index 0000000..4170f51 --- /dev/null +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-sarif.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-fdiagnostics-add-output=sarif" } */ + +extern void here (void); + +void test_graphs (void) +{ + here (); /* { dg-error "this is a placeholder error, with graphs" } */ +} + +/* Verify that some JSON was written to a file with the expected name. */ +/* { dg-final { verify-sarif-file } } */ + +/* Use a Python script to verify various properties about the generated + .sarif file: + { dg-final { run-sarif-pytest diagnostic-test-graphs-sarif.c "diagnostic-test-graphs-sarif.py" } } */ diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-sarif.py b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-sarif.py new file mode 100644 index 0000000..4bb7535 --- /dev/null +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-sarif.py @@ -0,0 +1,55 @@ +from sarif import * + +import pytest + +@pytest.fixture(scope='function', autouse=True) +def sarif(): + return sarif_from_env() + +def test_basics(sarif): + schema = sarif['$schema'] + assert schema == "https://docs.oasis-open.org/sarif/sarif/v2.1.0/errata01/os/schemas/sarif-schema-2.1.0.json" + + version = sarif['version'] + assert version == "2.1.0" + +def test_result_graph(sarif): + runs = sarif['runs'] + run = runs[0] + results = run['results'] + + assert len(results) == 1 + + result = results[0] + assert result['level'] == 'error' + assert result['message']['text'] == "this is a placeholder error, with graphs" + + assert len(result['graphs']) == 2 + + assert result['graphs'][0]['description']['text'] == 'foo' + + assert len(result['graphs'][0]['nodes']) == 2 + assert result['graphs'][0]['nodes'][0]['id'] == 'a' + assert result['graphs'][0]['nodes'][1]['id'] == 'b' + assert result['graphs'][0]['nodes'][1]['properties']['/placeholder-prefix/color'] == 'red' + assert len(result['graphs'][0]['nodes'][1]['children']) == 1 + assert result['graphs'][0]['nodes'][1]['children'][0]['id'] == 'c' + assert result['graphs'][0]['nodes'][1]['children'][0]['label']['text'] == 'I am a node label' + + assert len(result['graphs'][0]['edges']) == 1 + result['graphs'][0]['edges'][0]['id'] == 'my-edge' + assert result['graphs'][0]['edges'][0]['label']['text'] == 'I am an edge label' + assert result['graphs'][0]['edges'][0]['sourceNodeId'] == 'a' + assert result['graphs'][0]['edges'][0]['targetNodeId'] == 'c' + + assert result['graphs'][1]['description']['text'] == 'bar' + +def test_run_graph(sarif): + runs = sarif['runs'] + run = runs[0] + + assert len(run['graphs']) == 1 + + assert run['graphs'][0]['description']['text'] == 'Optimization Passes' + assert run['graphs'][0]['nodes'][0]['id'] == 'all_lowering_passes' + assert run['graphs'][0]['edges'][0]['id'] == 'edge0' diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs.c b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs.c new file mode 100644 index 0000000..7973954 --- /dev/null +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ + +extern void here (void); + +void test_graphs (void) +{ + here (); /* { dg-error "this is a placeholder error, with graphs" } */ +} diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic-test-show-locus.py b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-show-locus.py index aca1b6c..eaca35a 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic-test-show-locus.py +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic-test-show-locus.py @@ -1,4 +1,4 @@ -# Verify that diagnostic-show-locus.cc works with HTML output. +# Verify that diagnostics/source-printing.cc works with HTML output. from htmltest import * diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_group_plugin.cc b/gcc/testsuite/gcc.dg/plugin/diagnostic_group_plugin.cc index 4ade232..48f8325 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_group_plugin.cc +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_group_plugin.cc @@ -27,7 +27,7 @@ #include "plugin-version.h" #include "c-family/c-common.h" #include "diagnostic.h" -#include "diagnostic-format-text.h" +#include "diagnostics/text-sink.h" #include "context.h" int plugin_is_GPL_compatible; @@ -165,8 +165,8 @@ pass_test_groups::execute (function *fun) expected output. */ void -test_diagnostic_text_starter (diagnostic_text_output_format &text_output, - const diagnostic_info *diagnostic) +test_diagnostic_text_starter (diagnostics::text_sink &text_output, + const diagnostics::diagnostic_info *diagnostic) { pp_set_prefix (text_output.get_printer (), xstrdup ("PREFIX: ")); } @@ -175,22 +175,22 @@ test_diagnostic_text_starter (diagnostic_text_output_format &text_output, expected output. */ void -test_diagnostic_start_span_fn (const diagnostic_location_print_policy &, - to_text &sink, +test_diagnostic_start_span_fn (const diagnostics::location_print_policy &, + diagnostics::to_text &sink, expanded_location) { - pretty_printer *pp = get_printer (sink); + pretty_printer *pp = diagnostics::get_printer (sink); pp_string (pp, "START_SPAN_FN: "); pp_newline (pp); } -/* Custom output format subclass. */ +/* Custom text_sink subclass. */ -class test_output_format : public diagnostic_text_output_format +class custom_test_sink : public diagnostics::text_sink { public: - test_output_format (diagnostic_context &context) - : diagnostic_text_output_format (context) + custom_test_sink (diagnostics::context &context) + : diagnostics::text_sink (context) {} void on_begin_group () final override @@ -228,10 +228,9 @@ plugin_init (struct plugin_name_args *plugin_info, if (!plugin_default_version_check (version, &gcc_version)) return 1; - diagnostic_text_starter (global_dc) = test_diagnostic_text_starter; - diagnostic_start_span (global_dc) = test_diagnostic_start_span_fn; - global_dc->set_output_format - (::std::make_unique<test_output_format> (*global_dc)); + diagnostics::text_starter (global_dc) = test_diagnostic_text_starter; + diagnostics::start_span (global_dc) = test_diagnostic_start_span_fn; + global_dc->set_sink (::std::make_unique<custom_test_sink> (*global_dc)); pass_info.pass = new pass_test_groups (g); pass_info.reference_pass_name = "*warn_function_noreturn"; diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_show_trees.cc b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_show_trees.cc index 44b94da..7e34a42 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_show_trees.cc +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_show_trees.cc @@ -115,7 +115,7 @@ plugin_init (struct plugin_name_args *plugin_info, if (!plugin_default_version_check (version, &gcc_version)) return 1; - global_dc->m_source_printing.max_width = 80; + global_dc->get_source_printing_options ().max_width = 80; register_callback (plugin_name, PLUGIN_PRE_GENERICIZE, diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_graphs.cc b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_graphs.cc new file mode 100644 index 0000000..7398a29 --- /dev/null +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_graphs.cc @@ -0,0 +1,283 @@ +/* This plugin exercises diagnostic graphs. + We emit an error with a pair of digraphs associated with it, + and a global digraph showing the optimization passes. */ + +#define INCLUDE_MAP +#define INCLUDE_STRING +#define INCLUDE_VECTOR +#include "gcc-plugin.h" +#include "config.h" +#include "system.h" +#include "coretypes.h" +#include "tm.h" +#include "tree.h" +#include "stringpool.h" +#include "toplev.h" +#include "basic-block.h" +#include "hash-table.h" +#include "vec.h" +#include "ggc.h" +#include "basic-block.h" +#include "tree-ssa-alias.h" +#include "internal-fn.h" +#include "gimple.h" +#include "gimple-iterator.h" +#include "gimple-fold.h" +#include "tree-eh.h" +#include "gimple-expr.h" +#include "is-a.h" +#include "tree.h" +#include "tree-pass.h" +#include "intl.h" +#include "plugin-version.h" +#include "diagnostic.h" +#include "context.h" +#include "gcc-rich-location.h" +#include "diagnostics/metadata.h" +#include "diagnostics/digraphs.h" +#include "pass_manager.h" + + +int plugin_is_GPL_compatible; + +const pass_data pass_data_test_graph_emission = +{ + GIMPLE_PASS, /* type */ + "test_graph_emission", /* name */ + OPTGROUP_NONE, /* optinfo_flags */ + TV_NONE, /* tv_id */ + PROP_ssa, /* properties_required */ + 0, /* properties_provided */ + 0, /* properties_destroyed */ + 0, /* todo_flags_start */ + 0, /* todo_flags_finish */ +}; + +class pass_test_graph_emission : public gimple_opt_pass +{ +public: + pass_test_graph_emission(gcc::context *ctxt) + : gimple_opt_pass(pass_data_test_graph_emission, ctxt) + {} + + /* opt_pass methods: */ + bool gate (function *) { return true; } + virtual unsigned int execute (function *); + +}; // class pass_test_graph_emission + +/* Determine if STMT is a call with NUM_ARGS arguments to a function + named FUNCNAME. + If so, return STMT as a gcall *. Otherwise return NULL. */ + +static gcall * +check_for_named_call (gimple *stmt, + const char *funcname, unsigned int num_args) +{ + gcc_assert (funcname); + + gcall *call = dyn_cast <gcall *> (stmt); + if (!call) + return NULL; + + tree fndecl = gimple_call_fndecl (call); + if (!fndecl) + return NULL; + + if (strcmp (IDENTIFIER_POINTER (DECL_NAME (fndecl)), funcname)) + return NULL; + + if (gimple_call_num_args (call) != num_args) + { + error_at (stmt->location, "expected number of args: %i (got %i)", + num_args, gimple_call_num_args (call)); + return NULL; + } + + return call; +} + +class lazy_passes_graph : public lazily_created<diagnostics::digraphs::digraph> +{ +public: + lazy_passes_graph (const ::gcc::pass_manager &pass_manager_) + : m_pass_manager (pass_manager_) + { + } + +private: + std::unique_ptr<diagnostics::digraphs::digraph> + create_object () const final override + { + auto g = std::make_unique<diagnostics::digraphs::digraph> (); + g->set_description ("Optimization Passes"); + +#define DEF_PASS_LIST(NAME) \ + add_top_level_pass_list (*g, #NAME, m_pass_manager.NAME); + + GCC_PASS_LISTS + +#undef DEF_PASS_LIST + + return g; + } + + void + add_top_level_pass_list (diagnostics::digraphs::digraph &g, + const char *pass_list_name, + const opt_pass *p) const + { + gcc_assert (p); + auto n = std::make_unique<diagnostics::digraphs::node> (g, pass_list_name); + n->set_label (pass_list_name); + add_child_pass (g, *n, *p); + g.add_node (std::move (n)); + } + + diagnostics::digraphs::node & + add_child_pass (diagnostics::digraphs::digraph &g, + diagnostics::digraphs::node &parent_node, + const opt_pass &p) const + { + std::string node_label; + std::string node_id; + if (p.static_pass_number > 0 ) + { + node_label = std::to_string (p.static_pass_number) + "_" + p.name; + node_id = node_label; + } + else + { + node_label = std::string (p.name); + pretty_printer pp; + pp_printf (&pp, "%s_%p", p.name, &p); + node_id = pp_formatted_text (&pp); + } + auto n + = std::make_unique<diagnostics::digraphs::node> (g, + std::move (node_id)); + n->set_label (node_label.c_str ()); + diagnostics::digraphs::node &result = *n; + parent_node.add_child (std::move (n)); + + // TODO: add attrs for things like type, properties_*, etc + + if (p.sub) + { + auto &other_node = add_child_pass (g, parent_node, *p.sub); + g.add_edge (nullptr, result, other_node, "sub"); + } + + if (p.next) + { + auto &other_node = add_child_pass (g, parent_node, *p.next); + g.add_edge (nullptr, result, other_node, "next"); + } + + return result; + } + + const ::gcc::pass_manager &m_pass_manager; +}; + +static void +report_diag_with_graphs (location_t loc) +{ + class my_lazy_digraphs : public diagnostics::metadata::lazy_digraphs + { + public: + using diagnostic_graph = diagnostics::digraphs::digraph; + using diagnostic_node = diagnostics::digraphs::node; + using diagnostic_edge = diagnostics::digraphs::edge; + + std::unique_ptr<std::vector<std::unique_ptr<diagnostic_graph>>> + create_object () const final override + { + auto graphs + = std::make_unique<std::vector<std::unique_ptr<diagnostic_graph>>> (); + + graphs->push_back (make_test_graph ("foo")); + graphs->push_back (make_test_graph ("bar")); + + return graphs; + } + + private: + std::unique_ptr<diagnostic_graph> + make_test_graph (const char *desc) const + { + auto g = std::make_unique<diagnostic_graph> (); + g->set_description (desc); + auto a = std::make_unique<diagnostic_node> (*g, "a"); + auto b = std::make_unique<diagnostic_node> (*g, "b"); +#define KEY_PREFIX "/placeholder-prefix/" + b->set_attr (KEY_PREFIX, "color", "red"); +#undef KEY_PREFIX + auto c = std::make_unique<diagnostic_node> (*g, "c"); + c->set_label ("I am a node label"); + + auto e = std::make_unique<diagnostic_edge> (*g, "my-edge", *a, *c); + e->set_label ("I am an edge label"); + g->add_edge (std::move (e)); + + g->add_node (std::move (a)); + + b->add_child (std::move (c)); + g->add_node (std::move (b)); + + return g; + } + }; + + gcc_rich_location rich_loc (loc); + diagnostics::metadata meta; + my_lazy_digraphs ldg; + meta.set_lazy_digraphs (&ldg); + error_meta (&rich_loc, meta, + "this is a placeholder error, with graphs"); +} + +/* Exercise diagnostic graph emission. */ + +unsigned int +pass_test_graph_emission::execute (function *fun) +{ + gimple_stmt_iterator gsi; + basic_block bb; + + FOR_EACH_BB_FN (bb, fun) + for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi)) + { + gimple *stmt = gsi_stmt (gsi); + + if (gcall *call = check_for_named_call (stmt, "here", 0)) + report_diag_with_graphs (gimple_location (call)); + } + + return 0; +} + +int +plugin_init (struct plugin_name_args *plugin_info, + struct plugin_gcc_version *version) +{ + struct register_pass_info pass_info; + const char *plugin_name = plugin_info->base_name; + int argc = plugin_info->argc; + struct plugin_argument *argv = plugin_info->argv; + + if (!plugin_default_version_check (version, &gcc_version)) + return 1; + + pass_info.pass = new pass_test_graph_emission (g); + pass_info.reference_pass_name = "ssa"; + pass_info.ref_pass_instance_number = 1; + pass_info.pos_op = PASS_POS_INSERT_AFTER; + register_callback (plugin_name, PLUGIN_PASS_MANAGER_SETUP, NULL, + &pass_info); + + gcc_assert (::g->get_passes ()); + global_dc->report_global_digraph (lazy_passes_graph (*::g->get_passes ())); + + return 0; +} diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_inlining.cc b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_inlining.cc index 7edce1f..d38538d 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_inlining.cc +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_inlining.cc @@ -169,7 +169,7 @@ plugin_init (struct plugin_name_args *plugin_info, if (!plugin_default_version_check (version, &gcc_version)) return 1; - global_dc->m_source_printing.max_width = 80; + global_dc->get_source_printing_options ().max_width = 80; pass_info.pass = new pass_test_inlining (g); pass_info.reference_pass_name = "*warn_function_noreturn"; diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_metadata.cc b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_metadata.cc index b86a8b3..f172258 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_metadata.cc +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_metadata.cc @@ -1,5 +1,6 @@ -/* This plugin exercises diagnostic_metadata. */ +/* This plugin exercises diagnostics::metadata. */ +#define INCLUDE_VECTOR #include "gcc-plugin.h" #include "config.h" #include "system.h" @@ -28,7 +29,7 @@ #include "diagnostic.h" #include "context.h" #include "gcc-rich-location.h" -#include "diagnostic-metadata.h" +#include "diagnostics/metadata.h" int plugin_is_GPL_compatible; @@ -89,7 +90,7 @@ check_for_named_call (gimple *stmt, return call; } -/* Exercise diagnostic_metadata. */ +/* Exercise diagnostics::metadata. */ unsigned int pass_test_metadata::execute (function *fun) @@ -106,13 +107,13 @@ pass_test_metadata::execute (function *fun) if (gcall *call = check_for_named_call (stmt, "gets", 1)) { gcc_rich_location richloc (gimple_location (call)); - diagnostic_metadata m; + diagnostics::metadata m; /* CWE-242: Use of Inherently Dangerous Function. */ m.add_cwe (242); - /* Example of a diagnostic_metadata::rule. */ - diagnostic_metadata::precanned_rule + /* Example of a diagnostics::metadata::rule. */ + diagnostics::metadata::precanned_rule test_rule ("STR34-C", "https://example.com/"); m.add_rule (test_rule); diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_paths.cc b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_paths.cc index a7963fa..875f4a8 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_paths.cc +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_paths.cc @@ -6,6 +6,7 @@ specific tests within the compiler's IR. We can't use any real diagnostics for this, so we have to fake it, hence this plugin. */ +#define INCLUDE_VECTOR #include "gcc-plugin.h" #include "config.h" #include "system.h" @@ -32,8 +33,7 @@ #include "intl.h" #include "plugin-version.h" #include "diagnostic.h" -#include "diagnostic-path.h" -#include "diagnostic-metadata.h" +#include "diagnostics/metadata.h" #include "context.h" #include "print-tree.h" #include "gcc-rich-location.h" @@ -223,7 +223,7 @@ class test_diagnostic_path : public simple_diagnostic_path diagnostic_event_id_t add_event_2 (event_location_t evloc, int stack_depth, const char *desc, - diagnostic_thread_id_t thread_id = 0) + diagnostics::paths::thread_id_t thread_id = 0) { gcc_assert (evloc.m_fun); return add_thread_event (thread_id, evloc.m_loc, evloc.m_fun->decl, @@ -232,7 +232,7 @@ class test_diagnostic_path : public simple_diagnostic_path diagnostic_event_id_t add_event_2_with_event_id (event_location_t evloc, int stack_depth, const char *fmt, - diagnostic_thread_id_t thread_id, + diagnostics::paths::thread_id_t thread_id, diagnostic_event_id_t event_id) { gcc_assert (evloc.m_fun); @@ -242,7 +242,7 @@ class test_diagnostic_path : public simple_diagnostic_path } void add_entry (event_location_t evloc, int stack_depth, const char *funcname, - diagnostic_thread_id_t thread_id = 0) + diagnostics::paths::thread_id_t thread_id = 0) { gcc_assert (evloc.m_fun); add_thread_event (thread_id, evloc.m_loc, evloc.m_fun->decl, stack_depth, @@ -363,7 +363,7 @@ example_2 () richloc.set_path (&path); - diagnostic_metadata m; + diagnostics::metadata m; m.add_cwe (415); /* CWE-415: Double Free. */ warning_meta (&richloc, m, 0, @@ -441,7 +441,7 @@ example_3 () richloc.set_path (&path); - diagnostic_metadata m; + diagnostics::metadata m; /* CWE-479: Signal Handler Use of a Non-reentrant Function. */ m.add_cwe (479); @@ -502,8 +502,8 @@ example_4 () gcc_rich_location richloc (call_to_acquire_lock_a_in_bar.m_loc); test_diagnostic_path path (global_dc->get_reference_printer ()); - diagnostic_thread_id_t thread_1 = path.add_thread ("Thread 1"); - diagnostic_thread_id_t thread_2 = path.add_thread ("Thread 2"); + diagnostics::paths::thread_id_t thread_1 = path.add_thread ("Thread 1"); + diagnostics::paths::thread_id_t thread_2 = path.add_thread ("Thread 2"); path.add_entry (entry_to_foo, 0, "foo", thread_1); diagnostic_event_id_t event_a_acquired = path.add_event_2 (call_to_acquire_lock_a_in_foo, 1, @@ -524,7 +524,7 @@ example_4 () thread_2, event_a_acquired); richloc.set_path (&path); - diagnostic_metadata m; + diagnostics::metadata m; warning_meta (&richloc, m, 0, "deadlock due to inconsistent lock acquisition order"); } @@ -559,7 +559,7 @@ plugin_init (struct plugin_name_args *plugin_info, if (!plugin_default_version_check (version, &gcc_version)) return 1; - global_dc->m_source_printing.max_width = 80; + global_dc->get_source_printing_options ().max_width = 80; pass_info.pass = make_pass_test_show_path (g); pass_info.reference_pass_name = "whole-program"; diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc index cd3834b..92839cd 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_show_locus.cc @@ -62,7 +62,8 @@ #include "print-tree.h" #include "gcc-rich-location.h" #include "text-range-label.h" -#include "diagnostic-format-text.h" +#include "diagnostics/text-sink.h" +#include "diagnostics/file-cache.h" int plugin_is_GPL_compatible; @@ -125,14 +126,14 @@ static bool force_show_locus_color = false; /* We want to verify the colorized output of diagnostic_show_locus, but turning on colorization for everything confuses "dg-warning" etc. Hence we special-case it within this plugin by using this modified - version of default_diagnostic_text_finalizer, which, if "color" is + version of diagnostics::default_text_finalizer, which, if "color" is passed in as a plugin argument turns on colorization, but just for diagnostic_show_locus. */ static void -custom_diagnostic_text_finalizer (diagnostic_text_output_format &text_output, - const diagnostic_info *diagnostic, - diagnostic_t) +custom_diagnostic_text_finalizer (diagnostics::text_sink &text_output, + const diagnostics::diagnostic_info *diag, + enum diagnostics::kind) { pretty_printer *const pp = text_output.get_printer (); bool old_show_color = pp_show_color (pp); @@ -143,7 +144,7 @@ custom_diagnostic_text_finalizer (diagnostic_text_output_format &text_output, pp_newline (pp); diagnostic_show_locus (&text_output.get_context (), text_output.get_source_printing_options (), - diagnostic->richloc, diagnostic->kind, pp); + diag->m_richloc, diag->m_kind, pp); pp_show_color (pp) = old_show_color; pp_set_prefix (pp, saved_prefix); pp_flush (pp); @@ -176,11 +177,11 @@ test_show_locus (function *fun) location_t fnstart = fun->function_start_locus; int fnstart_line = LOCATION_LINE (fnstart); - diagnostic_text_finalizer (global_dc) = custom_diagnostic_text_finalizer; + diagnostics::text_finalizer (global_dc) = custom_diagnostic_text_finalizer; /* Hardcode the "terminal width", to verify the behavior of very wide lines. */ - global_dc->m_source_printing.max_width = 71; + global_dc->get_source_printing_options ().max_width = 71; if (0 == strcmp (fnname, "test_simple")) { @@ -251,7 +252,7 @@ test_show_locus (function *fun) if (0 == strcmp (fnname, "test_very_wide_line")) { const int line = fnstart_line + 2; - global_dc->m_source_printing.show_ruler_p = true; + global_dc->get_source_printing_options ().show_ruler_p = true; text_range_label label0 ("label 0"); text_range_label label1 ("label 1"); rich_location richloc (line_table, @@ -263,7 +264,7 @@ test_show_locus (function *fun) &label1); richloc.add_fixit_replace ("bar * foo"); warning_at (&richloc, 0, "test"); - global_dc->m_source_printing.show_ruler_p = false; + global_dc->get_source_printing_options ().show_ruler_p = false; } /* Likewise, but with a secondary location that's immediately before @@ -271,7 +272,7 @@ test_show_locus (function *fun) if (0 == strcmp (fnname, "test_very_wide_line_2")) { const int line = fnstart_line + 2; - global_dc->m_source_printing.show_ruler_p = true; + global_dc->get_source_printing_options ().show_ruler_p = true; text_range_label label0 ("label 0"); text_range_label label1 ("label 1"); rich_location richloc (line_table, @@ -283,7 +284,7 @@ test_show_locus (function *fun) richloc.add_range (get_loc (line, 34), SHOW_RANGE_WITHOUT_CARET, &label1); warning_at (&richloc, 0, "test"); - global_dc->m_source_printing.show_ruler_p = false; + global_dc->get_source_printing_options ().show_ruler_p = false; } /* Example of multiple carets. */ @@ -294,11 +295,11 @@ test_show_locus (function *fun) location_t caret_b = get_loc (line, 11); rich_location richloc (line_table, caret_a); add_range (&richloc, caret_b, caret_b, SHOW_RANGE_WITH_CARET); - global_dc->m_source_printing.caret_chars[0] = 'A'; - global_dc->m_source_printing.caret_chars[1] = 'B'; + global_dc->get_source_printing_options ().caret_chars[0] = 'A'; + global_dc->get_source_printing_options ().caret_chars[1] = 'B'; warning_at (&richloc, 0, "test"); - global_dc->m_source_printing.caret_chars[0] = '^'; - global_dc->m_source_printing.caret_chars[1] = '^'; + global_dc->get_source_printing_options ().caret_chars[0] = '^'; + global_dc->get_source_printing_options ().caret_chars[1] = '^'; } /* Tests of rendering fixit hints. */ @@ -412,11 +413,11 @@ test_show_locus (function *fun) location_t caret_b = get_loc (line - 1, 19); rich_location richloc (line_table, caret_a); richloc.add_range (caret_b, SHOW_RANGE_WITH_CARET); - global_dc->m_source_printing.caret_chars[0] = '1'; - global_dc->m_source_printing.caret_chars[1] = '2'; + global_dc->get_source_printing_options ().caret_chars[0] = '1'; + global_dc->get_source_printing_options ().caret_chars[1] = '2'; warning_at (&richloc, 0, "test"); - global_dc->m_source_printing.caret_chars[0] = '^'; - global_dc->m_source_printing.caret_chars[1] = '^'; + global_dc->get_source_printing_options ().caret_chars[0] = '^'; + global_dc->get_source_printing_options ().caret_chars[1] = '^'; } /* Example of using the "%q+D" format code, which as well as printing @@ -443,8 +444,8 @@ test_show_locus (function *fun) rich_location richloc (line_table, loc); for (int line = start_line; line <= finish_line; line++) { - file_cache &fc = global_dc->get_file_cache (); - char_span content = fc.get_source_line (file, line); + diagnostics::file_cache &fc = global_dc->get_file_cache (); + diagnostics::char_span content = fc.get_source_line (file, line); gcc_assert (content); /* Split line up into words. */ for (int idx = 0; idx < content.length (); idx++) @@ -464,7 +465,8 @@ test_show_locus (function *fun) richloc.add_range (word, SHOW_RANGE_WITH_CARET, &label); /* Add a fixit, converting to upper case. */ - char_span word_span = content.subspan (start_idx, idx - start_idx); + diagnostics::char_span word_span + = content.subspan (start_idx, idx - start_idx); char *copy = word_span.xstrdup (); for (char *ch = copy; *ch; ch++) *ch = TOUPPER (*ch); diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_string_literals.cc b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_string_literals.cc index 1b5fad2..b64d60f 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_string_literals.cc +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_string_literals.cc @@ -208,7 +208,7 @@ plugin_init (struct plugin_name_args *plugin_info, if (!plugin_default_version_check (version, &gcc_version)) return 1; - global_dc->m_source_printing.max_width = 80; + global_dc->get_source_printing_options ().max_width = 80; pass_info.pass = new pass_test_string_literals (g); pass_info.reference_pass_name = "ssa"; diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_text_art.cc b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_text_art.cc index e28d697..ce2f1d3 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_text_art.cc +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_text_art.cc @@ -9,7 +9,7 @@ #include "coretypes.h" #include "plugin-version.h" #include "diagnostic.h" -#include "diagnostic-diagram.h" +#include "diagnostics/diagram.h" #include "text-art/canvas.h" #include "text-art/table.h" @@ -22,7 +22,7 @@ using namespace text_art; static void emit_canvas (const canvas &c, const char *alt_text) { - diagnostic_diagram diagram (c, alt_text); + diagnostics::diagram diagram (c, alt_text); global_dc->emit_diagram (diagram); } diff --git a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.cc b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.cc index fbdb2f8..bbd0faa 100644 --- a/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.cc +++ b/gcc/testsuite/gcc.dg/plugin/diagnostic_plugin_test_tree_expression_range.cc @@ -89,7 +89,7 @@ plugin_init (struct plugin_name_args *plugin_info, if (!plugin_default_version_check (version, &gcc_version)) return 1; - global_dc->m_source_printing.max_width = 130; + global_dc->get_source_printing_options ().max_width = 130; register_callback (plugin_name, PLUGIN_PRE_GENERICIZE, diff --git a/gcc/testsuite/gcc.dg/plugin/expensive_selftests_plugin.cc b/gcc/testsuite/gcc.dg/plugin/expensive_selftests_plugin.cc index 7b9b8d4..67722d4 100644 --- a/gcc/testsuite/gcc.dg/plugin/expensive_selftests_plugin.cc +++ b/gcc/testsuite/gcc.dg/plugin/expensive_selftests_plugin.cc @@ -6,9 +6,9 @@ #include "system.h" #include "coretypes.h" #include "diagnostic.h" -#include "edit-context.h" +#include "diagnostics/changes.h" #include "selftest.h" -#include "selftest-diagnostic.h" +#include "diagnostics/selftest-context.h" int plugin_is_GPL_compatible; @@ -47,14 +47,15 @@ static void test_richloc (rich_location *richloc) { /* Run the diagnostic and fix-it printing code. */ - test_diagnostic_context dc; - diagnostic_show_locus (&dc, dc.m_source_printing, - richloc, DK_ERROR, dc.get_reference_printer ()); + diagnostics::selftest::test_context dc; + diagnostic_show_locus (&dc, dc.get_source_printing_options (), + richloc, diagnostics::kind::error, + dc.get_reference_printer ()); /* Generate a diff. */ - edit_context ec (global_dc->get_file_cache ()); - ec.add_fixits (richloc); - char *diff = ec.generate_diff (true); + diagnostics::changes::change_set edit (global_dc->get_file_cache ()); + edit.add_fixits (richloc); + char *diff = edit.generate_diff (true); free (diff); } diff --git a/gcc/testsuite/gcc.dg/plugin/location_overflow_plugin.cc b/gcc/testsuite/gcc.dg/plugin/location_overflow_plugin.cc index f770d35..00ad870 100644 --- a/gcc/testsuite/gcc.dg/plugin/location_overflow_plugin.cc +++ b/gcc/testsuite/gcc.dg/plugin/location_overflow_plugin.cc @@ -7,7 +7,7 @@ #include "coretypes.h" #include "spellcheck.h" #include "diagnostic.h" -#include "diagnostic-format-text.h" +#include "diagnostics/text-sink.h" int plugin_is_GPL_compatible; @@ -39,12 +39,12 @@ on_pragma_registration (void */*gcc_data*/, void */*user_data*/) /* We add some extra testing during diagnostics by chaining up to the text finalizer. */ -static diagnostic_text_finalizer_fn original_text_finalizer = NULL; +static diagnostics::text_finalizer_fn original_text_finalizer = NULL; static void -verify_unpacked_ranges (diagnostic_text_output_format &text_output, - const diagnostic_info *diagnostic, - diagnostic_t orig_diag_kind) +verify_unpacked_ranges (diagnostics::text_sink &text_output, + const diagnostics::diagnostic_info *diagnostic, + enum diagnostics::kind orig_diag_kind) { /* Verify that the locations are ad-hoc, not packed. */ location_t loc = diagnostic_location (diagnostic); @@ -56,9 +56,9 @@ verify_unpacked_ranges (diagnostic_text_output_format &text_output, } static void -verify_no_columns (diagnostic_text_output_format &text_output, - const diagnostic_info *diagnostic, - diagnostic_t orig_diag_kind) +verify_no_columns (diagnostics::text_sink &text_output, + const diagnostics::diagnostic_info *diagnostic, + enum diagnostics::kind orig_diag_kind) { /* Verify that the locations have no columns. */ location_t loc = diagnostic_location (diagnostic); @@ -104,15 +104,15 @@ plugin_init (struct plugin_name_args *plugin_info, NULL); /* void *user_data */ /* Hack in additional testing, based on the exact value supplied. */ - original_text_finalizer = diagnostic_text_finalizer (global_dc); + original_text_finalizer = diagnostics::text_finalizer (global_dc); switch (base_location) { case LINE_MAP_MAX_LOCATION_WITH_PACKED_RANGES + 1: - diagnostic_text_finalizer (global_dc) = verify_unpacked_ranges; + diagnostics::text_finalizer (global_dc) = verify_unpacked_ranges; break; case LINE_MAP_MAX_LOCATION_WITH_COLS + 1: - diagnostic_text_finalizer (global_dc) = verify_no_columns; + diagnostics::text_finalizer (global_dc) = verify_no_columns; break; default: diff --git a/gcc/testsuite/gcc.dg/plugin/must-tail-call-2.c b/gcc/testsuite/gcc.dg/plugin/must-tail-call-2.c index d51d15c..6f65f4a 100644 --- a/gcc/testsuite/gcc.dg/plugin/must-tail-call-2.c +++ b/gcc/testsuite/gcc.dg/plugin/must-tail-call-2.c @@ -55,5 +55,5 @@ volatile fn_ptr_t fn_ptr; void test_5 (void) { - fn_ptr (); /* { dg-error "cannot tail-call: " } */ + fn_ptr (); } diff --git a/gcc/testsuite/gcc.dg/plugin/plugin.exp b/gcc/testsuite/gcc.dg/plugin/plugin.exp index d1d7f5d..ce25c0a 100644 --- a/gcc/testsuite/gcc.dg/plugin/plugin.exp +++ b/gcc/testsuite/gcc.dg/plugin/plugin.exp @@ -107,6 +107,10 @@ set plugin_test_list [list \ diagnostic-test-metadata.c \ diagnostic-test-metadata-html.c \ diagnostic-test-metadata-sarif.c } \ + { diagnostic_plugin_test_graphs.cc + diagnostic-test-graphs.c \ + diagnostic-test-graphs-html.c \ + diagnostic-test-graphs-sarif.c } \ { diagnostic_plugin_test_nesting.cc \ diagnostic-test-nesting-text-plain.c \ diagnostic-test-nesting-text-indented.c \ diff --git a/gcc/testsuite/gcc.dg/pr109267-1.c b/gcc/testsuite/gcc.dg/pr109267-1.c new file mode 100644 index 0000000..e762e59 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr109267-1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ + +/* PR middle-end/109267 */ + +int f(void) +{ + __builtin_unreachable(); +} + +/* This unreachable should be changed to be a trap. */ + +/* { dg-final { scan-tree-dump-times "__builtin_unreachable trap \\\(" 1 "optimized" { target trap } } } */ +/* { dg-final { scan-tree-dump-times "goto <" 1 "optimized" { target { ! trap } } } } */ +/* { dg-final { scan-tree-dump-not "__builtin_unreachable \\\(" "optimized"} } */ diff --git a/gcc/testsuite/gcc.dg/pr109267-2.c b/gcc/testsuite/gcc.dg/pr109267-2.c new file mode 100644 index 0000000..6cd1419 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr109267-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ + +/* PR middle-end/109267 */ +void g(void); +int f(int *t) +{ + g(); + __builtin_unreachable(); +} + +/* The unreachable should stay a unreachable. */ +/* { dg-final { scan-tree-dump-not "__builtin_unreachable trap \\\(" "optimized"} } */ +/* { dg-final { scan-tree-dump-times "__builtin_unreachable \\\(" 1 "optimized"} } */ diff --git a/gcc/testsuite/gcc.dg/pr116906-1.c b/gcc/testsuite/gcc.dg/pr116906-1.c index 7187507..ee60ad6 100644 --- a/gcc/testsuite/gcc.dg/pr116906-1.c +++ b/gcc/testsuite/gcc.dg/pr116906-1.c @@ -1,3 +1,4 @@ +/* { dg-do run } */ /* { dg-require-effective-target alarm } */ /* { dg-require-effective-target signal } */ /* { dg-options "-O2" } */ diff --git a/gcc/testsuite/gcc.dg/pr116906-2.c b/gcc/testsuite/gcc.dg/pr116906-2.c index 41a352b..4172ec3 100644 --- a/gcc/testsuite/gcc.dg/pr116906-2.c +++ b/gcc/testsuite/gcc.dg/pr116906-2.c @@ -1,3 +1,4 @@ +/* { dg-do run } */ /* { dg-require-effective-target alarm } */ /* { dg-require-effective-target signal } */ /* { dg-options "-O2 -fno-tree-ch" } */ diff --git a/gcc/testsuite/gcc.dg/pr120660.c b/gcc/testsuite/gcc.dg/pr120660.c new file mode 100644 index 0000000..6e8c5e8 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr120660.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O -favoid-store-forwarding" } */ + +int c; + +short +foo (short s) +{ + __builtin_memset (&s, c, 1); + return s; +} + +int +main () +{ + short x = foo (0x1111); + if (x != 0x1100 && x != 0x0011) + __builtin_abort(); +} diff --git a/gcc/testsuite/gcc.dg/pr121035.c b/gcc/testsuite/gcc.dg/pr121035.c new file mode 100644 index 0000000..fc0edce --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr121035.c @@ -0,0 +1,94 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fgimple" } */ + +int printf(const char *, ...); +int a, b, d; +unsigned c; +int __GIMPLE (ssa,startwith("pre")) +main () +{ + unsigned int g; + int f; + unsigned int _1; + unsigned int _2; + int _3; + int _4; + int _5; + unsigned int _6; + unsigned int _7; + int _10; + unsigned int _11; + _Bool _19; + _Bool _20; + _Bool _22; + int _25; + + __BB(2): + _25 = a; + if (_25 != 0) + goto __BB11; + else + goto __BB10; + + __BB(11): + goto __BB3; + + __BB(3): + f_26 = __PHI (__BB12: f_18, __BB11: 0); + g_15 = c; + if (f_26 != 0) + goto __BB4; + else + goto __BB5; + + __BB(4): + __builtin_putchar (48); + goto __BB5; + + __BB(5): + _1 = c; + _2 = _1 << 1; + _3 = a; + _4 = d; + _5 = _3 * _4; + if (_5 != 0) + goto __BB7; + else + goto __BB6; + + __BB(6): + goto __BB7; + + __BB(7): + _11 = __PHI (__BB5: 0u, __BB6: 4294967295u); + _6 = g_15 * 4294967294u; + _7 = _6 | _11; + _20 = _3 != 0; + _19 = _7 != 0u; + _22 = _19 & _20; + if (_22 != _Literal (_Bool) 0) + goto __BB9; + else + goto __BB8; + + __BB(8): + goto __BB9; + + __BB(9): + _10 = __PHI (__BB7: 1, __BB8: 0); + b = _10; + f_18 = (int) _1; + if (_3 != 0) + goto __BB12; + else + goto __BB10; + + __BB(12): + goto __BB3; + + __BB(10): + return 0; + +} + + diff --git a/gcc/testsuite/gcc.dg/pr121202.c b/gcc/testsuite/gcc.dg/pr121202.c new file mode 100644 index 0000000..30ecf4a --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr121202.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -fno-tree-copy-prop" } */ + +int a, b, c; +int e(int f, int g) { return f >> g; } +int h(int f) { return a > 1 ? 0 : f << a; } +int main() { + while (c--) + b = e(h(1), a); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/pr121216.c b/gcc/testsuite/gcc.dg/pr121216.c new file mode 100644 index 0000000..a695b40 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr121216.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "" } */ + +int foo (void) +{ + const char *key = "obscurelevelofabstraction"; + const char reverse_key[__builtin_strlen(key)] = {'\0'}; /* { dg-error "variable-sized object may not be initialized except with an empty initializer" } */ + return __builtin_strlen(reverse_key); +} diff --git a/gcc/testsuite/gcc.dg/pr121322.c b/gcc/testsuite/gcc.dg/pr121322.c new file mode 100644 index 0000000..2fad5b5 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr121322.c @@ -0,0 +1,14 @@ +/* PR middle-end/121322 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +unsigned long long +foo (unsigned long long *p) +{ + unsigned long long a = *p; + unsigned long long b = __builtin_bswap64 (a); + return ((b << 32) + | ((b >> 8) & 0xff000000ULL) + | ((b >> 24) & 0xff0000ULL) + | ((b >> 40) & 0xff00ULL)); +} diff --git a/gcc/testsuite/gcc.dg/pr32450.c b/gcc/testsuite/gcc.dg/pr32450.c index 9606e30..0af262f 100644 --- a/gcc/testsuite/gcc.dg/pr32450.c +++ b/gcc/testsuite/gcc.dg/pr32450.c @@ -4,6 +4,7 @@ /* { dg-require-profiling "-pg" } */ /* { dg-options "-O2 -pg" } */ /* { dg-options "-O2 -pg -mtune=core2" { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-additional-options "-mfentry -fno-pic" { target i?86-*-gnu* x86_64-*-gnu* } } */ /* { dg-options "-O2 -pg -static" { target hppa*-*-hpux* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/pr43643.c b/gcc/testsuite/gcc.dg/pr43643.c index 43896ab..41c00c8 100644 --- a/gcc/testsuite/gcc.dg/pr43643.c +++ b/gcc/testsuite/gcc.dg/pr43643.c @@ -4,6 +4,7 @@ /* { dg-require-profiling "-pg" } */ /* { dg-options "-O2 -pg" } */ /* { dg-options "-O2 -pg -static" { target hppa*-*-hpux* } } */ +/* { dg-additional-options "-mfentry -fno-pic" { target i?86-*-gnu* x86_64-*-gnu* } } */ extern char *strdup (const char *); diff --git a/gcc/testsuite/gcc.dg/pr78185.c b/gcc/testsuite/gcc.dg/pr78185.c index ada8b1b..4c3af4f 100644 --- a/gcc/testsuite/gcc.dg/pr78185.c +++ b/gcc/testsuite/gcc.dg/pr78185.c @@ -1,3 +1,4 @@ +/* { dg-do run } */ /* { dg-require-effective-target alarm } */ /* { dg-require-effective-target signal } */ /* { dg-options "-O" } */ diff --git a/gcc/testsuite/gcc.dg/pr87600-1.c b/gcc/testsuite/gcc.dg/pr87600-1.c index 3517957..9d74cad 100644 --- a/gcc/testsuite/gcc.dg/pr87600-1.c +++ b/gcc/testsuite/gcc.dg/pr87600-1.c @@ -1,5 +1,5 @@ /* PR rtl-optimization/87600 */ -/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-* s390*-*-* x86_64-*-* } } */ +/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* loongarch*-*-* powerpc*-*-* s390*-*-* x86_64-*-* } } */ /* { dg-options "-O2" } */ #include "pr87600.h" diff --git a/gcc/testsuite/gcc.dg/pr87600-2.c b/gcc/testsuite/gcc.dg/pr87600-2.c index e8a9f19..822afe0 100644 --- a/gcc/testsuite/gcc.dg/pr87600-2.c +++ b/gcc/testsuite/gcc.dg/pr87600-2.c @@ -1,5 +1,5 @@ /* PR rtl-optimization/87600 */ -/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-* s390*-*-* x86_64-*-* } } */ +/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* loongarch*-*-* powerpc*-*-* s390*-*-* x86_64-*-* } } */ /* { dg-options "-O2" } */ #include "pr87600.h" @@ -23,22 +23,3 @@ test1 (void) asm ("blah %0 %1" : "=r" (var1) : "0" (var2)); /* { dg-error "invalid hard register usage between output operand and matching constraint operand" } */ return var1; } - -long -test2 (void) -{ - register long var1 asm (REG1); - register long var2 asm (REG1); - asm ("blah %0 %1" : "=&r" (var1) : "r" (var2)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */ - return var1; -} - -long -test3 (void) -{ - register long var1 asm (REG1); - register long var2 asm (REG1); - long var3; - asm ("blah %0 %1" : "=&r" (var1), "=r" (var3) : "1" (var2)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */ - return var1 + var3; -} diff --git a/gcc/testsuite/gcc.dg/pr87600-3.c b/gcc/testsuite/gcc.dg/pr87600-3.c new file mode 100644 index 0000000..4f43a5f --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr87600-3.c @@ -0,0 +1,26 @@ +/* PR rtl-optimization/87600 */ +/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-* s390*-*-* x86_64-*-* } } */ +/* { dg-options "-O2" } */ + +#include "pr87600.h" + +/* The following are all invalid uses of local register variables. */ + +long +test2 (void) +{ + register long var1 asm (REG1); + register long var2 asm (REG1); + asm ("blah %0 %1" : "=&r" (var1) : "r" (var2)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */ + return var1; +} + +long +test3 (void) +{ + register long var1 asm (REG1); + register long var2 asm (REG1); + long var3; + asm ("blah %0 %1" : "=&r" (var1), "=r" (var3) : "1" (var2)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */ + return var1 + var3; +} diff --git a/gcc/testsuite/gcc.dg/pr87600.h b/gcc/testsuite/gcc.dg/pr87600.h index c89071eb..29f065e 100644 --- a/gcc/testsuite/gcc.dg/pr87600.h +++ b/gcc/testsuite/gcc.dg/pr87600.h @@ -7,6 +7,9 @@ #elif defined (__i386__) # define REG1 "%eax" # define REG2 "%edx" +#elif defined (__loongarch__) +# define REG1 "$t0" +# define REG2 "$t1" #elif defined (__powerpc__) || defined (__POWERPC__) || defined (__PPC__) # define REG1 "r3" # define REG2 "r4" diff --git a/gcc/testsuite/gcc.dg/sarif-output/include-chain-2.h b/gcc/testsuite/gcc.dg/sarif-output/include-chain-2.h index 382ac02..f60fb33 100644 --- a/gcc/testsuite/gcc.dg/sarif-output/include-chain-2.h +++ b/gcc/testsuite/gcc.dg/sarif-output/include-chain-2.h @@ -1,4 +1,4 @@ -/* Generate a warning with a diagnostic_path within a header. */ +/* Generate a warning with a diagnostic path within a header. */ void test (void *ptr) { diff --git a/gcc/testsuite/gcc.dg/torture/pr121116.c b/gcc/testsuite/gcc.dg/torture/pr121116.c new file mode 100644 index 0000000..637324f --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr121116.c @@ -0,0 +1,21 @@ +/* { dg-do run { target bitint } } */ + +#include <stdlib.h> +#include <stdckdint.h> +#include <string.h> +typedef _BitInt(16) bit16; +[[nodiscard]] static bit16 process_data(bit16 input) { + _Static_assert(sizeof(bit16) == 2, "Unexpected size of bit16"); + return (input << 5) | (input >> 9); +} +int main(void) { + const bit16 data = 0b101'0101'0000'0000; + bit16 result = 0; + for (bit16 i = 0; i < 0b1000; ++i) { + result ^= process_data(data ^ i); + } + if (ckd_add(&result, result, 0x1234)) { + return EXIT_FAILURE; + } + return (result & 0xFF00) ? 0 : 1; +} diff --git a/gcc/testsuite/gcc.dg/torture/pr121194.c b/gcc/testsuite/gcc.dg/torture/pr121194.c new file mode 100644 index 0000000..20f5ff7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr121194.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ + +int a, b, c, d; +void e() { + int *f = &b; + for (a = 0; a < 8; a++) { + *f = 0; + for (c = 0; c < 2; c++) + *f = *f == 0; + } +} +int main() { + e(); + int *g = &b; + *g = *g == (d == 0); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/torture/pr121236-1.c b/gcc/testsuite/gcc.dg/torture/pr121236-1.c new file mode 100644 index 0000000..2b397e3 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr121236-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* PR tree-optimization/121236 */ + + +unsigned func_26(short *p_27, int gg, int p) { + unsigned l_184 = 0; + unsigned m = 0; + for (int g_59 = 0; g_59 < 10; g_59++) + { + if (gg) + l_184--; + else + { + m |= l_184 |= p; + (l_184)--; + } + } + return m; +} + diff --git a/gcc/testsuite/gcc.dg/torture/pr121295-1.c b/gcc/testsuite/gcc.dg/torture/pr121295-1.c new file mode 100644 index 0000000..7825c6e --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr121295-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-additional-options " -fno-tree-copy-prop -fno-tree-pre -fno-code-hoisting" */ + +/* PR tree-optimization/121295 */ + + +int a, b, c; +int main() { + int *d = &a; + while (b) + b = (*d &= 10) <= 0 || (*d = c); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/tree-prof/afdo-crossmodule-1b.c b/gcc/testsuite/gcc.dg/tree-prof/afdo-crossmodule-1b.c index dd53295..79ba529 100644 --- a/gcc/testsuite/gcc.dg/tree-prof/afdo-crossmodule-1b.c +++ b/gcc/testsuite/gcc.dg/tree-prof/afdo-crossmodule-1b.c @@ -1,3 +1,8 @@ +/* { dg-require-effective-target lto } */ +/* { dg-additional-sources "afdo-crossmodule-1.c" } */ +/* { dg-options "-O3 -flto -fdump-ipa-afdo_offline -fdump-tree-einline-details" } */ +/* { dg-require-profiling "-fauto-profile" } */ + extern int foo2 (); int bar (int (*fooptr) (int (*)())) diff --git a/gcc/testsuite/gcc.dg/tree-prof/afdo-inline.c b/gcc/testsuite/gcc.dg/tree-prof/afdo-inline.c index b67b3cb..ded4068 100644 --- a/gcc/testsuite/gcc.dg/tree-prof/afdo-inline.c +++ b/gcc/testsuite/gcc.dg/tree-prof/afdo-inline.c @@ -1,6 +1,15 @@ /* { dg-options "-O2 -fdump-tree-einline-details --param early-inlining-insns=1" } */ /* { dg-require-profiling "-fauto-profile" } */ volatile int a[1000]; + +#define STR1(X) #X +#define STR2(X) STR1(X) + +int reta (int i) +asm(STR2(__USER_LABEL_PREFIX__) "renamed_reta"); +int test () +asm(STR2(__USER_LABEL_PREFIX__) "renamed_test"); + int reta (int i) { if (a[i]) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/cmp-2.c b/gcc/testsuite/gcc.dg/tree-ssa/cmp-2.c new file mode 100644 index 0000000..9b02901 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/cmp-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O1 -fdump-tree-forwprop" } */ + +/* PR tree-optimization/110949 */ +/* Transform `(cmp) - 1` into `-icmp`. */ + +int f1(int a) +{ + int t = a == 115; + return t - 1; +} + +/* { dg-final { scan-tree-dump " != 115" "forwprop1" } } */ +/* { dg-final { scan-tree-dump-not " == 115" "forwprop1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/cswtch-7.c b/gcc/testsuite/gcc.dg/tree-ssa/cswtch-7.c new file mode 100644 index 0000000..7b797807 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/cswtch-7.c @@ -0,0 +1,48 @@ +/* PR tree-optimization/120523 */ +/* PR tree-optimization/120451 */ +/* { dg-do compile { target elf } } */ +/* { dg-options "-O2" } */ + +void foo (int, int); + +__attribute__((noinline, noclone)) void +f1 (int v, int w) +{ + int i, j; + if (w) + { + i = 129; + j = i - 1; + goto lab; + } + switch (v) + { + case 170: + j = 7; + i = 27; + break; + case 171: + i = 8; + j = 122; + break; + case 172: + i = 21; + j = -19; + break; + case 173: + i = 18; + j = 17; + break; + case 174: + i = 33; + j = 55; + break; + default: + __builtin_abort (); + } + + lab: + foo (i, j); +} + +/* { dg-final { scan-assembler ".rodata.cst32" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/max-bitcmp-1.c b/gcc/testsuite/gcc.dg/tree-ssa/max-bitcmp-1.c new file mode 100644 index 0000000..81b5a27 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/max-bitcmp-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O1 -fdump-tree-forwprop -fdump-tree-optimized" } */ + +/* PR tree-optimization/95906 */ +/* this should become MAX_EXPR<a,b> */ + +int f2(int a, int b) +{ + int cmp = -(a > b); + return (cmp & a) | (~cmp & b); +} + +/* we should not end up with -_2 */ +/* we should not end up and & nor a `+ -1` */ +/* In optimized we should have a max. */ +/* { dg-final { scan-tree-dump-not " -\[a-zA-Z_\]" "forwprop1" } } */ +/* { dg-final { scan-tree-dump-not " & " "forwprop1" } } */ +/* { dg-final { scan-tree-dump-not " . -1" "forwprop1" } } */ +/* { dg-final { scan-tree-dump-times "MAX_EXPR " 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr117423.c b/gcc/testsuite/gcc.dg/tree-ssa/pr117423.c new file mode 100644 index 0000000..a5d3b29 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr117423.c @@ -0,0 +1,49 @@ +/* { dg-do run } */ +/* { dg-options "-O1" } */ + +struct s4 { + int _0; +}; +struct s1 { + unsigned char _4; + long _1; +}; +struct s2 { + union { + struct s3 { + unsigned char _1; + struct s4 _0; + } var_0; + struct s1 var_1; + } DATA; +}; +int f1(int arg0) { return arg0 > 12345; } +__attribute__((noinline)) +struct s4 f2(int arg0) { + struct s4 rv = {arg0}; + return rv; +} +struct s2 f3(int arg0) { + struct s2 rv; + struct s1 var6 = {0}; + struct s4 var7; + if (f1(arg0)) { + rv.DATA.var_1 = var6; + return rv; + } else { + rv.DATA.var_0._1 = 2; + var7 = f2(arg0); + rv.DATA.var_0._0 = var7; + return rv; + } +} +int main() { + if (f3(12345).DATA.var_0._0._0 == 12345) + ; + else + __builtin_abort(); + if (f3(12344).DATA.var_0._0._0 == 12344) + ; + else + __builtin_abort(); +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr119085.c b/gcc/testsuite/gcc.dg/tree-ssa/pr119085.c new file mode 100644 index 0000000..e9811ce --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr119085.c @@ -0,0 +1,37 @@ +/* { dg-do run } */ +/* { dg-options "-O1" } */ + +struct with_hole { + int x; + long y; +}; +struct without_hole { + int x; + int y; +}; +union u { + struct with_hole with_hole; + struct without_hole without_hole; +}; + +void __attribute__((noinline)) +test (union u *up, union u u) +{ + union u u2; + volatile int f = 0; + u2 = u; + if (f) + u2.with_hole = u.with_hole; + *up = u2; +} + +int main(void) +{ + union u u; + union u u2; + u2.without_hole.y = -1; + test (&u, u2); + if (u.without_hole.y != -1) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr121264.c b/gcc/testsuite/gcc.dg/tree-ssa/pr121264.c new file mode 100644 index 0000000..bd5acc0 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr121264.c @@ -0,0 +1,12 @@ +/* PR tree-optimization/121264 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump " \\\| " "optimized" } } */ + +struct A { char b; char c[0x20000010]; } a; + +int +foo () +{ + return a.c[0x20000000] || a.c[1]; +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr81627.c b/gcc/testsuite/gcc.dg/tree-ssa/pr81627.c index 9ba43be..ef35b29 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr81627.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr81627.c @@ -4,6 +4,7 @@ int a, b, c, d[6], e = 3, f; void abort (void); +void fn1 () __attribute__((noinline)); void fn1 () { for (b = 1; b < 5; b++) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-23.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-23.c new file mode 100644 index 0000000..f632dc8 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-sink-23.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-tree-sink1-details" } */ + +struct S { + int* x; + int* y; +}; + +void __attribute__((noreturn)) bar(const struct S* s); + +void foo(int a, int b) { + struct S s; + s.x = &a; + s.y = &b; + if (a < b) { + bar(&s); + } +} + +/* { dg-final { scan-tree-dump "Sinking.*s.y" "sink1" } } */ +/* { dg-final { scan-tree-dump "Sinking.*s.x" "sink1" } } */ diff --git a/gcc/testsuite/gcc.dg/uninit-pr120924.c b/gcc/testsuite/gcc.dg/uninit-pr120924.c new file mode 100644 index 0000000..bfc8ae9 --- /dev/null +++ b/gcc/testsuite/gcc.dg/uninit-pr120924.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -Wmaybe-uninitialized" } */ + +int foo(int); +enum { + BPF_TRACE_RAW_TP, + BPF_MODIFY_RETURN, + BPF_LSM_MAC, + BPF_TRACE_ITER, + BPF_LSM_CGROUP +}; +int btf_get_kernel_prefix_kind_prefix, obj_1, attach_name___trans_tmp_1; +char attach_name_fn_name; +void attach_name(int attach_type) +{ + int mod_len; + char mod_name = attach_name_fn_name; + if (attach_name_fn_name) + mod_len = mod_name; + for (; obj_1;) { + if (mod_name && foo(mod_len)) + continue; + switch (attach_type) { + case BPF_TRACE_RAW_TP: + case BPF_LSM_MAC: + case BPF_LSM_CGROUP: + btf_get_kernel_prefix_kind_prefix = 1; + case BPF_TRACE_ITER: + attach_name_fn_name = 2; + } + if (attach_name___trans_tmp_1) + return; + } +} diff --git a/gcc/testsuite/gcc.dg/unused-9.c b/gcc/testsuite/gcc.dg/unused-9.c index bdf36e1..ad1ad0e 100644 --- a/gcc/testsuite/gcc.dg/unused-9.c +++ b/gcc/testsuite/gcc.dg/unused-9.c @@ -2,12 +2,9 @@ /* { dg-do compile } */ /* { dg-options "-Wunused" } */ - void g(void) { - int i = 0; - volatile int x; - (x, i++); /* { dg-bogus "set but not used" } */ + int i = 0; /* { dg-warning "variable 'i' set but not used" } */ + volatile int x; /* { dg-bogus "variable 'x' set but not used" } */ + (x, i++); } - - diff --git a/gcc/testsuite/gcc.dg/vect/bb-slp-39.c b/gcc/testsuite/gcc.dg/vect/bb-slp-39.c index f05ce8f..255bb10 100644 --- a/gcc/testsuite/gcc.dg/vect/bb-slp-39.c +++ b/gcc/testsuite/gcc.dg/vect/bb-slp-39.c @@ -16,5 +16,4 @@ void foo (double *p) } /* See that we vectorize three SLP instances. */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "slp2" { target { ! { s390*-*-* riscv*-*-* } } } } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 5 "slp2" { target { s390*-*-* riscv*-*-* } } } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 3 "slp2" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr112325.c b/gcc/testsuite/gcc.dg/vect/pr112325.c index 8689fbf..d380595 100644 --- a/gcc/testsuite/gcc.dg/vect/pr112325.c +++ b/gcc/testsuite/gcc.dg/vect/pr112325.c @@ -5,6 +5,7 @@ /* { dg-additional-options "-mavx2" { target x86_64-*-* i?86-*-* } } */ /* { dg-additional-options "--param max-completely-peeled-insns=200" { target powerpc64*-*-* } } */ /* { dg-additional-options "-mlsx" { target loongarch64-*-* } } */ +/* { dg-additional-options "--param max-completely-peeled-insns=200 --param min-vect-loop-bound=0" { target s390*-*-* } } */ typedef unsigned short ggml_fp16_t; static float table_f32_f16[1 << 16]; diff --git a/gcc/testsuite/gcc.dg/vect/pr116125.c b/gcc/testsuite/gcc.dg/vect/pr116125.c index eab9efd..1b882ec 100644 --- a/gcc/testsuite/gcc.dg/vect/pr116125.c +++ b/gcc/testsuite/gcc.dg/vect/pr116125.c @@ -17,12 +17,12 @@ main (void) { check_vect (); - struct st a[9] = {}; + struct st a[10] = {}; - // input a = 0, 0, 0, 0, 0, 0, 0, 0, 0 + // input a = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 mem_overlap (&a[1], a); - // output a = 0, 1, 2, 3, 4, 5, 6, 7, 8 + // output a = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 if (a[2].num == 2) return 0; else diff --git a/gcc/testsuite/gcc.dg/vect/pr117888-1.c b/gcc/testsuite/gcc.dg/vect/pr117888-1.c index 0b31fcd..884aed2 100644 --- a/gcc/testsuite/gcc.dg/vect/pr117888-1.c +++ b/gcc/testsuite/gcc.dg/vect/pr117888-1.c @@ -5,6 +5,7 @@ /* { dg-additional-options "-mavx2" { target x86_64-*-* i?86-*-* } } */ /* { dg-additional-options "--param max-completely-peeled-insns=200" { target powerpc64*-*-* } } */ /* { dg-additional-options "-mlsx" { target loongarch64-*-* } } */ +/* { dg-additional-options "--param max-completely-peeled-insns=200 --param min-vect-loop-bound=0" { target s390*-*-* } } */ typedef unsigned short ggml_fp16_t; static float table_f32_f16[1 << 16]; diff --git a/gcc/testsuite/gcc.dg/vect/pr120687-1.c b/gcc/testsuite/gcc.dg/vect/pr120687-1.c new file mode 100644 index 0000000..ce9cf63 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr120687-1.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_int } */ + +unsigned +frd (unsigned *p, unsigned *lastone) +{ + unsigned sum = 0; + for (; p <= lastone; p += 16) + sum += p[0] + p[1] + p[2] + p[3] + p[4] + p[5] + p[6] + p[7] + + p[8] + p[9] + p[10] + p[11] + p[12] + p[13] + p[14] + p[15]; + return sum; +} + +/* { dg-final { scan-tree-dump "reduction: detected reduction chain" "vect" } } */ +/* { dg-final { scan-tree-dump-not "SLP discovery of reduction chain failed" "vect" } } */ +/* { dg-final { scan-tree-dump "optimized: loop vectorized" "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr120687-2.c b/gcc/testsuite/gcc.dg/vect/pr120687-2.c new file mode 100644 index 0000000..dfc6dc7 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr120687-2.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_float } */ +/* { dg-additional-options "-ffast-math" } */ + +float +frd (float *p, float *lastone) +{ + float sum = 0; + for (; p <= lastone; p += 16) + sum += p[0] + p[1] + p[2] + p[3] + p[4] + p[5] + p[6] + p[7] + + p[8] + p[9] + p[10] + p[11] + p[12] + p[13] + p[14] + p[15]; + return sum; +} + +/* { dg-final { scan-tree-dump "reduction: detected reduction chain" "vect" } } */ +/* { dg-final { scan-tree-dump-not "SLP discovery of reduction chain failed" "vect" } } */ +/* { dg-final { scan-tree-dump "optimized: loop vectorized" "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr120687-3.c b/gcc/testsuite/gcc.dg/vect/pr120687-3.c new file mode 100644 index 0000000..f20a66a --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr120687-3.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target vect_double } */ +/* { dg-additional-options "-ffast-math" } */ + +float +frd (float *p, float *lastone) +{ + float sum = 0; + for (; p <= lastone; p += 2) + sum += p[0] + p[1]; + return sum; +} + +/* { dg-final { scan-tree-dump "reduction: detected reduction chain" "vect" } } */ +/* { dg-final { scan-tree-dump-not "SLP discovery of reduction chain failed" "vect" } } */ +/* { dg-final { scan-tree-dump "optimized: loop vectorized" "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr121034.c b/gcc/testsuite/gcc.dg/vect/pr121034.c new file mode 100644 index 0000000..de20781 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr121034.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O3" } */ + +int b, e; +char c, d; +unsigned g; +int abs(int); +void f() { + char *a = &d; + int h; + for (; e; e++) { + h = 0; + for (; h < 16; h++) + g += __builtin_abs(a[h] - c); + a += b; + } +} diff --git a/gcc/testsuite/gcc.dg/vect/pr121049.c b/gcc/testsuite/gcc.dg/vect/pr121049.c new file mode 100644 index 0000000..558c92a --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr121049.c @@ -0,0 +1,25 @@ +/* { dg-additional-options "--param vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-march=x86-64-v4" { target avx512f_runtime } } */ + +#include "tree-vect.h" + +int mon_lengths[12] = { 1, 10, 100 }; + +__attribute__ ((noipa)) long +transtime (int mon) +{ + long value = 0; + for (int i = 0; i < mon; ++i) + value += mon_lengths[i] * 2l; + return value; +} + +int +main () +{ + check_vect (); + if (transtime (3) != 222) + __builtin_abort (); + return 0; +} + diff --git a/gcc/testsuite/gcc.dg/vect/pr121059.c b/gcc/testsuite/gcc.dg/vect/pr121059.c new file mode 100644 index 0000000..2bbfcea --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr121059.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O3 --param vect-partial-vector-usage=1" } */ +/* { dg-additional-options "-march=x86-64-v4" { target avx512f } } */ + +typedef struct { + long left, right, top, bottom; +} MngBox; +typedef struct { + MngBox object_clip[6]; + char exists[256], frozen[]; +} MngReadInfo; +MngReadInfo mng_info; + +long ReadMNGImage_i; + +void ReadMNGImage(int ReadMNGImage_i) +{ + for (; ReadMNGImage_i < 256; ReadMNGImage_i++) + if (mng_info.exists[ReadMNGImage_i] && mng_info.frozen[ReadMNGImage_i]) + mng_info.object_clip[ReadMNGImage_i].left = + mng_info.object_clip[ReadMNGImage_i].right = + mng_info.object_clip[ReadMNGImage_i].top = + mng_info.object_clip[ReadMNGImage_i].bottom = 0; +} diff --git a/gcc/testsuite/gcc.dg/vect/pr121126.c b/gcc/testsuite/gcc.dg/vect/pr121126.c new file mode 100644 index 0000000..ae6603b --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr121126.c @@ -0,0 +1,30 @@ +/* { dg-additional-options "--param vect-partial-vector-usage=2" } */ + +#include "tree-vect.h" + +unsigned char a; +unsigned b; +int r[11]; +static void __attribute__((noipa)) +c(int e, unsigned s[][11][11]) +{ + for (int u = -(e ? 2000424973 : 0) - 2294542319; u < 7; u += 4) + for (int x = 0; x < 300000011; x += 4) + for (int y = 0; y < (0 < s[u][4][1]) + 11; y += 3) { + a = a ?: 1; + b = r[2]; + } +} +long long ab; +int e = 1; +unsigned s[11][11][11]; +int main() +{ + check_vect (); + for (int t = 0; t < 11; ++t) + r[t] = 308100; + c(e,s); + ab = b; + if (ab != 308100) + __builtin_abort (); +} diff --git a/gcc/testsuite/gcc.dg/vect/slp-28.c b/gcc/testsuite/gcc.dg/vect/slp-28.c index 67b7be2..1f98787 100644 --- a/gcc/testsuite/gcc.dg/vect/slp-28.c +++ b/gcc/testsuite/gcc.dg/vect/slp-28.c @@ -59,8 +59,8 @@ main1 () abort (); } - /* Not vectorizable because of data dependencies: distance 3 is greater than - the actual VF with SLP (2), but the analysis fail to detect that for now. */ + /* Dependence distance 3 is greater than the actual VF with SLP (2), + thus vectorizable. */ for (i = 3; i < N/4; i++) { in3[i*4] = in3[(i-3)*4] + 5; @@ -91,7 +91,6 @@ int main (void) return 0; } -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { ! vect32 } } } } */ -/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target vect32 } } } */ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { ! vect32 } } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-127.c b/gcc/testsuite/gcc.dg/vect/vect-127.c new file mode 100644 index 0000000..8b913dc --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-127.c @@ -0,0 +1,15 @@ +// { dg-do compile } +// { dg-require-effective-target vect_int } + +void foo (int *p) +{ + for (int i = 0; i < 1024; ++i) + { + int a0 = p[2*i + 0]; + int a1 = p[2*i + 1]; + p[2*i + 4] = a0; + p[2*i + 5] = a1; + } +} + +/* { dg-final { scan-tree-dump "loop vectorized using 16 byte vectors" "vect" { target { vect128 && vect_hw_misalign } } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-early-break_137-pr121190.c b/gcc/testsuite/gcc.dg/vect/vect-early-break_137-pr121190.c new file mode 100644 index 0000000..e6b071c --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-early-break_137-pr121190.c @@ -0,0 +1,62 @@ +/* PR tree-optimization/121190 */ +/* { dg-options "-O3" } */ +/* { dg-additional-options "-march=znver2" { target x86_64-*-* i?86-*-* } } */ +/* { dg-require-effective-target mmap } */ +/* { dg-require-effective-target vect_early_break } */ + +#include <stdint.h> +#include <string.h> +#include <stdio.h> +#include <sys/mman.h> +#include <unistd.h> +#include "tree-vect.h" + +#define MAX_COMPARE 5000 + +__attribute__((noipa)) +int diff (uint64_t *restrict p, uint64_t *restrict q) +{ + int i = 0; + while (i < MAX_COMPARE) { + if (*(p + i) != *(q + i)) + return i; + i++; + } + return -1; +} + +int main () +{ + check_vect (); + + long pgsz = sysconf (_SC_PAGESIZE); + if (pgsz == -1) { + fprintf (stderr, "sysconf failed\n"); + return 0; + } + + /* Allocate 2 consecutive pages of memory and let p1 and p2 point to the + beginning of each. */ + void *mem = mmap (NULL, pgsz * 2, PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + if (mem == MAP_FAILED) { + fprintf (stderr, "mmap failed\n"); + return 0; + } + uint64_t *p1 = (uint64_t *) mem; + uint64_t *p2 = (uint64_t *) mem + pgsz / sizeof (uint64_t); + + /* Fill the first page with zeros, except for its last 64 bits. */ + memset (p1, 0, pgsz); + *(p2 - 1) = -1; + + /* Make the 2nd page not accessable. */ + mprotect (p2, pgsz, PROT_NONE); + + /* Calls to diff should not read the 2nd page. */ + for (int i = 1; i <= 20; i++) { + if (diff (p2 - i, p1) != i - 1) + __builtin_abort (); + } +} + diff --git a/gcc/testsuite/gcc.dg/vect/vect-early-break_138-pr121020.c b/gcc/testsuite/gcc.dg/vect/vect-early-break_138-pr121020.c new file mode 100644 index 0000000..8cb62bf --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-early-break_138-pr121020.c @@ -0,0 +1,54 @@ +/* PR tree-optimization/121020 */ +/* { dg-options "-O3 --vect-cost-model=unlimited" } */ +/* { dg-additional-options "-march=znver2" { target x86_64-*-* i?86-*-* } } */ +/* { dg-require-effective-target mmap } */ +/* { dg-require-effective-target vect_early_break } */ + +#include <stdint.h> +#include <stdio.h> +#include <sys/mman.h> +#include <unistd.h> +#include "tree-vect.h" + +__attribute__((noipa)) +bool equal (uint64_t *restrict p, uint64_t *restrict q, int length) +{ + for (int i = 0; i < length; i++) { + if (*(p + i) != *(q + i)) + return false; + } + return true; +} + +int main () +{ + check_vect (); + + long pgsz = sysconf (_SC_PAGESIZE); + if (pgsz == -1) { + fprintf (stderr, "sysconf failed\n"); + return 0; + } + + /* Allocate a whole page of memory. */ + void *mem = mmap (NULL, pgsz, PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + if (mem == MAP_FAILED) { + fprintf (stderr, "mmap failed\n"); + return 0; + } + uint64_t *p1 = (uint64_t *) mem; + uint64_t *p2 = (uint64_t *) mem + 32; + + /* The first 16 elements pointed to by p1 and p2 are the same. */ + for (int i = 0; i < 32; i++) { + *(p1 + i) = 0; + *(p2 + i) = (i < 16 ? 0 : -1); + } + + /* All calls to equal should return true. */ + for (int len = 0; len < 16; len++) { + if (!equal (p1 + 1, p2 + 1, len)) + __builtin_abort(); + } +} diff --git a/gcc/testsuite/gcc.dg/vect/vect-early-break_52.c b/gcc/testsuite/gcc.dg/vect/vect-early-break_52.c index 86a632f..6abfcd6 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-early-break_52.c +++ b/gcc/testsuite/gcc.dg/vect/vect-early-break_52.c @@ -18,4 +18,4 @@ int main1 (short X) } } -/* { dg-final { scan-tree-dump "vectorized 1 loops in function" "vect" { target { ! "x86_64-*-* i?86-*-*" } } } } */ +/* { dg-final { scan-tree-dump "vectorized 1 loops in function" "vect" { target { ! "x86_64-*-* i?86-*-* arm*-*-*" } } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-recurr-pr121256-2.c b/gcc/testsuite/gcc.dg/vect/vect-recurr-pr121256-2.c new file mode 100644 index 0000000..7350fd9 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-recurr-pr121256-2.c @@ -0,0 +1,49 @@ +/* { dg-additional-options "-mavx2" { target avx2_runtime } } */ + +#include "tree-vect.h" + +#define B 0 +#define G 1 +#define R 2 + +int red = 153; +int green = 66; +int blue = 187; + +static void __attribute__((noipa)) +sub_left_prediction_bgr32(int *restrict dst, int *restrict src) +{ + for (int i = 0; i < 8; i++) { + int rt = src[i * 3 + R]; + int gt = src[i * 3 + G]; + int bt = src[i * 3 + B]; + + dst[i * 3 + R] = rt - red; + dst[i * 3 + G] = gt - green; + dst[i * 3 + B] = bt - blue; + + red = rt; + green = gt; + blue = bt; + } +} + +int main() +{ + int dst[8*3]; + int src[8*3] = { 160, 73, 194, 17, 33, 99, 0, 12, 283, 87, 73, 11, + 9, 7, 1, 23, 19, 13, 77, 233, 97, 78, 2, 5 }; + int dst2[8*3] = {-27, 7, 41, -143, -40, -95, -17, -21, 184, 87, 61, + -272, -78, -66, -10, 14, 12, 12, 54, 214, 84, 1, -231, -92}; + + check_vect (); + + sub_left_prediction_bgr32(dst, src); + +#pragma GCC novector + for (int i = 0; i < 8*3; ++i) + if (dst[i] != dst2[i]) + __builtin_abort(); + + return 0; +} diff --git a/gcc/testsuite/gcc.dg/vect/vect-recurr-pr121256.c b/gcc/testsuite/gcc.dg/vect/vect-recurr-pr121256.c new file mode 100644 index 0000000..c895e94 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-recurr-pr121256.c @@ -0,0 +1,54 @@ +/* { dg-additional-options "-mavx2" { target avx2_runtime } } */ + +#include <stddef.h> +#include <stdint.h> +#include <stdlib.h> +#include "tree-vect.h" + +#define B 0 +#define G 1 +#define R 2 +#define A 3 + +int red = 153; +int green = 66; +int blue = 187; +int alpha = 255; + +static void __attribute__((noipa)) +sub_left_prediction_bgr32(uint8_t *restrict dst, uint8_t *restrict src, int w) +{ + for (int i = 0; i < 8; i++) { + int rt = src[i * 4 + R]; + int gt = src[i * 4 + G]; + int bt = src[i * 4 + B]; + int at = src[i * 4 + A]; + + dst[i * 4 + R] = rt - red; + dst[i * 4 + G] = gt - green; + dst[i * 4 + B] = bt - blue; + dst[i * 4 + A] = at - alpha; + + red = rt; + green = gt; + blue = bt; + alpha = at; + } +} + +int main() +{ + check_vect (); + + uint8_t *dst = calloc(36, sizeof(uint8_t)); + uint8_t *src = calloc(36, sizeof(uint8_t)); + + src[R] = 160; + src[G] = 73; + src[B] = 194; + src[A] = 255; + + sub_left_prediction_bgr32(dst, src, 33); + if (dst[R] != 7 || dst[B] != 7 || dst[A] != 0) + __builtin_abort(); +} diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-cond-1.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-cond-1.c new file mode 100644 index 0000000..258f17e --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-cond-1.c @@ -0,0 +1,60 @@ +/* { dg-require-effective-target vect_int } */ +/* { dg-require-effective-target vect_condition } */ + +#include <stdarg.h> +#include "tree-vect.h" + +/* PR tree-optimization/119920 */ + +#define N 32 + +unsigned int ub[N]; + +/* Test vectorization of reduction of unsigned-int. */ + +__attribute__ ((noinline, noipa)) +void init(void) +{ + #pragma GCC novector + for(int i = 0;i < N; i++) + ub[i] = i; +} + + +__attribute__ ((noinline, noipa)) +void main1 (unsigned int b, unsigned int c) +{ + int i; + unsigned int usum = 0; + + init(); + + /* Summation. */ + for (i = 0; i < N; i++) { + if ( ub[i] < N/2 ) + { + usum += b; + } + else + { + usum += c; + } + } + + /* check results: */ + /* __builtin_printf("%d : %d\n", usum, (N/2*b + N/2*c)); */ + if (usum != N/2*b + N/2*c) + abort (); +} + +int main (void) +{ + check_vect (); + + main1 (0, 0); + main1 (1, 1); + main1 (10, 1); + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_int_add } } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-cond-2.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-cond-2.c new file mode 100644 index 0000000..126a50f --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-cond-2.c @@ -0,0 +1,62 @@ +/* { dg-require-effective-target vect_int } */ +/* { dg-require-effective-target vect_condition } */ +/* { dg-additional-options "-fdump-tree-ifcvt-details" } */ + +#include <stdarg.h> +#include "tree-vect.h" + +/* PR tree-optimization/119920 */ + +#define N 32 + +unsigned int ub[N]; +unsigned int ua[N]; + +/* Test vectorization of reduction of unsigned-int. */ + +__attribute__ ((noinline, noipa)) +void init(void) +{ + #pragma GCC novector + for(int i = 0;i < N; i++) { + ub[i] = i; + ua[i] = 1; + } +} + + +__attribute__ ((noinline, noipa)) +void main1 (unsigned int b, unsigned int c) +{ + int i; + unsigned int usum = 0; + + init(); + + /* Summation. */ + for (i = 0; i < N; i++) { + unsigned t = ua[i]; + if ( ub[i] < N/2 ) + usum += b * t; + else + usum += c * t; + } + + /* check results: */ + /* __builtin_printf("%d : %d\n", usum, (N/2*b*1 + N/2*c*1)); */ + if (usum != N/2*b + N/2*c) + abort (); +} + +int main (void) +{ + check_vect (); + + main1 (0, 0); + main1 (1, 1); + main1 (10, 1); + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_int_add } } } } */ +/* { dg-final { scan-tree-dump-times "changed to factor operation out from COND_EXPR" 2 "ifcvt" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-reduc-cond-3.c b/gcc/testsuite/gcc.dg/vect/vect-reduc-cond-3.c new file mode 100644 index 0000000..e425869 --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-reduc-cond-3.c @@ -0,0 +1,56 @@ +/* { dg-require-effective-target vect_int } */ + +#include <stdarg.h> +#include "tree-vect.h" + +/* PR tree-optimization/112324 */ +/* PR tree-optimization/110015 */ + +#define N 32 + +int ub[N]; + +/* Test vectorization of reduction of int max with some extra code involed. */ + +__attribute__ ((noinline, noipa)) +void init(void) +{ + #pragma GCC novector + for(int i = 0;i < N; i++) + ub[i] = (i&4) && (i&1) ? -i : i; +} + +#define MAX(a, b) ((a) > (b) ? (a) : (b)) + +__attribute__ ((noinline, noipa)) +void main1 (void) +{ + int i; + int max = 0; + + init(); + + /* Summation. */ + for (i = 0; i < N; i++) { + int tmp = ub[i]; + if (tmp < 0) + max = MAX (-tmp, max); + else + max = MAX (tmp, max); + } + + /* check results: */ + /* __builtin_printf("%d : %d\n", max, N); */ + if (max != N - 1) + abort (); +} + +int main (void) +{ + check_vect (); + + main1 (); + return 0; +} + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_int_min_max } } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-simd-pr121130.c b/gcc/testsuite/gcc.dg/vect/vect-simd-pr121130.c new file mode 100644 index 0000000..c882ded --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/vect-simd-pr121130.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ + +int n2; + +__attribute__((simd)) char +w7(void) +{ + short int xb = n2; + xb = w7() < 1; + return xb; +} diff --git a/gcc/testsuite/gcc.target/aarch64/asm-hard-reg-1.c b/gcc/testsuite/gcc.target/aarch64/asm-hard-reg-1.c new file mode 100644 index 0000000..7441dd7 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/asm-hard-reg-1.c @@ -0,0 +1,55 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +/* Ensure that we error out in case no hard regs are available for an operand + with constraint y. The position/order of the y-constrained operand does not + matter. */ + +void +test (void) +{ + int x, a, b, c, d, e, f, g, h; + + __asm__ __volatile__ ("" : + "={v0}" (a), + "={v1}" (b), + "={v2}" (c), + "={v3}" (d), + "={v4}" (e), + "={v5}" (f), + "={v6}" (g), + "={v7}" (h)); + + __asm__ __volatile__ ("" : /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + "=y" (x), + "={v0}" (a), + "={v1}" (b), + "={v2}" (c), + "={v3}" (d), + "={v4}" (e), + "={v5}" (f), + "={v6}" (g), + "={v7}" (h)); + + __asm__ __volatile__ ("" : /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + "={v0}" (a), + "={v1}" (b), + "={v2}" (c), + "={v3}" (d), + "=y" (x), + "={v4}" (e), + "={v5}" (f), + "={v6}" (g), + "={v7}" (h)); + + __asm__ __volatile__ ("" : /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + "={v0}" (a), + "={v1}" (b), + "={v2}" (c), + "={v3}" (d), + "={v4}" (e), + "={v5}" (f), + "={v6}" (g), + "={v7}" (h), + "=y" (x)); +} diff --git a/gcc/testsuite/gcc.target/aarch64/asm-hard-reg-2.c b/gcc/testsuite/gcc.target/aarch64/asm-hard-reg-2.c new file mode 100644 index 0000000..7434063 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/asm-hard-reg-2.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=armv8-a+sve" } */ + +/* Test register pairs. */ + +#include <arm_sve.h> + +void +test (void) +{ + svuint32x2_t x, y; + svuint32x4_t z; + + __asm__ __volatile__ ("" : "={z4}" (x), "={z6}" (y)); + __asm__ __volatile__ ("" : "={z5}" (x), "={z6}" (y)); /* { dg-error "multiple outputs to hard register: v6" } */ + __asm__ __volatile__ ("" : "={z4}" (z), "={z6}" (y)); /* { dg-error "multiple outputs to hard register: v6" } */ +} diff --git a/gcc/testsuite/gcc.target/aarch64/avoid-store-forwarding-be.c b/gcc/testsuite/gcc.target/aarch64/avoid-store-forwarding-be.c new file mode 100644 index 0000000..2e8946b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/avoid-store-forwarding-be.c @@ -0,0 +1,23 @@ +/* { dg-do run } */ +/* { dg-require-effective-target aarch64_big_endian } */ +/* { dg-options "-O2 -favoid-store-forwarding" } */ + +typedef union { + char arr[2]; + short value; +} DataUnion; + +short __attribute__ ((noinline)) +ssll (DataUnion *data, char x, char y) +{ + data->arr[0] = x; + data->arr[1] = y; + return data->value; +} + +int main () { + DataUnion data = {}; + short value = ssll (&data, 0, 1); + if (value != 1) + __builtin_abort (); +}
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/aarch64/cmpbr.c b/gcc/testsuite/gcc.target/aarch64/cmpbr.c index a86af9d..34630f9 100644 --- a/gcc/testsuite/gcc.target/aarch64/cmpbr.c +++ b/gcc/testsuite/gcc.target/aarch64/cmpbr.c @@ -121,7 +121,7 @@ FAR_BRANCH(u64, 42); /* ** u8_x0_eq_x1: -** cbbeq w1, w0, .L([0-9]+) +** cbbeq (?:w1, w0|w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -129,7 +129,7 @@ FAR_BRANCH(u64, 42); /* ** u8_x0_ne_x1: -** cbbne w1, w0, .L([0-9]+) +** cbbne (?:w1, w0|w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -137,7 +137,7 @@ FAR_BRANCH(u64, 42); /* ** u8_x0_ult_x1: -** cbbhi w1, w0, .L([0-9]+) +** (?:cbbhi w1, w0|cbblo w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -145,7 +145,7 @@ FAR_BRANCH(u64, 42); /* ** u8_x0_ule_x1: -** cbbhs w1, w0, .L([0-9]+) +** (?:cbbhs w1, w0|cbbls w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -153,7 +153,7 @@ FAR_BRANCH(u64, 42); /* ** u8_x0_ugt_x1: -** cbblo w1, w0, .L([0-9]+) +** (?:cbblo w1, w0|cbbhi w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -161,7 +161,7 @@ FAR_BRANCH(u64, 42); /* ** u8_x0_uge_x1: -** cbbls w1, w0, .L([0-9]+) +** (?:cbbls w1, w0|cbbhs w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -169,7 +169,7 @@ FAR_BRANCH(u64, 42); /* ** i8_x0_slt_x1: -** cbbgt w1, w0, .L([0-9]+) +** (?:cbbgt w1, w0|cbblt w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -177,7 +177,7 @@ FAR_BRANCH(u64, 42); /* ** i8_x0_sle_x1: -** cbbge w1, w0, .L([0-9]+) +** (?:cbbge w1, w0|cbble w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -185,7 +185,7 @@ FAR_BRANCH(u64, 42); /* ** i8_x0_sgt_x1: -** cbblt w1, w0, .L([0-9]+) +** (?:cbblt w1, w0|cbbgt w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -193,7 +193,7 @@ FAR_BRANCH(u64, 42); /* ** i8_x0_sge_x1: -** cbble w1, w0, .L([0-9]+) +** (?:cbble w1, w0|cbbge w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -201,7 +201,7 @@ FAR_BRANCH(u64, 42); /* ** u16_x0_eq_x1: -** cbheq w1, w0, .L([0-9]+) +** cbheq (?:w1, w0|w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -209,7 +209,7 @@ FAR_BRANCH(u64, 42); /* ** u16_x0_ne_x1: -** cbhne w0|w1, w1|w0, .L([0-9]+) +** cbhne (?:w1, w0|w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -217,7 +217,7 @@ FAR_BRANCH(u64, 42); /* ** u16_x0_ult_x1: -** cbhhi w1, w0, .L([0-9]+) +** (?:cbhhi w1, w0|cbhlo w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -225,7 +225,7 @@ FAR_BRANCH(u64, 42); /* ** u16_x0_ule_x1: -** cbhhs w1, w0, .L([0-9]+) +** (?:cbhhs w1, w0|cbhls w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -233,7 +233,7 @@ FAR_BRANCH(u64, 42); /* ** u16_x0_ugt_x1: -** cbhlo w1, w0, .L([0-9]+) +** (?:cbhlo w1, w0|cbhhi w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -241,7 +241,7 @@ FAR_BRANCH(u64, 42); /* ** u16_x0_uge_x1: -** cbhls w1, w0, .L([0-9]+) +** (?:cbhls w1, w0|cbhhs w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -249,7 +249,7 @@ FAR_BRANCH(u64, 42); /* ** i16_x0_slt_x1: -** cbhgt w1, w0, .L([0-9]+) +** (?:cbhgt w1, w0|cbhlt w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -257,7 +257,7 @@ FAR_BRANCH(u64, 42); /* ** i16_x0_sle_x1: -** cbhge w1, w0, .L([0-9]+) +** (?:cbhge w1, w0|cbhle w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -265,7 +265,7 @@ FAR_BRANCH(u64, 42); /* ** i16_x0_sgt_x1: -** cbhlt w1, w0, .L([0-9]+) +** (?:cbhlt w1, w0|cbhgt w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken @@ -273,7 +273,7 @@ FAR_BRANCH(u64, 42); /* ** i16_x0_sge_x1: -** cbhle w1, w0, .L([0-9]+) +** (?:cbhle w1, w0|cbhge w0, w1), .L([0-9]+) ** b not_taken ** .L\1: ** b taken diff --git a/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-0.c b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-0.c new file mode 100644 index 0000000..e544b04f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-0.c @@ -0,0 +1,12 @@ +/* { dg-do run } */ +/* { dg-require-ifunc "" } */ +/* { dg-require-effective-target mmap } */ +/* { dg-options "-Wno-experimental-fmv-target" } */ + +#include <stdint.h> + +typedef struct { + uint64_t size; +} ifunc_arg_t; + +#include "ifunc-resolver.in" diff --git a/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-1.c b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-1.c new file mode 100644 index 0000000..be70687 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-1.c @@ -0,0 +1,13 @@ +/* { dg-do run } */ +/* { dg-require-ifunc "" } */ +/* { dg-require-effective-target mmap } */ +/* { dg-options "-Wno-experimental-fmv-target" } */ + +#include <stdint.h> + +typedef struct { + uint64_t size; + uint64_t hwcap; +} ifunc_arg_t; + +#include "ifunc-resolver.in" diff --git a/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-2.c b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-2.c new file mode 100644 index 0000000..bf594d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-2.c @@ -0,0 +1,14 @@ +/* { dg-do run } */ +/* { dg-require-ifunc "" } */ +/* { dg-require-effective-target mmap } */ +/* { dg-options "-Wno-experimental-fmv-target" } */ + +#include <stdint.h> + +typedef struct { + uint64_t size; + uint64_t hwcap; + uint64_t hwcap2; +} ifunc_arg_t; + +#include "ifunc-resolver.in" diff --git a/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-3.c b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-3.c new file mode 100644 index 0000000..f16d01b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-3.c @@ -0,0 +1,15 @@ +/* { dg-do run } */ +/* { dg-require-ifunc "" } */ +/* { dg-require-effective-target mmap } */ +/* { dg-options "-Wno-experimental-fmv-target" } */ + +#include <stdint.h> + +typedef struct { + uint64_t size; + uint64_t hwcap; + uint64_t hwcap2; + uint64_t hwcap3; +} ifunc_arg_t; + +#include "ifunc-resolver.in" diff --git a/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-4.c b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-4.c new file mode 100644 index 0000000..1b4ccbd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver-4.c @@ -0,0 +1,16 @@ +/* { dg-do run } */ +/* { dg-require-ifunc "" } */ +/* { dg-require-effective-target mmap } */ +/* { dg-options "-Wno-experimental-fmv-target" } */ + +#include <stdint.h> + +typedef struct { + uint64_t size; + uint64_t hwcap; + uint64_t hwcap2; + uint64_t hwcap3; + uint64_t hwcap4; +} ifunc_arg_t; + +#include "ifunc-resolver.in" diff --git a/gcc/testsuite/gcc.target/aarch64/ifunc-resolver.in b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver.in new file mode 100644 index 0000000..ada0b33 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ifunc-resolver.in @@ -0,0 +1,48 @@ +#include <unistd.h> +#include <string.h> +#include <sys/mman.h> + +/* Allocate memory buffer of size LEN with a protected page + following right after the buffer end so that any memory + accesses past the end of the buffer would trigger SEGFAUL. */ +void *allocate_mem (size_t len) +{ + size_t pagesize = sysconf (_SC_PAGESIZE); + char *m = mmap (NULL, pagesize * 2, + PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, + -1, 0); + mprotect (m + pagesize, pagesize, PROT_NONE); + m = m + pagesize - len; + memset(m, 0, len); + return m; +} + +int impl () +{ + return 0; +} + +#ifndef _IFUNC_ARG_HWCAP +#define _IFUNC_ARG_HWCAP (1ULL << 62) +#endif + +void +__init_cpu_features_resolver (unsigned long hwcap, const void *arg); + +static void * +fun_resolver (uint64_t a0, const uint64_t *a1) +{ + ifunc_arg_t *arg = allocate_mem (sizeof (ifunc_arg_t)); + arg->size = sizeof (ifunc_arg_t); + /* Call this function with synthetic ifunc_arg_t arg. */ + __init_cpu_features_resolver (_IFUNC_ARG_HWCAP, arg); + return (void *)(uintptr_t)impl; +} + +int fun (void) __attribute__ ((ifunc ("fun_resolver"))); + +int main (int argc, char *argv[]) +{ + return fun (); +} diff --git a/gcc/testsuite/gcc.target/aarch64/inszero_split_1.c b/gcc/testsuite/gcc.target/aarch64/inszero_split_1.c new file mode 100644 index 0000000..5c739bd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/inszero_split_1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ + +/* Avoid INS from WZR register when optimizing for speed. */ + +#include <arm_neon.h> + +/* +** foo: +** movi? [vdz]([0-9]+)\.?(?:[0-9]*[bhsd])?, #?0 +** ins v0.h\[2\], v(\1).h\[0\] +** ret +*/ +uint16x8_t foo(uint16x8_t a) { + a[2] = 0; + return a; +} diff --git a/gcc/testsuite/gcc.target/aarch64/ldapr-sext.c b/gcc/testsuite/gcc.target/aarch64/ldapr-sext.c index f57c09d..e8a545a 100644 --- a/gcc/testsuite/gcc.target/aarch64/ldapr-sext.c +++ b/gcc/testsuite/gcc.target/aarch64/ldapr-sext.c @@ -33,7 +33,7 @@ TEST(s8_s64, s8, long long) /* **test_s16_s64: **... -** ldapursh x0, \[x[0-9]+\] +** ldapursh x0, \[x[0-9]+, [0-9]+\] ** ret */ @@ -42,7 +42,7 @@ TEST(s16_s64, s16, long long) /* **test_s32_s64: **... -** ldapursw x0, \[x[0-9]+\] +** ldapursw x0, \[x[0-9]+, [0-9]+\] ** ret */ @@ -60,7 +60,7 @@ TEST(s8_s32, s8, int) /* **test_s16_s32: **... -** ldapursh w0, \[x[0-9]+\] +** ldapursh w0, \[x[0-9]+, [0-9]+\] ** ret */ diff --git a/gcc/testsuite/gcc.target/aarch64/ldapur.c b/gcc/testsuite/gcc.target/aarch64/ldapur.c new file mode 100644 index 0000000..5c68bdd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ldapur.c @@ -0,0 +1,77 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -std=c99" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ + +#include <stdatomic.h> +#include <stdint.h> + +#pragma GCC target "arch=armv8.8-a" + +atomic_ullong u64; +atomic_uint u32; +atomic_ushort u16; +atomic_uchar u8[2]; /* Force an offset for u8 */ + +#define TEST(name, ldsize, rettype) \ +rettype \ +test_##name (void) \ +{ \ + return atomic_load_explicit (&ldsize, memory_order_acquire); \ +} \ + + +/* +** test_u8_u64: +** ... +** ldapurb w[0-9]+, \[x[0-9]+, [0-9]+\] +** ret +*/ +TEST(u8_u64, u8[1], uint64_t) + +/* +** test_u16_u64: +** ... +** ldapurh w[0-9]+, \[x[0-9]+, [0-9]+\] +** ret +*/ +TEST(u16_u64, u16, uint64_t) + +/* +**test_u32_u64: +** ... +** ldapur w[0-9]+, \[x[0-9]+, [0-9]+\] +** ret +*/ +TEST(u32_u64, u32, uint64_t) + +/* +**test_u64_u64: +** ... +** ldapur x[0-9]+, \[x[0-9]+, [0-9]+\] +** ret +*/ +TEST(u64_u64, u64, uint64_t) + +/* +**test_u8_u32: +** ... +** ldapurb w[0-9]+, \[x[0-9]+, [0-9]+\] +** ret +*/ +TEST(u8_u32, u8[1], uint32_t) + +/* +**test_u16_u32: +** ... +** ldapurh w[0-9]+, \[x[0-9]+, [0-9]+\] +** ret +*/ +TEST(u16_u32, u16, uint32_t) + +/* +**test_u32_u32: +** ... +** ldapur w[0-9]+, \[x[0-9]+, [0-9]+\] +** ret +*/ +TEST(u32_u32, u32, uint32_t)
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/aarch64/ldapur_avoid.c b/gcc/testsuite/gcc.target/aarch64/ldapur_avoid.c new file mode 100644 index 0000000..ad87a30 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/ldapur_avoid.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -std=c99 -moverride=tune=avoid_ldapur" } */ + +#include <stdatomic.h> +#include <stdint.h> + +#pragma GCC target "arch=armv8.8-a" +/* LDAPUR is only avoided for armv8.4 to armv8.7. This checks for the working +of avoid_ldapur flag. */ + +/* { dg-final { scan-assembler-not "ldapur\t" } } */ + +atomic_ullong u64; +atomic_uint u32; +atomic_ushort u16; +atomic_uchar u8[2]; /* Force an offset for u8 */ + +#define TEST(name, ldsize, rettype) \ +rettype \ +test_##name (void) \ +{ \ + return atomic_load_explicit (&ldsize, memory_order_acquire); \ +} \ + +TEST(u8_u64, u8[1], uint64_t) +TEST(u16_u64, u16, uint64_t) +TEST(u32_u64, u32, uint64_t) +TEST(u64_u64, u64, uint64_t) +TEST(u8_u32, u8[1], uint32_t) +TEST(u16_u32, u16, uint32_t) +TEST(u32_u32, u32, uint32_t) + +/* { dg-final { scan-assembler-times "ldapr\t" 3 } } */ +/* { dg-final { scan-assembler-times "ldaprh\t" 2 } } */ +/* { dg-final { scan-assembler-times "ldaprb\t" 2 } } */ + + diff --git a/gcc/testsuite/gcc.target/aarch64/pr121300.c b/gcc/testsuite/gcc.target/aarch64/pr121300.c new file mode 100644 index 0000000..5f2cd9a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr121300.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-S -O3 -march=armv9-a+sme2" } */ + +#include <arm_sme.h> + +svfloat16x2_t test (svfloat16x2_t zd, svfloat16x2_t zm) __arm_streaming +{ + return svamin_f16_x2 (zd, zm); // { dg-error "ACLE function .svamin_f16_x2. requires ISA extension .faminmax." } +} diff --git a/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_1.c b/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_1.c index acd2e11..8fc1569 100644 --- a/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_1.c +++ b/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_1.c @@ -4,24 +4,24 @@ /* ** uadd: -** dup v([0-9]+).8b, w1 -** dup v([0-9]+).8b, w0 +** dup v([0-9]+).8b, w[01] +** dup v([0-9]+).8b, w[01] ** uqadd b([0-9]+), (?:b\2, b\1|b\1, b\2) ** umov w0, v\3.b\[0\] ** ret */ /* ** uadd2: -** dup v([0-9]+).8b, w1 -** dup v([0-9]+).8b, w0 +** dup v([0-9]+).8b, w[01] +** dup v([0-9]+).8b, w[01] ** uqadd b([0-9]+), (?:b\2, b\1|b\1, b\2) ** umov w0, v\3.b\[0\] ** ret */ /* ** usub: { xfail *-*-* } -** dup v([0-9]+).8b, w1 -** dup v([0-9]+).8b, w0 +** dup v([0-9]+).8b, w[01] +** dup v([0-9]+).8b, w[01] ** uqsub b([0-9]+), b\1, b\2 ** umov w0, v\3.b\[0\] ** ret diff --git a/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_2.c b/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_2.c index 86c88f8..dd0fefa 100644 --- a/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_2.c +++ b/gcc/testsuite/gcc.target/aarch64/saturating_arithmetic_2.c @@ -4,16 +4,16 @@ /* ** uadd: -** dup v([0-9]+).4h, w1 -** dup v([0-9]+).4h, w0 +** dup v([0-9]+).4h, w[01] +** dup v([0-9]+).4h, w[01] ** uqadd h([0-9]+), (?:h\2, h\1|h\1, h\2) ** umov w0, v\3.h\[0\] ** ret */ /* ** uadd2: -** dup v([0-9]+).4h, w1 -** dup v([0-9]+).4h, w0 +** dup v([0-9]+).4h, w[01] +** dup v([0-9]+).4h, w[01] ** uqadd h([0-9]+), (?:h\2, h\1|h\1, h\2) ** umov w0, v\3.h\[0\] ** ret diff --git a/gcc/testsuite/gcc.target/aarch64/simd/bcax_d.c b/gcc/testsuite/gcc.target/aarch64/simd/bcax_d.c new file mode 100644 index 0000000..a7640c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/simd/bcax_d.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#include <arm_neon.h> + +#pragma GCC target "+sha3" + +#define BCAX(x,y,z) ((x) ^ ((y) & ~(z))) + +/* When the inputs come from GP regs don't form a BCAX. */ +uint64_t bcax_d_gp (uint64_t a, uint64_t b, uint64_t c) { return BCAX (a, b, c); } + +uint64x1_t bcax_d (uint64x1_t a, uint64x1_t b, uint64x1_t c) { return BCAX (a, b, c); } +uint32x2_t bcax_s (uint32x2_t a, uint32x2_t b, uint32x2_t c) { return BCAX (a, b, c); } +uint16x4_t bcax_h (uint16x4_t a, uint16x4_t b, uint16x4_t c) { return BCAX (a, b, c); } +uint8x8_t bcax_b (uint8x8_t a, uint8x8_t b, uint8x8_t c) { return BCAX (a, b, c); } + +/* { dg-final { scan-assembler-times {bcax\tv0.16b, v0.16b, v1.16b, v2.16b} 4 } } */ + diff --git a/gcc/testsuite/gcc.target/aarch64/simd/eor3_d.c b/gcc/testsuite/gcc.target/aarch64/simd/eor3_d.c new file mode 100644 index 0000000..7f2b2b4 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/simd/eor3_d.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#include <arm_neon.h> + +#pragma GCC target "+sha3" + +#define EOR3(x,y,z) ((x) ^ (y) ^ (z)) + +uint32x2_t bcax_s (uint32x2_t a, uint32x2_t b, uint32x2_t c) { return EOR3 (a, b, c); } +uint16x4_t bcax_h (uint16x4_t a, uint16x4_t b, uint16x4_t c) { return EOR3 (a, b, c); } +uint8x8_t bcax_b (uint8x8_t a, uint8x8_t b, uint8x8_t c) { return EOR3 (a, b, c); } + +/* { dg-final { scan-assembler-times {eor3\tv0.16b, v[0-9]+.16b, v[0-9]+.16b, v[0-9]+.16b} 3 } } */ + diff --git a/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_1.c b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_1.c new file mode 100644 index 0000000..f082198 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_1.c @@ -0,0 +1,716 @@ +/* { dg-do compile } */ +/* { dg-options "-O -march=armv9-a+bf16" } */ + +#include <arm_neon.h> + +/* We should use the highpart instruction where doing so would avoid data + movement instructions. This case, where all the arguments are non-constant + vector highparts, can be handled by either gimple_fold_builtin or combine. */ + +#ifndef TEST_UN_HIGHPARTS +#define TEST_UN_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (INTYPE a) \ + { \ + return FN##_##SUFF (vget_high_##SUFF (a)); \ + } +#endif + +#ifndef TEST_BIN_W_HIGHPARTS +#define TEST_BIN_W_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (RETTYPE a, INTYPE b) \ + { \ + return FN##_##SUFF (a, vget_high_##SUFF (b)); \ + } +#endif + +#ifndef TEST_BIN_N_HIGHPARTS +#define TEST_BIN_N_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (INTYPE a) \ + { \ + return FN##_##SUFF (vget_high_##SUFF (a), a[1]); \ + } +#endif + +#ifndef TEST_TERN_N_HIGHPARTS +#define TEST_TERN_N_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (RETTYPE a, INTYPE b) \ + { \ + return FN##_##SUFF (a, vget_high_##SUFF (b), b[1]); \ + } +#endif + +#ifndef TEST_BIN_HIGHPARTS +#define TEST_BIN_HIGHPARTS(FN, RETTYPE, INTYPE, H_INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (INTYPE a, INTYPE b) \ + { \ + return FN##_##SUFF (vget_high_##SUFF (a), \ + vget_high_##SUFF (b)); \ + } +#endif + +#ifndef TEST_TERN_HIGHPARTS +#define TEST_TERN_HIGHPARTS(FN, RETTYPE, INTYPE, H_INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (RETTYPE a, INTYPE b, INTYPE c) \ + { \ + return FN##_##SUFF(a, vget_high_##SUFF (b), \ + vget_high_##SUFF (c)); \ + } +#endif + +#define TEST_UNOP(FN) \ + TEST_UN_HIGHPARTS (FN, int16x8_t, int8x16_t, s8) \ + TEST_UN_HIGHPARTS (FN, uint16x8_t, uint8x16_t, u8) \ + TEST_UN_HIGHPARTS (FN, int32x4_t, int16x8_t, s16) \ + TEST_UN_HIGHPARTS (FN, uint32x4_t, uint16x8_t, u16) \ + TEST_UN_HIGHPARTS (FN, int64x2_t, int32x4_t, s32) \ + TEST_UN_HIGHPARTS (FN, uint64x2_t, uint32x4_t, u32) + +#define TEST_BINOP(FN) \ + TEST_BIN_HIGHPARTS (FN, int16x8_t, int8x16_t, int8x8_t, s8) \ + TEST_BIN_HIGHPARTS (FN, uint16x8_t, uint8x16_t, uint8x8_t, u8) \ + TEST_BIN_HIGHPARTS (FN, int32x4_t, int16x8_t, int16x4_t, s16) \ + TEST_BIN_HIGHPARTS (FN, uint32x4_t, uint16x8_t, uint16x4_t, u16) \ + TEST_BIN_HIGHPARTS (FN, int64x2_t, int32x4_t, int32x2_t, s32) \ + TEST_BIN_HIGHPARTS (FN, uint64x2_t, uint32x4_t, uint32x2_t, u32) + +#define TEST_BINOP_N(FN) \ + TEST_BIN_N_HIGHPARTS (FN, int32x4_t, int16x8_t, s16) \ + TEST_BIN_N_HIGHPARTS (FN, uint32x4_t, uint16x8_t, u16) \ + TEST_BIN_N_HIGHPARTS (FN, int64x2_t, int32x4_t, s32) \ + TEST_BIN_N_HIGHPARTS (FN, uint64x2_t, uint32x4_t, u32) + +#define TEST_BINOP_W(FN) \ + TEST_BIN_W_HIGHPARTS (FN, int16x8_t, int8x16_t, s8) \ + TEST_BIN_W_HIGHPARTS (FN, uint16x8_t, uint8x16_t, u8) \ + TEST_BIN_W_HIGHPARTS (FN, int32x4_t, int16x8_t, s16) \ + TEST_BIN_W_HIGHPARTS (FN, uint32x4_t, uint16x8_t, u16) \ + TEST_BIN_W_HIGHPARTS (FN, int64x2_t, int32x4_t, s32) \ + TEST_BIN_W_HIGHPARTS (FN, uint64x2_t, uint32x4_t, u32) + +#define TEST_TERNOP_N(FN) \ + TEST_TERN_N_HIGHPARTS (FN, int32x4_t, int16x8_t, s16) \ + TEST_TERN_N_HIGHPARTS (FN, uint32x4_t, uint16x8_t, u16) \ + TEST_TERN_N_HIGHPARTS (FN, int64x2_t, int32x4_t, s32) \ + TEST_TERN_N_HIGHPARTS (FN, uint64x2_t, uint32x4_t, u32) + +#define TEST_TERNOP(FN) \ + TEST_TERN_HIGHPARTS (FN, int16x8_t, int8x16_t, int8x8_t, s8) \ + TEST_TERN_HIGHPARTS (FN, uint16x8_t, uint8x16_t, uint8x8_t, u8) \ + TEST_TERN_HIGHPARTS (FN, int32x4_t, int16x8_t, int16x4_t, s16) \ + TEST_TERN_HIGHPARTS (FN, uint32x4_t, uint16x8_t, uint16x4_t, u16) \ + TEST_TERN_HIGHPARTS (FN, int64x2_t, int32x4_t, int32x2_t, s32) \ + TEST_TERN_HIGHPARTS (FN, uint64x2_t, uint32x4_t, uint32x2_t, u32) + +#define TEST_VQDMULL \ + TEST_BIN_HIGHPARTS (vqdmull, int32x4_t, int16x8_t, int16x4_t, s16) \ + TEST_BIN_HIGHPARTS (vqdmull, int64x2_t, int32x4_t, int32x2_t, s32) + +#define TEST_VQDMULL_N \ + TEST_BIN_N_HIGHPARTS (vqdmull_n, int32x4_t, int16x8_t, s16) \ + TEST_BIN_N_HIGHPARTS (vqdmull_n, int64x2_t, int32x4_t, s32) + +#define TEST_VQMLAL \ + TEST_TERN_HIGHPARTS (vqdmlal, int32x4_t, int16x8_t, int16x4_t, s16) \ + TEST_TERN_HIGHPARTS (vqdmlal, int64x2_t, int32x4_t, int32x2_t, s32) + +#define TEST_VQMLAL_N \ + TEST_TERN_N_HIGHPARTS (vqdmlal_n, int32x4_t, int16x8_t, s16) \ + TEST_TERN_N_HIGHPARTS (vqdmlal_n, int64x2_t, int32x4_t, s32) + +#define TEST_VQMLSL \ + TEST_TERN_HIGHPARTS (vqdmlsl, int32x4_t, int16x8_t, int16x4_t, s16) \ + TEST_TERN_HIGHPARTS (vqdmlsl, int64x2_t, int32x4_t, int32x2_t, s32) + +#define TEST_VQMLSL_N \ + TEST_TERN_N_HIGHPARTS (vqdmlsl_n, int32x4_t, int16x8_t, s16) \ + TEST_TERN_N_HIGHPARTS (vqdmlsl_n, int64x2_t, int32x4_t, s32) + +#define TEST_VMOVL \ + TEST_UNOP (vmovl) + +#define TEST_VMULL \ + TEST_BINOP (vmull) \ + TEST_BIN_HIGHPARTS (vmull, poly16x8_t, poly8x16_t, poly8x8_t, p8) + +#define TEST_VMULL_N \ + TEST_BINOP_N (vmull_n) + +#define TEST_VADDL \ + TEST_BINOP (vaddl) + +#define TEST_VSUBL \ + TEST_BINOP (vsubl) + +#define TEST_VMLAL \ + TEST_TERNOP (vmlal) + +#define TEST_VMLAL_N \ + TEST_TERNOP_N (vmlal_n) + +#define TEST_VMLSL \ + TEST_TERNOP (vmlsl) + +#define TEST_VMLSL_N \ + TEST_TERNOP_N (vmlsl_n) + +#define TEST_VABDL \ + TEST_BINOP (vabdl) + +#define TEST_VABAL \ + TEST_TERNOP (vabal) + +#define TEST_VSUBW \ + TEST_BINOP_W (vsubw) + +#define TEST_VADDW \ + TEST_BINOP_W (vaddw) + +/* +** test_vmovl_s8: +** sxtl2 v0\.8h, v0\.16b +** ret +*/ + +/* +** test_vmovl_u8: +** uxtl2 v0\.8h, v0\.16b +** ret +*/ + +/* +** test_vmovl_s16: +** sxtl2 v0\.4s, v0\.8h +** ret +*/ + +/* +** test_vmovl_u16: +** uxtl2 v0\.4s, v0\.8h +** ret +*/ + +/* +** test_vmovl_s32: +** sxtl2 v0\.2d, v0\.4s +** ret +*/ + +/* +** test_vmovl_u32: +** uxtl2 v0\.2d, v0\.4s +** ret +*/ + +TEST_VMOVL + +/* +** test_vmull_s8: +** smull2 v0\.8h, (v0\.16b, v1\.16b|v1\.16b, v0\.16b) +** ret +*/ + +/* +** test_vmull_u8: +** umull2 v0\.8h, (v0\.16b, v1\.16b|v1\.16b, v0\.16b) +** ret +*/ + +/* +** test_vmull_s16: +** smull2 v0\.4s, (v0\.8h, v1\.8h|v1\.8h, v0\.8h) +** ret +*/ + +/* +** test_vmull_u16: +** umull2 v0\.4s, (v0\.8h, v1\.8h|v1\.8h, v0\.8h) +** ret +*/ + +/* +** test_vmull_s32: +** smull2 v0\.2d, (v0\.4s, v1\.4s|v1\.4s, v0\.4s) +** ret +*/ + +/* +** test_vmull_u32: +** umull2 v0\.2d, (v0\.4s, v1\.4s|v1\.4s, v0\.4s) +** ret +*/ + +/* +** test_vmull_p8: +** pmull2 v0\.8h, (v0\.16b, v1\.16b|v1\.16b, v0\.16b) +** ret +*/ + +TEST_VMULL + +/* +** test_vmull_n_s16: +** smull2 v0\.4s, v0\.8h, v0\.h\[[0-7]\] +** ret +*/ + +/* +** test_vmull_n_u16: +** umull2 v0\.4s, v0\.8h, v0\.h\[[0-7]\] +** ret +*/ + +/* +** test_vmull_n_s32: +** smull2 v0\.2d, v0\.4s, v0\.s\[[0-3]\] +** ret +*/ + +/* +** test_vmull_n_u32: +** umull2 v0\.2d, v0\.4s, v0\.s\[[0-3]\] +** ret +*/ + +TEST_VMULL_N + +/* +** test_vaddl_s8: +** saddl2 v0\.8h, (v0\.16b, v1\.16b|v1\.16b, v0\.16b) +** ret +*/ + +/* +** test_vaddl_u8: +** uaddl2 v0\.8h, (v0\.16b, v1\.16b|v1\.16b, v0\.16b) +** ret +*/ + +/* +** test_vaddl_s16: +** saddl2 v0\.4s, (v0\.8h, v1\.8h|v1\.8h, v0\.8h) +** ret +*/ + +/* +** test_vaddl_u16: +** uaddl2 v0\.4s, (v0\.8h, v1\.8h|v1\.8h, v0\.8h) +** ret +*/ + +/* +** test_vaddl_s32: +** saddl2 v0\.2d, (v0\.4s, v1\.4s|v1\.4s, v0\.4s) +** ret +*/ + +/* +** test_vaddl_u32: +** uaddl2 v0\.2d, (v0\.4s, v1\.4s|v1\.4s, v0\.4s) +** ret +*/ + +TEST_VADDL + +/* +** test_vsubl_s8: +** ssubl2 v0\.8h, v0\.16b, v1\.16b +** ret +*/ + +/* +** test_vsubl_u8: +** usubl2 v0\.8h, v0\.16b, v1\.16b +** ret +*/ + +/* +** test_vsubl_s16: +** ssubl2 v0\.4s, v0\.8h, v1\.8h +** ret +*/ + +/* +** test_vsubl_u16: +** usubl2 v0\.4s, v0\.8h, v1\.8h +** ret +*/ + +/* +** test_vsubl_s32: +** ssubl2 v0\.2d, v0\.4s, v1\.4s +** ret +*/ + +/* +** test_vsubl_u32: +** usubl2 v0\.2d, v0\.4s, v1\.4s +** ret +*/ + +TEST_VSUBL + +/* +** test_vabal_s8: +** sabal2 v0\.8h, (v1\.16b, v2\.16b|v2\.16b, v1\.16b) +** ret +*/ + +/* +** test_vabal_u8: +** uabal2 v0\.8h, (v1\.16b, v2\.16b|v2\.16b, v1\.16b) +** ret +*/ + +/* +** test_vabal_s16: +** sabal2 v0\.4s, (v1\.8h, v2\.8h|v2\.8h, v1\.8h) +** ret +*/ + +/* +** test_vabal_u16: +** uabal2 v0\.4s, (v1\.8h, v2\.8h|v2\.8h, v1\.8h) +** ret +*/ + +/* +** test_vabal_s32: +** sabal2 v0\.2d, (v1\.4s, v2\.4s|v2\.4s, v1\.4s) +** ret +*/ + +/* +** test_vabal_u32: +** uabal2 v0\.2d, (v1\.4s, v2\.4s|v2\.4s, v1\.4s) +** ret +*/ + +TEST_VABAL + +/* +** test_vsubw_s8: +** ssubw2 v0\.8h, v0\.8h, v1\.16b +** ret +*/ + +/* +** test_vsubw_u8: +** usubw2 v0\.8h, v0\.8h, v1\.16b +** ret +*/ + +/* +** test_vsubw_s16: +** ssubw2 v0\.4s, v0\.4s, v1\.8h +** ret +*/ + +/* +** test_vsubw_u16: +** usubw2 v0\.4s, v0\.4s, v1\.8h +** ret +*/ + +/* +** test_vsubw_s32: +** ssubw2 v0\.2d, v0\.2d, v1\.4s +** ret +*/ + +/* +** test_vsubw_u32: +** usubw2 v0\.2d, v0\.2d, v1\.4s +** ret +*/ + +TEST_VSUBW + +/* +** test_vaddw_s8: +** saddw2 v0\.8h, v0\.8h, v1\.16b +** ret +*/ + +/* +** test_vaddw_u8: +** uaddw2 v0\.8h, v0\.8h, v1\.16b +** ret +*/ + +/* +** test_vaddw_s16: +** saddw2 v0\.4s, v0\.4s, v1\.8h +** ret +*/ + +/* +** test_vaddw_u16: +** uaddw2 v0\.4s, v0\.4s, v1\.8h +** ret +*/ + +/* +** test_vaddw_s32: +** saddw2 v0\.2d, v0\.2d, v1\.4s +** ret +*/ + +/* +** test_vaddw_u32: +** uaddw2 v0\.2d, v0\.2d, v1\.4s +** ret +*/ + +TEST_VADDW + +/* +** test_vabdl_s8: +** sabdl2 v0\.8h, (v0\.16b, v1\.16b|v1\.16b, v0\.16b) +** ret +*/ + +/* +** test_vabdl_u8: +** uabdl2 v0\.8h, (v0\.16b, v1\.16b|v1\.16b, v0\.16b) +** ret +*/ + +/* +** test_vabdl_s16: +** sabdl2 v0\.4s, (v0\.8h, v1\.8h|v1\.8h, v0\.8h) +** ret +*/ + +/* +** test_vabdl_u16: +** uabdl2 v0\.4s, (v0\.8h, v1\.8h|v1\.8h, v0\.8h) +** ret +*/ + +/* +** test_vabdl_s32: +** sabdl2 v0\.2d, (v0\.4s, v1\.4s|v1\.4s, v0\.4s) +** ret +*/ + +/* +** test_vabdl_u32: +** uabdl2 v0\.2d, (v0\.4s, v1\.4s|v1\.4s, v0\.4s) +** ret +*/ + +TEST_VABDL + +/* +** test_vmlal_s8: +** smlal2 v0\.8h, (v1\.16b, v2\.16b|v2\.16b, v1\.16b) +** ret +*/ + +/* +** test_vmlal_u8: +** umlal2 v0\.8h, (v1\.16b, v2\.16b|v2\.16b, v1\.16b) +** ret +*/ + +/* +** test_vmlal_s16: +** smlal2 v0\.4s, (v1\.8h, v2\.8h|v2\.8h, v1\.8h) +** ret +*/ + +/* +** test_vmlal_u16: +** umlal2 v0\.4s, (v1\.8h, v2\.8h|v2\.8h, v1\.8h) +** ret +*/ + +/* +** test_vmlal_s32: +** smlal2 v0\.2d, (v1\.4s, v2\.4s|v2\.4s, v1\.4s) +** ret +*/ + +/* +** test_vmlal_u32: +** umlal2 v0\.2d, (v1\.4s, v2\.4s|v2\.4s, v1\.4s) +** ret +*/ + +TEST_VMLAL + +/* +** test_vmlal_n_s16: +** smlal2 v0\.4s, v1\.8h, v1\.h\[[0-7]\] +** ret +*/ + +/* +** test_vmlal_n_u16: +** umlal2 v0\.4s, v1\.8h, v1\.h\[[0-7]\] +** ret +*/ + +/* +** test_vmlal_n_s32: +** smlal2 v0\.2d, v1\.4s, v1\.s\[[0-3]\] +** ret +*/ + +/* +** test_vmlal_n_u32: +** umlal2 v0\.2d, v1\.4s, v1\.s\[[0-3]\] +** ret +*/ + +TEST_VMLAL_N + +/* +** test_vmlsl_s8: +** smlsl2 v0\.8h, v1\.16b, v2\.16b +** ret +*/ + +/* +** test_vmlsl_u8: +** umlsl2 v0\.8h, v1\.16b, v2\.16b +** ret +*/ + +/* +** test_vmlsl_s16: +** smlsl2 v0\.4s, v1\.8h, v2\.8h +** ret +*/ + +/* +** test_vmlsl_u16: +** umlsl2 v0\.4s, v1\.8h, v2\.8h +** ret +*/ + +/* +** test_vmlsl_s32: +** smlsl2 v0\.2d, v1\.4s, v2\.4s +** ret +*/ + +/* +** test_vmlsl_u32: +** umlsl2 v0\.2d, v1\.4s, v2\.4s +** ret +*/ + +TEST_VMLSL + +/* +** test_vmlsl_n_s16: +** smlsl2 v0\.4s, v1\.8h, v1\.h\[[0-7]\] +** ret +*/ + +/* +** test_vmlsl_n_u16: +** umlsl2 v0\.4s, v1\.8h, v1\.h\[[0-7]\] +** ret +*/ + +/* +** test_vmlsl_n_s32: +** smlsl2 v0\.2d, v1\.4s, v1\.s\[[0-3]\] +** ret +*/ + +/* +** test_vmlsl_n_u32: +** umlsl2 v0\.2d, v1\.4s, v1\.s\[[0-3]\] +** ret +*/ + +TEST_VMLSL_N + +/* +** test_vqdmull_s16: +** sqdmull2 v0\.4s, (v0\.8h, v1\.8h|v1\.8h, v0\.8h) +** ret +*/ + +/* +** test_vqdmull_s32: +** sqdmull2 v0\.2d, (v0\.4s, v1\.4s|v1\.4s, v0\.4s) +** ret +*/ + +TEST_VQDMULL + +/* +** test_vqdmull_n_s16: +** sqdmull2 v0\.4s, v0\.8h, v0\.h\[[0-7]\] +** ret +*/ + +/* +** test_vqdmull_n_s32: +** sqdmull2 v0\.2d, v0\.4s, v0\.s\[[0-3]\] +** ret +*/ + +TEST_VQDMULL_N + +/* +** test_vqdmlal_s16: +** sqdmlal2 v0\.4s, (v1\.8h, v2\.8h|v2\.8h, v1\.8h) +** ret +*/ + +/* +** test_vqdmlal_s32: +** sqdmlal2 v0\.2d, (v1\.4s, v2\.4s|v2\.4s, v1\.4s) +** ret +*/ + +TEST_VQMLAL + +/* +** test_vqdmlal_n_s16: +** sqdmlal2 v0\.4s, v1\.8h, v1\.h\[[0-7]\] +** ret +*/ + +/* +** test_vqdmlal_n_s32: +** sqdmlal2 v0\.2d, v1\.4s, v1\.s\[[0-3]\] +** ret +*/ + +TEST_VQMLAL_N + +/* +** test_vqdmlsl_s16: +** sqdmlsl2 v0\.4s, v1\.8h, v2\.8h +** ret +*/ + +/* +** test_vqdmlsl_s32: +** sqdmlsl2 v0\.2d, v1\.4s, v2\.4s +** ret +*/ + +TEST_VQMLSL + +/* +** test_vqdmlsl_n_s16: +** sqdmlsl2 v0\.4s, v1\.8h, v1\.h\[[0-7]\] +** ret +*/ + +/* +** test_vqdmlsl_n_s32: +** sqdmlsl2 v0\.2d, v1\.4s, v1\.s\[[0-3]\] +** ret +*/ + +TEST_VQMLSL_N + +/* { dg-final { check-function-bodies "**" ""} } */ diff --git a/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_2.c b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_2.c new file mode 100644 index 0000000..5885b28 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_2.c @@ -0,0 +1,88 @@ +/* { dg-do compile } */ +/* { dg-options "-O -march=armv9-a+bf16" } */ + +/* We should not use the highpart instruction unless doing so would avoid + data movement instructions. That is, unless at least one argument is a + reference to the highpart of a non-constant vector. */ + +#define TEST_UN_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_## SUFF () \ + { \ + INTYPE a = vdupq_n_##SUFF (0x1A); \ + return FN##_##SUFF (vget_high_##SUFF (a)); \ + } + +#define TEST_BIN_W_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (RETTYPE a) \ + { \ + INTYPE b = vdupq_n_##SUFF (0x1A); \ + return FN##_##SUFF (a, vget_high_##SUFF (b)); \ + } + +#define TEST_BIN_N_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (INTYPE c) \ + { \ + INTYPE a = vdupq_n_##SUFF (0x1A); \ + return FN##_##SUFF (vget_high_##SUFF (a), c[1]); \ + } + +#define TEST_TERN_N_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (RETTYPE a) \ + { \ + INTYPE b = vdupq_n_##SUFF (0x1A); \ + return FN##_##SUFF (a, vget_high_##SUFF (b), b[1]); \ + } + +#define TEST_BIN_HIGHPARTS(FN, RETTYPE, INTYPE, H_INTYPE, SUFF) \ + RETTYPE test_##FN##_## SUFF (H_INTYPE b) \ + { \ + INTYPE a = vdupq_n_##SUFF (0x1A); \ + return FN##_##SUFF (vget_high_##SUFF (a), b); \ + } + +#define TEST_TERN_HIGHPARTS(FN, RETTYPE, INTYPE, H_INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (RETTYPE a, H_INTYPE b) \ + { \ + INTYPE c = vdupq_n_##SUFF (0x1A); \ + return FN##_##SUFF (a, vget_high_##SUFF (c), b); \ + } + +#include "fold_to_highpart_1.c" + + +/* { dg-final { scan-assembler-not {uxtl2\t} } } */ +/* { dg-final { scan-assembler-not {sxtl2\t} } } */ + +/* { dg-final { scan-assembler-not {umull2\t} } } */ +/* { dg-final { scan-assembler-not {smull2\t} } } */ +/* { dg-final { scan-assembler-not {pmull2\t} } } */ + +/* { dg-final { scan-assembler-not {uaddl2\t} } } */ +/* { dg-final { scan-assembler-not {saddl2\t} } } */ + +/* { dg-final { scan-assembler-not {usubl2\t} } } */ +/* { dg-final { scan-assembler-not {ssubl2\t} } } */ + +/* { dg-final { scan-assembler-not {uabal2\t} } } */ +/* { dg-final { scan-assembler-not {sabal2\t} } } */ + +/* { dg-final { scan-assembler-not {uabdl2\t} } } */ +/* { dg-final { scan-assembler-not {sabdl2\t} } } */ + +/* { dg-final { scan-assembler-not {usubw2\t} } } */ +/* { dg-final { scan-assembler-not {ssubw2\t} } } */ + +/* { dg-final { scan-assembler-not {uaddw2\t} } } */ +/* { dg-final { scan-assembler-not {saddw2\t} } } */ + +/* { dg-final { scan-assembler-not {umlal2\t} } } */ +/* { dg-final { scan-assembler-not {smlal2\t} } } */ + +/* { dg-final { scan-assembler-not {umlsl2\t} } } */ +/* { dg-final { scan-assembler-not {smlsl2\t} } } */ + +/* { dg-final { scan-assembler-not {sqdmull2\t} } } */ + +/* { dg-final { scan-assembler-not {sqdmlal2\t} } } */ + +/* { dg-final { scan-assembler-not {sqdmlsl2\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_3.c b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_3.c new file mode 100644 index 0000000..3baf826 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_3.c @@ -0,0 +1,83 @@ +/* { dg-do compile } */ +/* { dg-options "-O" } */ + +/* PR117850 */ + +/* We should use the highpart instruction where doing so would avoid data + movement instructions. We avoid a DUP here after extending the + VECTOR_CSTs to 128-bits. */ + +#define TEST_UN_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) +#define TEST_BIN_W_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) +#define TEST_BIN_N_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) +#define TEST_TERN_N_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) + +#define TEST_BIN_HIGHPART_A1(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_a1_##FN##_##SUFF (INTYPE a) \ + { \ + INTYPE b = vdupq_n_##SUFF (0x1A); \ + return FN##_##SUFF (vget_high_##SUFF (a), \ + vget_high_##SUFF (b)); \ + } + +#define TEST_BIN_HIGHPART_A2(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_a2_##FN##_##SUFF (INTYPE a) \ + { \ + INTYPE b = vdupq_n_##SUFF (0x1A); \ + return FN##_##SUFF (vget_high_##SUFF (b), \ + vget_high_##SUFF (a)); \ + } + +#define TEST_TERN_HIGHPART_A1(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_a1_##FN##_##SUFF (RETTYPE a, INTYPE b) \ + { \ + INTYPE c = vdupq_n_##SUFF (0x1A); \ + return FN##_##SUFF (a, vget_high_##SUFF (b), \ + vget_high_##SUFF (c)); \ + } + +#define TEST_TERN_HIGHPART_A2(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_a2_##FN##_##SUFF (RETTYPE a, INTYPE b) \ + { \ + INTYPE c = vdupq_n_##SUFF (0x1A); \ + return FN##_##SUFF (a, vget_high_##SUFF (c), \ + vget_high_##SUFF (b)); \ + } + +#define TEST_BIN_HIGHPARTS(FN, RETTYPE, INTYPE, H_INTYPE, SUFF) \ + TEST_BIN_HIGHPART_A1 (FN, RETTYPE, INTYPE, SUFF) \ + TEST_BIN_HIGHPART_A2 (FN, RETTYPE, INTYPE, SUFF) + +#define TEST_TERN_HIGHPARTS(FN, RETTYPE, INTYPE, H_INTYPE, SUFF) \ + TEST_TERN_HIGHPART_A1 (FN, RETTYPE, INTYPE, SUFF) \ + TEST_TERN_HIGHPART_A2 (FN, RETTYPE, INTYPE, SUFF) + + +#include "fold_to_highpart_1.c" + +/* { dg-final { scan-assembler-not {dup\t} } } */ + +/* { dg-final { scan-assembler-times {smull2\t} 6} } */ +/* { dg-final { scan-assembler-times {umull2\t} 6} } */ +/* { dg-final { scan-assembler-times {pmull2\t} 2} } */ + +/* { dg-final { scan-assembler-times {saddl2\t} 6} } */ +/* { dg-final { scan-assembler-times {uaddl2\t} 6} } */ + +/* { dg-final { scan-assembler-times {ssubl2\t} 6} } */ +/* { dg-final { scan-assembler-times {usubl2\t} 6} } */ + +/* { dg-final { scan-assembler-times {sabdl2\t} 6} } */ +/* { dg-final { scan-assembler-times {uabdl2\t} 6} } */ + +/* { dg-final { scan-assembler-times {smlal2\t} 6} } */ +/* { dg-final { scan-assembler-times {umlal2\t} 6} } */ + +/* { dg-final { scan-assembler-times {smlsl2\t} 6} } */ +/* { dg-final { scan-assembler-times {umlsl2\t} 6} } */ + +/* { dg-final { scan-assembler-times {sqdmull2\t} 4} } */ + +/* { dg-final { scan-assembler-times {sqdmlal2\t} 4} } */ + +/* { dg-final { scan-assembler-times {sqdmlsl2\t} 4} } */ diff --git a/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_4.c b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_4.c new file mode 100644 index 0000000..046c7a0 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_4.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target aarch64_little_endian } */ +/* { dg-options "-O -fdump-tree-optimized" } */ + +#include "arm_neon.h" + +#define VEC_CST_u8 0x0102030405060708 +#define VEC_CST_u16 0x0001000200030004 +#define VEC_CST_u32 0x0000000100000002 + +/* Extend the 64b VECTOR_CST to the type required by the hi builtin. */ + +uint16x8_t +test_u8 (uint8x16_t a) +{ + const uint8x8_t b = vcreate_u8 (VEC_CST_u8); + return vmull_u8 (vget_high_u8 (a), b); +} + +/* { dg-final { scan-tree-dump-times "\{ 8, 7, 6, 5, 4, 3, 2, 1, 8, 7, 6, 5, 4, 3, 2, 1 \}" 1 "optimized" } } */ + +uint32x4_t +test_u16 (uint16x8_t a) +{ + const uint16x4_t b = vcreate_u16 (VEC_CST_u16); + return vmull_u16 (vget_high_u16 (a), b); +} + +/* { dg-final { scan-tree-dump-times "\{ 4, 3, 2, 1, 4, 3, 2, 1 \}" 1 "optimized" } } */ + +uint64x2_t +test_u32 (uint32x4_t a) +{ + const uint32x2_t b = vcreate_u32 (VEC_CST_u32); + return vmull_u32 (vget_high_u32 (a), b); +} + +/* { dg-final { scan-tree-dump-times "\{ 2, 1, 2, 1 \}" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_5.c b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_5.c new file mode 100644 index 0000000..4f39b67 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_5.c @@ -0,0 +1,93 @@ +/* { dg-do compile } */ +/* { dg-options "-O -march=armv9-a+bf16" } */ + +/* Test that we can still fold when the base type of the vector who's + highpart we are referring to is incompatible with that of the hi + builtin. + + Use float64x2_t as it is never INTYPE. */ + +#define TEST_UN_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (float64x2_t a) \ + { \ + INTYPE x = vreinterpretq_##SUFF##_f64 (a); \ + return FN##_##SUFF(vget_high_##SUFF (x)); \ + } + +#define TEST_BIN_W_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (RETTYPE a, float64x2_t b) \ + { \ + INTYPE x = vreinterpretq_##SUFF##_f64 (b); \ + return FN##_##SUFF (a, vget_high_##SUFF (x)); \ + } + +#define TEST_BIN_N_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (float64x2_t a) \ + { \ + INTYPE x = vreinterpretq_##SUFF##_f64 (a); \ + return FN##_##SUFF (vget_high_##SUFF (x), x[1]); \ + } + +#define TEST_TERN_N_HIGHPARTS(FN, RETTYPE, INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (RETTYPE a, float64x2_t b) \ + { \ + INTYPE x = vreinterpretq_##SUFF##_f64 (b); \ + return FN##_##SUFF (a, vget_high_##SUFF (x), x[1]); \ + } + +#define TEST_BIN_HIGHPARTS(FN, RETTYPE, INTYPE, H_INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (float64x2_t a, float64x2_t b) \ + { \ + INTYPE x = vreinterpretq_##SUFF##_f64 (a); \ + INTYPE y = vreinterpretq_##SUFF##_f64 (b); \ + return FN##_##SUFF (vget_high_##SUFF (x), \ + vget_high_##SUFF (y)); \ + } + +#define TEST_TERN_HIGHPARTS(FN, RETTYPE, INTYPE, H_INTYPE, SUFF) \ + RETTYPE test_##FN##_##SUFF (RETTYPE a, float64x2_t b, float64x2_t c) \ + { \ + INTYPE x = vreinterpretq_##SUFF##_f64 (b); \ + INTYPE y = vreinterpretq_##SUFF##_f64 (c); \ + return FN##_##SUFF (a, vget_high_## SUFF (x), \ + vget_high_## SUFF (y)); \ + } + +#include "fold_to_highpart_1.c" + +/* { dg-final { scan-assembler-times {sxtl2\t} 3} } */ +/* { dg-final { scan-assembler-times {uxtl2\t} 3} } */ + +/* { dg-final { scan-assembler-times {smull2\t} 5} } */ +/* { dg-final { scan-assembler-times {umull2\t} 5} } */ +/* { dg-final { scan-assembler-times {pmull2\t} 1} } */ + +/* { dg-final { scan-assembler-times {saddl2\t} 3} } */ +/* { dg-final { scan-assembler-times {uaddl2\t} 3} } */ + +/* { dg-final { scan-assembler-times {ssubl2\t} 3} } */ +/* { dg-final { scan-assembler-times {usubl2\t} 3} } */ + +/* { dg-final { scan-assembler-times {sabdl2\t} 3} } */ +/* { dg-final { scan-assembler-times {uabdl2\t} 3} } */ + +/* { dg-final { scan-assembler-times {saddw2\t} 3} } */ +/* { dg-final { scan-assembler-times {uaddw2\t} 3} } */ + +/* { dg-final { scan-assembler-times {ssubw2\t} 3} } */ +/* { dg-final { scan-assembler-times {usubw2\t} 3} } */ + +/* { dg-final { scan-assembler-times {sabdl2\t} 3} } */ +/* { dg-final { scan-assembler-times {uabdl2\t} 3} } */ + +/* { dg-final { scan-assembler-times {smlal2\t} 5} } */ +/* { dg-final { scan-assembler-times {umlal2\t} 5} } */ + +/* { dg-final { scan-assembler-times {smlsl2\t} 5} } */ +/* { dg-final { scan-assembler-times {umlsl2\t} 5} } */ + +/* { dg-final { scan-assembler-times {sqdmull2\t} 4} } */ + +/* { dg-final { scan-assembler-times {sqdmlal2\t} 4} } */ + +/* { dg-final { scan-assembler-times {sqdmlsl2\t} 4} } */ diff --git a/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_6.c b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_6.c new file mode 100644 index 0000000..3570d4d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/simd/fold_to_highpart_6.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target aarch64_little_endian } */ +/* { dg-options "-O2 -march=armv8-a+sve" } */ + +#include <arm_neon_sve_bridge.h> + +typedef int16_t int16x16_t __attribute__ ((vector_size (32))); + +/* Edge cases where we don't/can't fold, reject these gracefully. */ + +int8x16_t z; + +int16x8_t +test_addressable () +{ + return vmovl_s8 (vget_high_s8 (z)); +} + +int16x8_t +test_scalable_type (svint8_t scalable) +{ + return vmovl_s8 (vget_high_s8 (svget_neonq_s8 (scalable))); +} + +int16x8_t +test_scalar_type (__int128_t foo) +{ + return vmovl_s8 (vget_high_s8 (vreinterpretq_s8_p128 (foo))); +} + +int32x4_t +test_256b_type (int16x16_t foo) +{ + return vmovl_s16 ((int16x4_t) { foo[4], foo[5], foo[6], foo[7] }); +} + +/* { dg-final { scan-assembler-not {sxtl2\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/simd/mf8_data_1.c b/gcc/testsuite/gcc.target/aarch64/simd/mf8_data_1.c index a3fd9b8..79d1ccf 100644 --- a/gcc/testsuite/gcc.target/aarch64/simd/mf8_data_1.c +++ b/gcc/testsuite/gcc.target/aarch64/simd/mf8_data_1.c @@ -1016,7 +1016,12 @@ mfloat8x8_t test_set_lane3(mfloat8x8_t a, const mfloat8_t *ptr) /* ** test_set_lane4: +** ( ** ins v0.b\[6\], wzr +** | +** movi? [vdz]([0-9]+)\.?(?:[0-9]*[bhsd])?, #?0 +** ins v0.b\[6\], v(\1).b\[0\] +** ) ** ret */ mfloat8x8_t test_set_lane4(mfloat8x8_t a) @@ -1056,7 +1061,12 @@ mfloat8x16_t test_setq_lane3(mfloat8x16_t a, const mfloat8_t *ptr) /* ** test_setq_lane4: +** ( ** ins v0.b\[14\], wzr +** | +** movi? [vdz]([0-9]+)\.?(?:[0-9]*[bhsd])?, #?0 +** ins v0.b\[14\], v(\1).b\[0\] +** ) ** ret */ mfloat8x16_t test_setq_lane4(mfloat8x16_t a) diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vabal_combine.c b/gcc/testsuite/gcc.target/aarch64/simd/vabal_combine.c deleted file mode 100644 index c51878a..0000000 --- a/gcc/testsuite/gcc.target/aarch64/simd/vabal_combine.c +++ /dev/null @@ -1,72 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O" } */ -/* { dg-final { check-function-bodies "**" "" "" } } */ - -#include <arm_neon.h> - -/* -** test_vabal_s8: -** sabal2 v0.8h, v2.16b, v1.16b -** ret -*/ -int16x8_t -test_vabal_s8 (int16x8_t sadv, int8x16_t pv, int8x16_t sv) -{ - return vabal_s8 (sadv, vget_high_s8 (pv), vget_high_s8 (sv)); -} - -/* -** test_vabal_u8: -** uabal2 v0.8h, v2.16b, v1.16b -** ret -*/ -uint16x8_t -test_vabal_u8 (uint16x8_t sadv, uint8x16_t pv, uint8x16_t sv) -{ - return vabal_u8 (sadv, vget_high_u8 (pv), vget_high_u8 (sv)); -} - -/* -** test_vabal_s16: -** sabal2 v0.4s, v2.8h, v1.8h -** ret -*/ -int32x4_t -test_vabal_s16 (int32x4_t sadv, int16x8_t pv, int16x8_t sv) -{ - return vabal_s16 (sadv, vget_high_s16 (pv), vget_high_s16 (sv)); -} - -/* -** test_vabal_u16: -** uabal2 v0.4s, v2.8h, v1.8h -** ret -*/ -uint32x4_t -test_vabal_u16 (uint32x4_t sadv, uint16x8_t pv, uint16x8_t sv) -{ - return vabal_u16 (sadv, vget_high_u16 (pv), vget_high_u16 (sv)); -} - -/* -** test_vabal_s32: -** sabal2 v0.2d, v2.4s, v1.4s -** ret -*/ -int64x2_t -test_vabal_s32 (int64x2_t sadv, int32x4_t pv, int32x4_t sv) -{ - return vabal_s32 (sadv, vget_high_s32 (pv), vget_high_s32 (sv)); -} - -/* -** test_vabal_u32: -** uabal2 v0.2d, v2.4s, v1.4s -** ret -*/ -uint64x2_t -test_vabal_u32 (uint64x2_t sadv, uint32x4_t pv, uint32x4_t sv) -{ - return vabal_u32 (sadv, vget_high_u32 (pv), vget_high_u32 (sv)); -} - diff --git a/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_1.c b/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_1.c index 98922aa..3a63da7 100644 --- a/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_1.c @@ -1,5 +1,5 @@ // { dg-options "-O -fomit-frame-pointer -fno-optimize-sibling-calls -funwind-tables" } -// { dg-final { check-function-bodies "**" "" } } +// { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {\t\.inst} } } void ns_callee (); void s_callee () [[arm::streaming]]; @@ -218,7 +218,7 @@ sc_caller_x1 (int *ptr, int a) [[arm::streaming_compatible]] ** bl ns_callee_stack ** ldr x16, \[x29, #?16\] ** tbz x16, 0, .* -** smstart sm +** .inst 0xd503437f // smstart sm ** ... */ void diff --git a/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_11.c b/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_11.c index ee6f987..c72d03f 100644 --- a/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_11.c +++ b/gcc/testsuite/gcc.target/aarch64/sme/call_sm_switch_11.c @@ -1,5 +1,6 @@ // { dg-options "-O -fomit-frame-pointer -fno-optimize-sibling-calls -funwind-tables -mtrack-speculation" } -// { dg-final { check-function-bodies "**" "" } } +// { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {\t\.inst} } } + void ns_callee (); void s_callee () [[arm::streaming]]; @@ -196,7 +197,7 @@ sc_caller_x1 (int *ptr, int a) [[arm::streaming_compatible]] ** tst x16, #?1 ** beq [^\n]* ** csel x15, x15, xzr, ne -** smstart sm +** .inst 0xd503437f // smstart sm ** ... */ void diff --git a/gcc/testsuite/gcc.target/aarch64/sme/pr121028.c b/gcc/testsuite/gcc.target/aarch64/sme/pr121028.c new file mode 100644 index 0000000..a6aa119 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme/pr121028.c @@ -0,0 +1,46 @@ +// PR121028 +// { dg-do assemble { target aarch64_asm_sme_ok } } +// { dg-options "-O --save-temps" } +// { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {\t\.inst} } } + +void ns_callee (); + +/* +** sc_caller_sme: +** ... +** mrs x16, svcr +** str x16, \[x29, #?16\] +** ldr x16, \[x29, #?16\] +** tbz x16, 0, .* +** smstop sm +** bl ns_callee +** ldr x16, \[x29, #?16\] +** tbz x16, 0, .* +** smstart sm +** ... +*/ +void sc_caller_sme() __arm_streaming_compatible +{ + ns_callee (); +} + +#pragma GCC target "+nosme" + +/* +** sc_caller_nosme: +** ... +** bl __arm_sme_state +** str x0, \[x29, #?16\] +** ldr x16, \[x29, #?16\] +** tbz x16, 0, .* +** .inst 0xd503427f // smstop sm +** bl ns_callee +** ldr x16, \[x29, #?16\] +** tbz x16, 0, .* +** .inst 0xd503437f // smstart sm +** ... +*/ +void sc_caller_nosme() __arm_streaming_compatible +{ + ns_callee (); +} diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x2.c new file mode 100644 index 0000000..b9fd96a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x2.c @@ -0,0 +1,99 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat16x2_t, z0, + svamax_f16_x2 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat16x2_t, z0, + svamax_f16_x2 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.h - z29\.h} +** | +** famax [^\n]+, {z28\.h - z29\.h} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat16x2_t, z0, + svamax_f16_x2 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** famax {z18\.h - z19\.h}, {z18\.h - z19\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat16x2_t, z18, + svamax_f16_x2 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z18\.h - z19\.h} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z18, svfloat16x2_t, z23, + svamax_f16_x2 (z23, z18), + svamax (z23, z18)) + +/* +** amax_z28_z28_z0: +** famax {z28\.h - z29\.h}, {z28\.h - z29\.h}, {z0\.h - z1\.h} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat16x2_t, z28, + svamax_f16_x2 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** famax {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z18\.h - z19\.h} +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat16x2_t, z0, + svamax_f16_x2 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.h - z5\.h}, {z4\.h - z5\.h}, [^\n]+ +** | +** famax {z4\.h - z5\.h}, {z4\.h - z5\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat16x2_t, z4, + svamax_f16_x2 (z4, z23), + svamax (z4, z23)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x4.c new file mode 100644 index 0000000..70e2697 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f16_x4.c @@ -0,0 +1,130 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.h - z3\.h}, {z0\.h - z3\.h}, {z4\.h - z7\.h} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat16x4_t, z0, + svamax_f16_x4 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.h - z3\.h}, {z0\.h - z3\.h}, {z4\.h - z7\.h} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat16x4_t, z0, + svamax_f16_x4 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.h - z31\.h} +** | +** famax [^\n]+, {z28\.h - z31\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat16x4_t, z0, + svamax_f16_x4 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z4\.h - z7\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat16x4_t, z18, + svamax_f16_x4 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.h - z31\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z28, svfloat16x4_t, z23, + svamax_f16_x4 (z23, z28), + svamax (z23, z28)) + +/* +** amax_z28_z28_z0: +** famax {z28\.h - z31\.h}, {z28\.h - z31\.h}, {z0\.h - z3\.h} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat16x4_t, z28, + svamax_f16_x4 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z0\.h - z3\.h}, {z0\.h - z3\.h}, [^\n]+ +** | +** famax {z0\.h - z3\.h}, {z0\.h - z3\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat16x4_t, z0, + svamax_f16_x4 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.h - z7\.h}, {z4\.h - z7\.h}, [^\n]+ +** | +** famax {z4\.h - z7\.h}, {z4\.h - z7\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat16x4_t, z4, + svamax_f16_x4 (z4, z23), + svamax (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x2.c new file mode 100644 index 0000000..cf57d1b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x2.c @@ -0,0 +1,98 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat32x2_t, z0, + svamax_f32_x2 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat32x2_t, z0, + svamax_f32_x2 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.s - z29\.s} +** | +** famax [^\n]+, {z28\.s - z29\.s} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat32x2_t, z0, + svamax_f32_x2 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** famax {z18\.s - z19\.s}, {z18\.s - z19\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat32x2_t, z18, + svamax_f32_x2 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z18\.s - z19\.s} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z18, svfloat32x2_t, z23, + svamax_f32_x2 (z23, z18), + svamax (z23, z18)) + +/* +** amax_z28_z28_z0: +** famax {z28\.s - z29\.s}, {z28\.s - z29\.s}, {z0\.s - z1\.s} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat32x2_t, z28, + svamax_f32_x2 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** famax {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z18\.s - z19\.s} +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat32x2_t, z0, + svamax_f32_x2 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.s - z5\.s}, {z4\.s - z5\.s}, [^\n]+ +** | +** famax {z4\.s - z5\.s}, {z4\.s - z5\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat32x2_t, z4, + svamax_f32_x2 (z4, z23), + svamax (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x4.c new file mode 100644 index 0000000..10d9175 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f32_x4.c @@ -0,0 +1,131 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.s - z3\.s}, {z0\.s - z3\.s}, {z4\.s - z7\.s} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat32x4_t, z0, + svamax_f32_x4 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.s - z3\.s}, {z0\.s - z3\.s}, {z4\.s - z7\.s} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat32x4_t, z0, + svamax_f32_x4 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.s - z31\.s} +** | +** famax [^\n]+, {z28\.s - z31\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat32x4_t, z0, + svamax_f32_x4 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z4\.s - z7\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat32x4_t, z18, + svamax_f32_x4 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.s - z31\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z28, svfloat32x4_t, z23, + svamax_f32_x4 (z23, z28), + svamax (z23, z28)) + +/* +** amax_z28_z28_z0: +** famax {z28\.s - z31\.s}, {z28\.s - z31\.s}, {z0\.s - z3\.s} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat32x4_t, z28, + svamax_f32_x4 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z0\.s - z3\.s}, {z0\.s - z3\.s}, [^\n]+ +** | +** famax {z0\.s - z3\.s}, {z0\.s - z3\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat32x4_t, z0, + svamax_f32_x4 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.s - z7\.s}, {z4\.s - z7\.s}, [^\n]+ +** | +** famax {z4\.s - z7\.s}, {z4\.s - z7\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat32x4_t, z4, + svamax_f32_x4 (z4, z23), + svamax (z4, z23)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x2.c new file mode 100644 index 0000000..b7918ab --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x2.c @@ -0,0 +1,98 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat64x2_t, z0, + svamax_f64_x2 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat64x2_t, z0, + svamax_f64_x2 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.d - z29\.d} +** | +** famax [^\n]+, {z28\.d - z29\.d} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat64x2_t, z0, + svamax_f64_x2 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** famax {z18\.d - z19\.d}, {z18\.d - z19\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat64x2_t, z18, + svamax_f64_x2 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z18\.d - z19\.d} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z18, svfloat64x2_t, z23, + svamax_f64_x2 (z23, z18), + svamax (z23, z18)) + +/* +** amax_z28_z28_z0: +** famax {z28\.d - z29\.d}, {z28\.d - z29\.d}, {z0\.d - z1\.d} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat64x2_t, z28, + svamax_f64_x2 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** famax {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z18\.d - z19\.d} +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat64x2_t, z0, + svamax_f64_x2 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.d - z5\.d}, {z4\.d - z5\.d}, [^\n]+ +** | +** famax {z4\.d - z5\.d}, {z4\.d - z5\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat64x2_t, z4, + svamax_f64_x2 (z4, z23), + svamax (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x4.c new file mode 100644 index 0000000..153a37a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amax_f64_x4.c @@ -0,0 +1,130 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amax_z0_z0_z4: +** famax {z0\.d - z3\.d}, {z0\.d - z3\.d}, {z4\.d - z7\.d} +** ret +*/ +TEST_XN (amax_z0_z0_z4, svfloat64x4_t, z0, + svamax_f64_x4 (z0, z4), + svamax (z0, z4)) + +/* +** amax_z0_z4_z0: +** famax {z0\.d - z3\.d}, {z0\.d - z3\.d}, {z4\.d - z7\.d} +** ret +*/ +TEST_XN (amax_z0_z4_z0, svfloat64x4_t, z0, + svamax_f64_x4 (z4, z0), + svamax (z4, z0)) + +/* +** amax_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.d - z31\.d} +** | +** famax [^\n]+, {z28\.d - z31\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z4_z28, svfloat64x4_t, z0, + svamax_f64_x4 (z4, z28), + svamax (z4, z28)) + +/* +** amax_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z4\.d - z7\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z18_z18_z4, svfloat64x4_t, z18, + svamax_f64_x4 (z18, z4), + svamax (z18, z4)) + +/* +** amax_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax [^\n]+, {z28\.d - z31\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amax_z23_z23_z28, svfloat64x4_t, z23, + svamax_f64_x4 (z23, z28), + svamax (z23, z28)) + +/* +** amax_z28_z28_z0: +** famax {z28\.d - z31\.d}, {z28\.d - z31\.d}, {z0\.d - z3\.d} +** ret +*/ +TEST_XN (amax_z28_z28_z0, svfloat64x4_t, z28, + svamax_f64_x4 (z28, z0), + svamax (z28, z0)) + +/* +** amax_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z0\.d - z3\.d}, {z0\.d - z3\.d}, [^\n]+ +** | +** famax {z0\.d - z3\.d}, {z0\.d - z3\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z0_z0_z18, svfloat64x4_t, z0, + svamax_f64_x4 (z0, z18), + svamax (z0, z18)) + +/* +** amax_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famax {z4\.d - z7\.d}, {z4\.d - z7\.d}, [^\n]+ +** | +** famax {z4\.d - z7\.d}, {z4\.d - z7\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amax_z4_z4_z23, svfloat64x4_t, z4, + svamax_f64_x4 (z4, z23), + svamax (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x2.c new file mode 100644 index 0000000..bd6e13b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x2.c @@ -0,0 +1,98 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat16x2_t, z0, + svamin_f16_x2 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat16x2_t, z0, + svamin_f16_x2 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.h - z29\.h} +** | +** famin [^\n]+, {z28\.h - z29\.h} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat16x2_t, z0, + svamin_f16_x2 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** famin {z18\.h - z19\.h}, {z18\.h - z19\.h}, {z4\.h - z5\.h} +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat16x2_t, z18, + svamin_f16_x2 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z18\.h - z19\.h} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z18, svfloat16x2_t, z23, + svamin_f16_x2 (z23, z18), + svamin (z23, z18)) + +/* +** amin_z28_z28_z0: +** famin {z28\.h - z29\.h}, {z28\.h - z29\.h}, {z0\.h - z1\.h} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat16x2_t, z28, + svamin_f16_x2 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** famin {z0\.h - z1\.h}, {z0\.h - z1\.h}, {z18\.h - z19\.h} +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat16x2_t, z0, + svamin_f16_x2 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.h - z5\.h}, {z4\.h - z5\.h}, [^\n]+ +** | +** famin {z4\.h - z5\.h}, {z4\.h - z5\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat16x2_t, z4, + svamin_f16_x2 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x4.c new file mode 100644 index 0000000..9f71b1f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f16_x4.c @@ -0,0 +1,130 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.h - z3\.h}, {z0\.h - z3\.h}, {z4\.h - z7\.h} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat16x4_t, z0, + svamin_f16_x4 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.h - z3\.h}, {z0\.h - z3\.h}, {z4\.h - z7\.h} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat16x4_t, z0, + svamin_f16_x4 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.h - z31\.h} +** | +** famin [^\n]+, {z28\.h - z31\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat16x4_t, z0, + svamin_f16_x4 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z4\.h - z7\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat16x4_t, z18, + svamin_f16_x4 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.h - z31\.h} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z28, svfloat16x4_t, z23, + svamin_f16_x4 (z23, z28), + svamin (z23, z28)) + +/* +** amin_z28_z28_z0: +** famin {z28\.h - z31\.h}, {z28\.h - z31\.h}, {z0\.h - z3\.h} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat16x4_t, z28, + svamin_f16_x4 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z0\.h - z3\.h}, {z0\.h - z3\.h}, [^\n]+ +** | +** famin {z0\.h - z3\.h}, {z0\.h - z3\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat16x4_t, z0, + svamin_f16_x4 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.h - z7\.h}, {z4\.h - z7\.h}, [^\n]+ +** | +** famin {z4\.h - z7\.h}, {z4\.h - z7\.h}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat16x4_t, z4, + svamin_f16_x4 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x2.c new file mode 100644 index 0000000..aaa6a2e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x2.c @@ -0,0 +1,98 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat32x2_t, z0, + svamin_f32_x2 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat32x2_t, z0, + svamin_f32_x2 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.s - z29\.s} +** | +** famin [^\n]+, {z28\.s - z29\.s} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat32x2_t, z0, + svamin_f32_x2 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** famin {z18\.s - z19\.s}, {z18\.s - z19\.s}, {z4\.s - z5\.s} +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat32x2_t, z18, + svamin_f32_x2 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z18\.s - z19\.s} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z18, svfloat32x2_t, z23, + svamin_f32_x2 (z23, z18), + svamin (z23, z18)) + +/* +** amin_z28_z28_z0: +** famin {z28\.s - z29\.s}, {z28\.s - z29\.s}, {z0\.s - z1\.s} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat32x2_t, z28, + svamin_f32_x2 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** famin {z0\.s - z1\.s}, {z0\.s - z1\.s}, {z18\.s - z19\.s} +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat32x2_t, z0, + svamin_f32_x2 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.s - z5\.s}, {z4\.s - z5\.s}, [^\n]+ +** | +** famin {z4\.s - z5\.s}, {z4\.s - z5\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat32x2_t, z4, + svamin_f32_x2 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x4.c new file mode 100644 index 0000000..34c1098 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f32_x4.c @@ -0,0 +1,130 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.s - z3\.s}, {z0\.s - z3\.s}, {z4\.s - z7\.s} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat32x4_t, z0, + svamin_f32_x4 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.s - z3\.s}, {z0\.s - z3\.s}, {z4\.s - z7\.s} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat32x4_t, z0, + svamin_f32_x4 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.s - z31\.s} +** | +** famin [^\n]+, {z28\.s - z31\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat32x4_t, z0, + svamin_f32_x4 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z4\.s - z7\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat32x4_t, z18, + svamin_f32_x4 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.s - z31\.s} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z28, svfloat32x4_t, z23, + svamin_f32_x4 (z23, z28), + svamin (z23, z28)) + +/* +** amin_z28_z28_z0: +** famin {z28\.s - z31\.s}, {z28\.s - z31\.s}, {z0\.s - z3\.s} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat32x4_t, z28, + svamin_f32_x4 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z0\.s - z3\.s}, {z0\.s - z3\.s}, [^\n]+ +** | +** famin {z0\.s - z3\.s}, {z0\.s - z3\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat32x4_t, z0, + svamin_f32_x4 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.s - z7\.s}, {z4\.s - z7\.s}, [^\n]+ +** | +** famin {z4\.s - z7\.s}, {z4\.s - z7\.s}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat32x4_t, z4, + svamin_f32_x4 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x2.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x2.c new file mode 100644 index 0000000..e4138e0 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x2.c @@ -0,0 +1,98 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat64x2_t, z0, + svamin_f64_x2 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat64x2_t, z0, + svamin_f64_x2 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.d - z29\.d} +** | +** famin [^\n]+, {z28\.d - z29\.d} +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat64x2_t, z0, + svamin_f64_x2 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** famin {z18\.d - z19\.d}, {z18\.d - z19\.d}, {z4\.d - z5\.d} +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat64x2_t, z18, + svamin_f64_x2 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z18: +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z18\.d - z19\.d} +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z18, svfloat64x2_t, z23, + svamin_f64_x2 (z23, z18), + svamin (z23, z18)) + +/* +** amin_z28_z28_z0: +** famin {z28\.d - z29\.d}, {z28\.d - z29\.d}, {z0\.d - z1\.d} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat64x2_t, z28, + svamin_f64_x2 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** famin {z0\.d - z1\.d}, {z0\.d - z1\.d}, {z18\.d - z19\.d} +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat64x2_t, z0, + svamin_f64_x2 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.d - z5\.d}, {z4\.d - z5\.d}, [^\n]+ +** | +** famin {z4\.d - z5\.d}, {z4\.d - z5\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat64x2_t, z4, + svamin_f64_x2 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x4.c b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x4.c new file mode 100644 index 0000000..8fbabe7 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sme2/acle-asm/amin_f64_x4.c @@ -0,0 +1,130 @@ +/* { dg-do assemble { target { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } */ +/* { dg-do compile { target { ! { aarch64_asm_sme2_ok && aarch64_asm_faminmax_ok } } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sme2_acle.h" +#pragma GCC target "+faminmax" + +/* +** amin_z0_z0_z4: +** famin {z0\.d - z3\.d}, {z0\.d - z3\.d}, {z4\.d - z7\.d} +** ret +*/ +TEST_XN (amin_z0_z0_z4, svfloat64x4_t, z0, + svamin_f64_x4 (z0, z4), + svamin (z0, z4)) + +/* +** amin_z0_z4_z0: +** famin {z0\.d - z3\.d}, {z0\.d - z3\.d}, {z4\.d - z7\.d} +** ret +*/ +TEST_XN (amin_z0_z4_z0, svfloat64x4_t, z0, + svamin_f64_x4 (z4, z0), + svamin (z4, z0)) + +/* +** amin_z0_z4_z28: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.d - z31\.d} +** | +** famin [^\n]+, {z28\.d - z31\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z4_z28, svfloat64x4_t, z0, + svamin_f64_x4 (z4, z28), + svamin (z4, z28)) + +/* +** amin_z18_z18_z4: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z4\.d - z7\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z18_z18_z4, svfloat64x4_t, z18, + svamin_f64_x4 (z18, z4), + svamin (z18, z4)) + +/* +** amin_z23_z23_z28: +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin [^\n]+, {z28\.d - z31\.d} +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ret +*/ +TEST_XN (amin_z23_z23_z28, svfloat64x4_t, z23, + svamin_f64_x4 (z23, z28), + svamin (z23, z28)) + +/* +** amin_z28_z28_z0: +** famin {z28\.d - z31\.d}, {z28\.d - z31\.d}, {z0\.d - z3\.d} +** ret +*/ +TEST_XN (amin_z28_z28_z0, svfloat64x4_t, z28, + svamin_f64_x4 (z28, z0), + svamin (z28, z0)) + +/* +** amin_z0_z0_z18: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z0\.d - z3\.d}, {z0\.d - z3\.d}, [^\n]+ +** | +** famin {z0\.d - z3\.d}, {z0\.d - z3\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z0_z0_z18, svfloat64x4_t, z0, + svamin_f64_x4 (z0, z18), + svamin (z0, z18)) + +/* +** amin_z4_z4_z23: +** ( +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** famin {z4\.d - z7\.d}, {z4\.d - z7\.d}, [^\n]+ +** | +** famin {z4\.d - z7\.d}, {z4\.d - z7\.d}, [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** mov [^\n]+ +** ) +** ret +*/ +TEST_XN (amin_z4_z4_z23, svfloat64x4_t, z4, + svamin_f64_x4 (z4, z23), + svamin (z4, z23)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_1.c new file mode 100644 index 0000000..6b920b8 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/perm_1.c @@ -0,0 +1,14 @@ +/* { dg-options "-O2 -msve-vector-bits=256" } */ + +#include <arm_sve.h> +typedef svbfloat16_t vls_bfloat16_t __attribute__((arm_sve_vector_bits(32 * 8))); +svbfloat16_t foo(vls_bfloat16_t a, vls_bfloat16_t b) +{ + svbfloat16_t zero = svreinterpret_bf16_f32 (svdup_n_f32 (0.0f)); + return svzip2_bf16(zero, svuzp1_bf16(a,b)); +} + + +/* { dg-final { scan-assembler-times {\tuzp1\t} 1 } } */ +/* { dg-final { scan-assembler-times {\tzip2\t} 1 } } */ +/* { dg-final { scan-assembler-not {\ttbl\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/mask_load_2.c b/gcc/testsuite/gcc.target/aarch64/sve/mask_load_2.c new file mode 100644 index 0000000..66d9510 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/mask_load_2.c @@ -0,0 +1,23 @@ +// { dg-do compile } +// { dg-options "-march=armv8-a+sve -msve-vector-bits=128 -O3" } + +typedef struct Array { + int elems[3]; +} Array; + +int loop(Array **pp, int len, int idx) { + int nRet = 0; + + #pragma GCC unroll 0 + for (int i = 0; i < len; i++) { + Array *p = pp[i]; + if (p) { + nRet += p->elems[idx]; + } + } + + return nRet; +} + +// { dg-final { scan-assembler-times {ld1w\tz[0-9]+\.d, p[0-7]/z} 1 } } +// { dg-final { scan-assembler-times {add\tz[0-9]+\.s, p[0-7]/m} 1 } } diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary.c index a8fd4c8..4708d57 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_int_opt_n.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_int_opt_n.c index 08cd6a0..4530b18 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_int_opt_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_int_opt_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_opt_n.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_opt_n.c index f5c9cbf..3097459 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_opt_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_opt_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_opt_single_n.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_opt_single_n.c index 91ae3c8..5e9d21c 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_opt_single_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_opt_single_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_rotate.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_rotate.c index 12368ce..768a740 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_rotate.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_rotate.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_uint64_opt_n.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_uint64_opt_n.c index dd52a58..ce14abb 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_uint64_opt_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_uint64_opt_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_uint_opt_n.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_uint_opt_n.c index e55ddfb..ceeb5ae 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_uint_opt_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binary_uint_opt_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binaryxn.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binaryxn.c index 6796229..f8b6b82 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binaryxn.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-binaryxn.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-clast.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-clast.c index 7f2ec4a..45f74ed 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-clast.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-clast.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-compare_opt_n.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-compare_opt_n.c index d18427b..fc601a1 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-compare_opt_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-compare_opt_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-compare_wide_opt_n.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-compare_wide_opt_n.c index 983ab5c..4959f1d 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-compare_wide_opt_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-compare_wide_opt_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-count_pred.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-count_pred.c index de36b66..d8a8a81 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-count_pred.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-count_pred.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-unary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-fold_left.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-fold_left.c index 333140d..6cf2683 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-fold_left.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-fold_left.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load.c index 93d6693..a32b636 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext.c index c88686a..72e743b 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext_gather_index.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext_gather_index.c index 5f4b562fc..1178104 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext_gather_index.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext_gather_index.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext_gather_offset.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext_gather_offset.c index 0fe8ab3..ebd313a 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext_gather_offset.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_ext_gather_offset.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_gather_sv.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_gather_sv.c index 758f00f..d531987 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_gather_sv.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_gather_sv.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_gather_vs.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_gather_vs.c index f82471f..55c9cef 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_gather_vs.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_gather_vs.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_replicate.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_replicate.c index ba500b6..5532232 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_replicate.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-load_replicate.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2 -march=armv8.2-a+sve+f64mm" } */ +/* { dg-options "-O2 -march=armv8.2-a+sve+f64mm -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch.c index 71894c4..78bdb0b 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch_gather_index.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch_gather_index.c index 1b7cc42..e219007 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch_gather_index.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch_gather_index.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch_gather_offset.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch_gather_offset.c index 7f4ff2d..98897e9 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch_gather_offset.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-prefetch_gather_offset.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ptest.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ptest.c index 0a587fc..c6fe6b9 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ptest.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ptest.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-unary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-rdffr.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-rdffr.c index d795f8e..7e2c1b9 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-rdffr.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-rdffr.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-reduction.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-reduction.c index 42b37ae..f7f75f6 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-reduction.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-reduction.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2 -fdump-tree-optimized" } */ +/* { dg-options "-O2 -fdump-tree-optimized -funwind-tables" } */ #include "../pfalse-unary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-reduction_wide.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-reduction_wide.c index bd9a980..54b6197 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-reduction_wide.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-reduction_wide.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-unary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-shift_right_imm.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-shift_right_imm.c index 62a0755..e8b8a55 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-shift_right_imm.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-shift_right_imm.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store.c index 751e60e..1539f58 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store_scatter_index.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store_scatter_index.c index 44792d3..21c8f6b 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store_scatter_index.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store_scatter_index.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store_scatter_offset.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store_scatter_offset.c index f3820e0..a908289 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store_scatter_offset.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-store_scatter_offset.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-storexn.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-storexn.c index e49266d..12b5e14 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-storexn.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-storexn.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ternary_opt_n.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ternary_opt_n.c index acdd141..89873fc 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ternary_opt_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ternary_opt_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ternary_rotate.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ternary_rotate.c index 7698045..c6d2cfb 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ternary_rotate.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-ternary_rotate.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary.c index 037376b..8a3b3e0 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-unary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_convert_narrowt.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_convert_narrowt.c index 1287a70..04bc049 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_convert_narrowt.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_convert_narrowt.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2 -march=armv8.2-a+sve+bf16" } */ +/* { dg-options "-O2 -march=armv8.2-a+sve+bf16 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_convertxn.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_convertxn.c index f519266..f39d2c5 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_convertxn.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_convertxn.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2 -march=armv8.2-a+sve+bf16" } */ +/* { dg-options "-O2 -march=armv8.2-a+sve+bf16 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_n.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_n.c index fabde3e..4403e50 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_pred.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_pred.c index 46c9592..f06b067 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_pred.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_pred.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-unary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_to_uint.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_to_uint.c index b820bde..a851c4a 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_to_uint.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unary_to_uint.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-unary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unaryxn.c b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unaryxn.c index 1e99b7f..dde812b 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unaryxn.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/pfalse-unaryxn.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-unary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmax_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmax_1.c new file mode 100644 index 0000000..e6aa047 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmax_1.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define b_i b[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##RHS (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i], RHS) > c[i]) \ + out[i] = 3; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1) + +TEST_ALL (__builtin_fmaxf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_fmaxf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_fmaxf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 6 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 7 } } */ + +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmax_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmax_2.c new file mode 100644 index 0000000..87125a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmax_2.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include "unpacked_builtin_fmax_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 9 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 7 } } */ + +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmin_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmin_1.c new file mode 100644 index 0000000..b9fded0 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmin_1.c @@ -0,0 +1,44 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define b_i b[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##RHS (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i], RHS) > c[i]) \ + out[i] = 3; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1) + +TEST_ALL (__builtin_fminf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_fminf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_fminf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 6 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 7 } } */ + +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmin_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmin_2.c new file mode 100644 index 0000000..5923b67 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_builtin_fmin_2.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include "unpacked_builtin_fmin_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 9 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 7 } } */ + +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmax_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmax_1.c new file mode 100644 index 0000000..d328b37 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmax_1.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##RHS##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i], (TYPE0)RHS) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1, b_i) + +TEST_ALL (__builtin_fmaxf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_fmaxf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_fmaxf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 13 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmax_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmax_2.c new file mode 100644 index 0000000..f84ded5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmax_2.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include "unpacked_cond_builtin_fmax_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 14 } } */ +/* { dg-final { scan-assembler-times {\tand} 21 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 13 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmin_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmin_1.c new file mode 100644 index 0000000..1821f03 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmin_1.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##RHS##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i], (TYPE0)RHS) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1, b_i) + +TEST_ALL (__builtin_fminf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_fminf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_fminf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 13 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmin_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmin_2.c new file mode 100644 index 0000000..bceddf9 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_builtin_fmin_2.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include "unpacked_cond_builtin_fmin_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 14 } } */ +/* { dg-final { scan-assembler-times {\tand} 21 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 13 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_cvtf_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_cvtf_1.c new file mode 100644 index 0000000..fa4dd15 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_cvtf_1.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define COND_CVT(TYPE0, TYPE1, TYPE2, COUNT) \ + void \ + test_##TYPE0##_##TYPE1##_##TYPE2 (TYPE0 *__restrict out, \ + TYPE1 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE2 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? (TYPE0)a[i] : b[i]; \ + } + +#define TEST_CVTF(PFX, T) \ + T (_Float16, PFX##int16_t, uint64_t, 32) \ + T (_Float16, PFX##int16_t, uint32_t, 64) \ + T (_Float16, PFX##int32_t, uint64_t, 32) \ + T (_Float16, PFX##int32_t, uint32_t, 64) \ + T (_Float16, PFX##int64_t, uint64_t, 32) \ + T (float, PFX##int32_t, uint64_t, 32) \ + T (float, PFX##int64_t, uint64_t, 32) + +#define TEST_ALL(T) \ + TEST_CVTF (, T) \ + TEST_CVTF (u, T) + +TEST_ALL (COND_CVT) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 8 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 6 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 8 } } */ + +/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.d\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.d\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tscvtf\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.d\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tucvtf\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.d\n} 1 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fabs_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fabs_1.c new file mode 100644 index 0000000..d959aa9 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fabs_1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##MERGE (TYPE1 *__restrict p, \ + TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i]) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) + +TEST_ALL (__builtin_fabsf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_fabsf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_fabsf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfabs\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfabs\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fadd_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fadd_1.c new file mode 100644 index 0000000..666cf89 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fadd_1.c @@ -0,0 +1,62 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] +#define imm_p5 0.5 + +#define ADD(A, B) A + B + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, NAME, RHS, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##NAME##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i], (TYPE0)RHS) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b[i], a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b[i], b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b[i], c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, one, 1, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, one, 1, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, none, -1, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, none, -1, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, p5, 0.5, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, p5, 0.5, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, np5, -0.5, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, np5, -0.5, b_i) + +TEST_ALL (ADD, _Float16, uint64_t, 32) + +TEST_ALL (ADD, _Float16, uint32_t, 64) + +TEST_ALL (ADD, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 19 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 19 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 19 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 5 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 10 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fadd_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fadd_2.c new file mode 100644 index 0000000..e59864b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fadd_2.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include "unpacked_cond_fadd_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 11 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 22 } } */ +/* { dg-final { scan-assembler-times {\tand} 33 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 19 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 19 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 19 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 5 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 10 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fcvt_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fcvt_1.c new file mode 100644 index 0000000..3caae19 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fcvt_1.c @@ -0,0 +1,41 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define COND_CVT(TYPE0, TYPE1, TYPE2, COUNT) \ + void \ + test_##TYPE0##_##TYPE1##_##TYPE2 (TYPE0 *__restrict out, \ + TYPE1 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE2 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? (TYPE0)a[i] : b[i]; \ + } + +#define TEST_FCVT(T) \ + T (_Float16, float, uint64_t, 32) \ + T (_Float16, float, uint32_t, 64) \ + T (_Float16, double, uint64_t, 32) \ + T (float, double, uint64_t, 32) \ + T (float, _Float16, uint64_t, 32) \ + T (float, _Float16, uint32_t, 64) \ + T (double, _Float16, uint64_t,32) \ + T (double, float, uint64_t, 32) + +TEST_FCVT (COND_CVT) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\tfcvt\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.d\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfcvt\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.d\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfcvt\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfcvt\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.h\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfcvt\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfcvt\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fcvtz_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fcvtz_1.c new file mode 100644 index 0000000..426d3af --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fcvtz_1.c @@ -0,0 +1,55 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define COND_CVT(TYPE0, TYPE1, TYPE2, COUNT) \ + void \ + test_##TYPE0##_##TYPE1##_##TYPE2 (TYPE0 *__restrict out, \ + TYPE1 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE2 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? (TYPE0)a[i] : b[i]; \ + } + +#define TEST_FCVTZ(PFX, T) \ + T (PFX##int16_t, _Float16, uint64_t, 32) \ + T (PFX##int16_t, _Float16, uint32_t, 64) \ + T (PFX##int32_t, _Float16, uint64_t, 32) \ + T (PFX##int32_t, _Float16, uint32_t, 64) \ + T (PFX##int64_t, _Float16, uint64_t, 32) \ + T (PFX##int32_t, float, uint64_t, 32) \ + T (PFX##int64_t, float, uint64_t, 32) \ + T (PFX##int32_t, double, uint64_t, 32) + +#define TEST_ALL(T) \ + TEST_FCVTZ (, T) \ + TEST_FCVTZ (u, T) + +TEST_ALL (COND_CVT) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 10 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 6 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 8 } } */ + +/* { dg-final { scan-assembler-times {\tfcvtzs\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfcvtzu\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfcvtzs\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfcvtzu\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfcvtzs\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.h\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfcvtzu\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.h\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfcvtzs\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfcvtzu\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfcvtzs\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfcvtzu\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfcvtzs\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.d\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfcvtzu\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.d\n} 1 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fdiv_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fdiv_1.c new file mode 100644 index 0000000..ec5653e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fdiv_1.c @@ -0,0 +1,47 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] + +#define DIV(A, B) A / B + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##RHS##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i], (TYPE0)RHS) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, c_i) + +TEST_ALL (DIV, _Float16, uint64_t, 32) + +TEST_ALL (DIV, _Float16, uint32_t, 64) + +TEST_ALL (DIV, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 7 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfdivr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfdiv\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfdivr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfdiv\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fdiv_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fdiv_2.c new file mode 100644 index 0000000..1ca3dbf --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fdiv_2.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include "unpacked_cond_fdiv_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 6 } } */ +/* { dg-final { scan-assembler-times {\tand} 9 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 7 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfdivr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfdiv\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfdivr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfdiv\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmaxnm_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmaxnm_1.c new file mode 100644 index 0000000..d34872f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmaxnm_1.c @@ -0,0 +1,53 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-signed-zeros -ffinite-math-only -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] + +#define MAX(A, B) (A > B) ? A : B + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##RHS##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i], (TYPE0)RHS) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1, b_i) + +TEST_ALL (MAX, _Float16, uint64_t, 32) + +TEST_ALL (MAX, _Float16, uint32_t, 64) + +TEST_ALL (MAX, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 13 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmaxnm_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmaxnm_2.c new file mode 100644 index 0000000..282f3ed --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmaxnm_2.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-signed-zeros -ffinite-math-only" } */ + +#include "unpacked_cond_fmaxnm_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 14 } } */ +/* { dg-final { scan-assembler-times {\tand} 21 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 13 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fminnm_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fminnm_1.c new file mode 100644 index 0000000..d6c3c38 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fminnm_1.c @@ -0,0 +1,53 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-signed-zeros -ffinite-math-only -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] + +#define MIN(A, B) (A < B) ? A : B + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##RHS##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i], (TYPE0)RHS) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1, b_i) + +TEST_ALL (MIN, _Float16, uint64_t, 32) + +TEST_ALL (MIN, _Float16, uint32_t, 64) + +TEST_ALL (MIN, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 13 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fminnm_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fminnm_2.c new file mode 100644 index 0000000..8226a6f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fminnm_2.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-signed-zeros -ffinite-math-only" } */ + +#include "unpacked_cond_fminnm_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 14 } } */ +/* { dg-final { scan-assembler-times {\tand} 21 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 13 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmla_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmla_1.c new file mode 100644 index 0000000..cae9242 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmla_1.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define FMLA(SUFF) __builtin_fma##SUFF (a[i], b[i], c[i]) +#define FMLS(SUFF) __builtin_fma##SUFF (a[i], -b[i], c[i]) +#define FNMLA(SUFF) -FMLA (SUFF) +#define FNMLS(SUFF) -FMLS (SUFF) + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0) + +TEST_ALL (FMLA (f16), _Float16, uint64_t, 32) + +TEST_ALL (FMLA (f16), _Float16, uint32_t, 64) + +TEST_ALL (FMLA (f32), float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 12 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/z, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmad\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmla\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/z, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmad\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfmla\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmla_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmla_2.c new file mode 100644 index 0000000..72e04a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmla_2.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include "unpacked_cond_fmla_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 8 } } */ +/* { dg-final { scan-assembler-times {\tand} 12 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 12 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/z, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmad\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmla\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/z, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmad\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfmla\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmls_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmls_1.c new file mode 100644 index 0000000..db0f818 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmls_1.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define FMLA(SUFF) __builtin_fma##SUFF (a[i], b[i], c[i]) +#define FMLS(SUFF) __builtin_fma##SUFF (a[i], -b[i], c[i]) +#define FNMLA(SUFF) -FMLA (SUFF) +#define FNMLS(SUFF) -FMLS (SUFF) + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0) + +TEST_ALL (FMLS (f16), _Float16, uint64_t, 32) + +TEST_ALL (FMLS (f16), _Float16, uint32_t, 64) + +TEST_ALL (FMLS (f32), float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 12 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/z, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmsb\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmls\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/z, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmsb\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfmls\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmls_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmls_2.c new file mode 100644 index 0000000..3012052 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmls_2.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include "unpacked_cond_fmls_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 8 } } */ +/* { dg-final { scan-assembler-times {\tand} 12 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 12 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/z, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmsb\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmls\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/z, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmsb\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfmls\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmul_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmul_1.c new file mode 100644 index 0000000..1ae7678 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmul_1.c @@ -0,0 +1,50 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] +#define imm_p5 0.5 + +#define MUL(A, B) A * B + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##RHS##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i], (TYPE0)RHS) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, imm_p5, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, imm_p5, b_i) + +TEST_ALL (MUL, _Float16, uint64_t, 32) + +TEST_ALL (MUL, _Float16, uint32_t, 64) + +TEST_ALL (MUL, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 10 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 10 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 10 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmul_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmul_2.c new file mode 100644 index 0000000..21713f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fmul_2.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include "unpacked_cond_fmul_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 5 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 10 } } */ +/* { dg-final { scan-assembler-times {\tand} 15 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 10 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 10 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 10 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fneg_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fneg_1.c new file mode 100644 index 0000000..7280f4e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fneg_1.c @@ -0,0 +1,39 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] + +#define NEG(X) -X + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##MERGE (TYPE1 *__restrict p, \ + TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i]) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) + +TEST_ALL (NEG, _Float16, uint64_t, 32) + +TEST_ALL (NEG, _Float16, uint32_t, 64) + +TEST_ALL (NEG, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfneg\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfneg\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmla_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmla_1.c new file mode 100644 index 0000000..07bab63 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmla_1.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define FMLA(SUFF) __builtin_fma##SUFF (a[i], b[i], c[i]) +#define FMLS(SUFF) __builtin_fma##SUFF (a[i], -b[i], c[i]) +#define FNMLA(SUFF) -FMLA (SUFF) +#define FNMLS(SUFF) -FMLS (SUFF) + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0) + +TEST_ALL (FNMLA (f16), _Float16, uint64_t, 32) + +TEST_ALL (FNMLA (f16), _Float16, uint32_t, 64) + +TEST_ALL (FNMLA (f32), float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 12 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/z, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfnmla\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfnmad\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/z, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfnmad\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfnmla\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmla_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmla_2.c new file mode 100644 index 0000000..daef4e49 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmla_2.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include "unpacked_cond_fnmla_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 8 } } */ +/* { dg-final { scan-assembler-times {\tand} 12 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 12 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/z, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfnmad\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfnmla\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/z, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfnmad\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfnmla\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmls_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmls_1.c new file mode 100644 index 0000000..5526378 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmls_1.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define FMLA(SUFF) __builtin_fma##SUFF (a[i], b[i], c[i]) +#define FMLS(SUFF) __builtin_fma##SUFF (a[i], -b[i], c[i]) +#define FNMLA(SUFF) -FMLA (SUFF) +#define FNMLS(SUFF) -FMLS (SUFF) + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0) + +TEST_ALL (FNMLS (f16), _Float16, uint64_t, 32) + +TEST_ALL (FNMLS (f16), _Float16, uint32_t, 64) + +TEST_ALL (FNMLS (f32), float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 12 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/z, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfnmsb\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfnmls\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/z, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfnmsb\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfnmls\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmls_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmls_2.c new file mode 100644 index 0000000..8a8f348 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fnmls_2.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include "unpacked_cond_fnmls_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 8 } } */ +/* { dg-final { scan-assembler-times {\tand} 12 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 12 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 12 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/z, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfnmsb\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfnmls\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/z, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfnmsb\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfnmls\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frinta_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frinta_1.c new file mode 100644 index 0000000..ed4efb6 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frinta_1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##MERGE (TYPE1 *__restrict p, \ + TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i]) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) + +TEST_ALL (__builtin_roundf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_roundf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_roundf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfrinta\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfrinta\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frinta_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frinta_2.c new file mode 100644 index 0000000..f20e2e6 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frinta_2.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -mtune=generic -ftree-vectorize" } */ + +#include "unpacked_cond_frinta_1.c" + +/* Test that we don't drop SELs without -fno-trapping-math. */ + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfrinta\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfrinta\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-times {\tsel\t} 6 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frinti_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frinti_1.c new file mode 100644 index 0000000..d682d15 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frinti_1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##MERGE (TYPE1 *__restrict p, \ + TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i]) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) + +TEST_ALL (__builtin_nearbyintf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_nearbyintf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_nearbyintf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfrinti\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfrinti\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintm_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintm_1.c new file mode 100644 index 0000000..7d429b3 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintm_1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##MERGE (TYPE1 *__restrict p, \ + TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i]) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) + +TEST_ALL (__builtin_floorf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_floorf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_floorf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfrintm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfrintm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintp_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintp_1.c new file mode 100644 index 0000000..c6d0c8c --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintp_1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##MERGE (TYPE1 *__restrict p, \ + TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i]) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) + +TEST_ALL (__builtin_ceilf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_ceilf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_ceilf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfrintp\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfrintp\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintx_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintx_1.c new file mode 100644 index 0000000..b8afef1 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintx_1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##MERGE (TYPE1 *__restrict p, \ + TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i]) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) + +TEST_ALL (__builtin_rintf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_rintf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_rintf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfrintx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfrintx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintz_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintz_1.c new file mode 100644 index 0000000..d55279b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_frintz_1.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, MERGE) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##MERGE (TYPE1 *__restrict p, \ + TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i]) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) + +TEST_ALL (__builtin_truncf16, _Float16, uint64_t, 32) + +TEST_ALL (__builtin_truncf16, _Float16, uint32_t, 64) + +TEST_ALL (__builtin_truncf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfrintz\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfrintz\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fsubr_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fsubr_1.c new file mode 100644 index 0000000..eafd169 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fsubr_1.c @@ -0,0 +1,56 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include <stdint.h> + +#define a_i a[i] +#define b_i b[i] +#define c_i c[i] +#define imm_p5 0.5 + +#define SUBR(A, B) B - A + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS, MERGE) \ + void \ + f_##TYPE0##_##TYPE1##_##RHS##_##MERGE (TYPE0 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE1 *__restrict p) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = p[i] ? FN (a[i], (TYPE0)RHS) : MERGE; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, c_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, imm_p5, a_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, imm_p5, b_i) + +TEST_ALL (SUBR, _Float16, uint64_t, 32) + +TEST_ALL (SUBR, _Float16, uint32_t, 64) + +TEST_ALL (SUBR, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 13 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fsubr_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fsubr_2.c new file mode 100644 index 0000000..cd7a0e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_cond_fsubr_2.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include "unpacked_cond_fsubr_1.c" + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-9]+\.d} 14 } } */ +/* { dg-final { scan-assembler-times {\tand} 21 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 13 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 13 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 3 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tmovprfx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 6 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 4 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 4 } } */ + +/* { dg-final { scan-assembler-not {\tsel\t} } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fabs_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fabs_1.c new file mode 100644 index 0000000..f09cfe8 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fabs_1.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##FN##_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i]) > b[i]) \ + out[i] = 3; \ + } + +TEST_FN (__builtin_fabsf16, _Float16, uint64_t, 32) + +TEST_FN (__builtin_fabsf16, _Float16, uint32_t, 64) + +TEST_FN (__builtin_fabsf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfabs\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfabs\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fadd_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fadd_1.c new file mode 100644 index 0000000..9675f56 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fadd_1.c @@ -0,0 +1,52 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define ADD(A, B) A + B + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, NAME, RHS) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##NAME (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i], (TYPE0)RHS) > c[i]) \ + out[i] = 3; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i, b[i]) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, p5, 0.5) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, np5, -0.5) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, one, 1) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, none, -1) + +TEST_ALL (ADD, _Float16, uint64_t, 32) + +TEST_ALL (ADD, _Float16, uint32_t, 64) + +TEST_ALL (ADD, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 5 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 10 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 11 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 11 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 11 } } */ + +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fadd_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fadd_2.c new file mode 100644 index 0000000..7a74efd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fadd_2.c @@ -0,0 +1,26 @@ +/* { dg-do compile }*/ +/* { dg-options "-O2 -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include "unpacked_fadd_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 12 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 11 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 11 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 11 } } */ + +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfadd\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fcm_combines_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fcm_combines_1.c new file mode 100644 index 0000000..d793a6c --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fcm_combines_1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 --param=aarch64-autovec-preference=sve-only -fno-trapping-math" } */ + +#include "unpacked_fcm_1.c" + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 32 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 32 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 32 } } */ + +/* Drop a PTRUE predicated AND with the loop mask and comparison result in + favour of predicating the comparison with the loop mask. */ +/* { dg-final { scan-assembler-not {\tand\t} } } */ + +/* Similarly, for codes that are implemented via an inversion, prefer + NOT (predicated with the loop mask) over BIC+PTRUE. */ +/* { dg-final { scan-assembler-not {\tbic\t} } } */ +/* { dg-final { scan-assembler-times {\tnot\t} 15 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fcm_combines_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fcm_combines_2.c new file mode 100644 index 0000000..b85391b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fcm_combines_2.c @@ -0,0 +1,35 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 --param=aarch64-autovec-preference=sve-only -fno-trapping-math" } */ + +#include <stdint.h> + +/* Ensure that we still emit NOR here, rather than two NOTs. */ + +#define TEST_FCM_NOR(TYPE0, TYPE1, CMP, COUNT) \ + void \ + f_##TYPE0##_##TYPE1##_##CMP (TYPE0 *__restrict out, \ + TYPE1 *__restrict a, \ + TYPE1 *__restrict b, \ + TYPE1 *__restrict c) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + out[i] = !(CMP (a[i], c[i]) | CMP (b[i], c[i])) ? 3 : out[i]; \ + } + +#define GT(A, B) ((A) > (B)) + +TEST_FCM_NOR (uint64_t, float, GT, 32) +TEST_FCM_NOR (uint64_t, _Float16, GT, 32) +TEST_FCM_NOR (uint32_t, _Float16, GT, 64) + +TEST_FCM_NOR (uint64_t, float, __builtin_isunordered, 32) +TEST_FCM_NOR (uint64_t, _Float16, __builtin_isunordered, 32) +TEST_FCM_NOR (uint32_t, _Float16, __builtin_isunordered, 64) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 6 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 6 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 6 } } */ + +/* { dg-final { scan-assembler-not {\tbic\t} } } */ +/* { dg-final { scan-assembler-not {\tnot\t} } } */ +/* { dg-final { scan-assembler-times {\tnor\tp[0-9]+\.b, p[0-9]+/z, p[0-9]+\.b, p[0-9]+\.b\n} 6 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fdiv_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fdiv_1.c new file mode 100644 index 0000000..78d0d9c --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fdiv_1.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define b_i b[i] +#define DIV(A, B) A / B + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##RHS (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i], (TYPE0)RHS) > c[i]) \ + out[i] = 3; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) + +TEST_ALL (DIV, _Float16, uint64_t, 32) + +TEST_ALL (DIV, _Float16, uint32_t, 64) + +TEST_ALL (DIV, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfdivr?\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfdivr?\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fdiv_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fdiv_2.c new file mode 100644 index 0000000..a8f70e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fdiv_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include "unpacked_fdiv_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfdivr?\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfdivr?\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fdiv_3.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fdiv_3.c new file mode 100644 index 0000000..ecd088f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fdiv_3.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-Ofast -moverride=sve_width=2048 -mlow-precision-div" } */ + +#include "unpacked_fdiv_1.c" + +/* { dg-final { scan-assembler-not {\tfrecpe\tz[0-9]+\.h} } } */ +/* { dg-final { scan-assembler-not {\tfrecps\tz[0-9]+\.h} } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 3 } } */ + +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tfrecpe\tz[0-9]+\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrecps\tz[0-9]+\.s} 1 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmaxnm_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmaxnm_1.c new file mode 100644 index 0000000..5239e4b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmaxnm_1.c @@ -0,0 +1,45 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-signed-zeros -ffinite-math-only -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define b_i b[i] +#define MAX(A, B) (A > B) ? A : B + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##RHS (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (c[i] = FN (a[i], RHS)) \ + out[i] = 3; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1) + +TEST_ALL (MAX, _Float16, uint64_t, 32) + +TEST_ALL (MAX, _Float16, uint32_t, 64) + +TEST_ALL (MAX, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 6 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmaxnm_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmaxnm_2.c new file mode 100644 index 0000000..11aa7c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmaxnm_2.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-signed-zeros -ffinite-math-only -fno-trapping-math -moverride=sve_width=2048" } */ + +#include "unpacked_fmaxnm_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 9 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmaxnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fminnm_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fminnm_1.c new file mode 100644 index 0000000..02a5f46 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fminnm_1.c @@ -0,0 +1,46 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-signed-zeros -ffinite-math-only -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define b_i b[i] +#define MIN(A, B) (A < B) ? A : B + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##RHS (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (c[i] = FN (a[i], RHS) ) \ + out[i] = 3; \ + } + + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 0) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1) + +TEST_ALL (MIN, _Float16, uint64_t, 32) + +TEST_ALL (MIN, _Float16, uint32_t, 64) + +TEST_ALL (MIN, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 6 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fminnm_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fminnm_2.c new file mode 100644 index 0000000..81f583b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fminnm_2.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-signed-zeros -ffinite-math-only -fno-trapping-math -moverride=sve_width=2048" } */ + +#include "unpacked_fminnm_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 9 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.0\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.0\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfminnm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmla_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmla_1.c new file mode 100644 index 0000000..312bccc --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmla_1.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define FMLA(SUFF) __builtin_fma##SUFF (a[i], b[i], c[i]) +#define FMLS(SUFF) __builtin_fma##SUFF (a[i], -b[i], c[i]) +#define FNMLA(SUFF) -FMLA (SUFF) +#define FNMLS(SUFF) -FMLS (SUFF) + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE0 *__restrict d) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN > d[i]) \ + out[i] = 3; \ + } + +TEST_FN (FMLA (f16), _Float16, uint64_t, 32) + +TEST_FN (FMLA (f16), _Float16, uint32_t, 64) + +TEST_FN (FMLA (f32), float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\t(fmla|fmad)\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\t(fmla|fmad)\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmla_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmla_2.c new file mode 100644 index 0000000..ca3f94d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmla_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include "unpacked_fmla_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\t(fmla|fmad)\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\t(fmla|fmad)\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmls_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmls_1.c new file mode 100644 index 0000000..f7cbfb3 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmls_1.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define FMLA(SUFF) __builtin_fma##SUFF (a[i], b[i], c[i]) +#define FMLS(SUFF) __builtin_fma##SUFF (a[i], -b[i], c[i]) +#define FNMLA(SUFF) -FMLA (SUFF) +#define FNMLS(SUFF) -FMLS (SUFF) + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE0 *__restrict d) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN > d[i]) \ + out[i] = 3; \ + } + +TEST_FN (FMLS (f16), _Float16, uint64_t, 32) + +TEST_FN (FMLS (f16), _Float16, uint32_t, 64) + +TEST_FN (FMLS (f32), float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\t(fmls|fmsb)\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\t(fmls|fmsb)\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmls_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmls_2.c new file mode 100644 index 0000000..387dbec --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmls_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include "unpacked_fmls_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\t(fmls|fmsb)\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\t(fmls|fmsb)\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmul_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmul_1.c new file mode 100644 index 0000000..a180a07 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmul_1.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define b_i b[i] +#define immp5 0.5 +#define MUL(A, B) A * B + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##RHS (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i], (TYPE0)RHS) > c[i]) \ + out[i] = 3; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, immp5) + +TEST_ALL (MUL, _Float16, uint64_t, 32) + +TEST_ALL (MUL, _Float16, uint32_t, 64) + +TEST_ALL (MUL, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 5 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 5 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 5 } } */ + +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmul_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmul_2.c new file mode 100644 index 0000000..eb05600 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fmul_2.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include "unpacked_fmul_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 5 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 5 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 5 } } */ + +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfmul\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fneg_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fneg_1.c new file mode 100644 index 0000000..d489ecb --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fneg_1.c @@ -0,0 +1,30 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define NEG(X) -X + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##FN##_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i]) > b[i]) \ + out[i] = 3; \ + } + +TEST_FN (NEG, _Float16, uint64_t, 32) + +TEST_FN (NEG, _Float16, uint32_t, 64) + +TEST_FN (NEG, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfneg\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfneg\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmla_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmla_1.c new file mode 100644 index 0000000..bf13ff5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmla_1.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define FMLA(SUFF) __builtin_fma##SUFF (a[i], b[i], c[i]) +#define FMLS(SUFF) __builtin_fma##SUFF (a[i], -b[i], c[i]) +#define FNMLA(SUFF) -FMLA (SUFF) +#define FNMLS(SUFF) -FMLS (SUFF) + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE0 *__restrict d) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN > d[i]) \ + out[i] = 3; \ + } + +TEST_FN (FNMLA (f16), _Float16, uint64_t, 32) + +TEST_FN (FNMLA (f16), _Float16, uint32_t, 64) + +TEST_FN (FNMLA (f32), float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\t(fnmla|fnmad)\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\t(fnmla|fnmad)\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmla_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmla_2.c new file mode 100644 index 0000000..64130ba --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmla_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include "unpacked_fnmla_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\t(fnmla|fnmad)\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\t(fnmla|fnmad)\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmls_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmls_1.c new file mode 100644 index 0000000..399920a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmls_1.c @@ -0,0 +1,38 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define FMLA(SUFF) __builtin_fma##SUFF (a[i], b[i], c[i]) +#define FMLS(SUFF) __builtin_fma##SUFF (a[i], -b[i], c[i]) +#define FNMLA(SUFF) -FMLA (SUFF) +#define FNMLS(SUFF) -FMLS (SUFF) + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c, \ + TYPE0 *__restrict d) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN > d[i]) \ + out[i] = 3; \ + } + +TEST_FN (FNMLS (f16), _Float16, uint64_t, 32) + +TEST_FN (FNMLS (f16), _Float16, uint32_t, 64) + +TEST_FN (FNMLS (f32), float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\t(fnmls|fnmsb)\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\t(fnmls|fnmsb)\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmls_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmls_2.c new file mode 100644 index 0000000..59fb7f9 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fnmls_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include "unpacked_fnmls_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 4 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 4 } } */ + +/* { dg-final { scan-assembler-times {\t(fnmls|fnmsb)\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\t(fnmls|fnmsb)\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinta_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinta_1.c new file mode 100644 index 0000000..3cbdef3 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinta_1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##FN##_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i]) > b[i]) \ + out[i] = 3; \ + } + +TEST_FN (__builtin_roundf16, _Float16, uint64_t, 32) + +TEST_FN (__builtin_roundf16, _Float16, uint32_t, 64) + +TEST_FN (__builtin_roundf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrinta\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrinta\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinta_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinta_2.c new file mode 100644 index 0000000..4564686 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinta_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include "unpacked_frinta_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrinta\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrinta\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinti_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinti_1.c new file mode 100644 index 0000000..7645fed --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinti_1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##FN##_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i]) > b[i]) \ + out[i] = 3; \ + } + +TEST_FN (__builtin_nearbyintf16, _Float16, uint64_t, 32) + +TEST_FN (__builtin_nearbyintf16, _Float16, uint32_t, 64) + +TEST_FN (__builtin_nearbyintf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrinti\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrinti\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinti_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinti_2.c new file mode 100644 index 0000000..eadce07 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frinti_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include "unpacked_frinti_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrinti\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrinti\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintm_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintm_1.c new file mode 100644 index 0000000..98f85fb --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintm_1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##FN##_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i]) > b[i]) \ + out[i] = 3; \ + } + +TEST_FN (__builtin_floorf16, _Float16, uint64_t, 32) + +TEST_FN (__builtin_floorf16, _Float16, uint32_t, 64) + +TEST_FN (__builtin_floorf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrintm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrintm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintm_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintm_2.c new file mode 100644 index 0000000..56988be --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintm_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include "unpacked_frintm_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrintm\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrintm\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintp_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintp_1.c new file mode 100644 index 0000000..f233697 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintp_1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##FN##_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i]) > b[i]) \ + out[i] = 3; \ + } + +TEST_FN (__builtin_ceilf16, _Float16, uint64_t, 32) + +TEST_FN (__builtin_ceilf16, _Float16, uint32_t, 64) + +TEST_FN (__builtin_ceilf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrintp\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrintp\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintp_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintp_2.c new file mode 100644 index 0000000..c24c632 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintp_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include "unpacked_frintp_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrintp\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrintp\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintx_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintx_1.c new file mode 100644 index 0000000..73403a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintx_1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##FN##_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i]) > b[i]) \ + out[i] = 3; \ + } + +TEST_FN (__builtin_rintf16, _Float16, uint64_t, 32) + +TEST_FN (__builtin_rintf16, _Float16, uint32_t, 64) + +TEST_FN (__builtin_rintf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrintx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrintx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintx_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintx_2.c new file mode 100644 index 0000000..e8b8924 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintx_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include "unpacked_frintx_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrintx\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrintx\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintz_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintz_1.c new file mode 100644 index 0000000..7377843 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintz_1.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize" } */ + +#include <stdint.h> + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT) \ + void \ + f_##FN##_##TYPE0##_##TYPE1 (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i]) > b[i]) \ + out[i] = 3; \ + } + +TEST_FN (__builtin_truncf16, _Float16, uint64_t, 32) + +TEST_FN (__builtin_truncf16, _Float16, uint32_t, 64) + +TEST_FN (__builtin_truncf32, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 1 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrintz\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrintz\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintz_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintz_2.c new file mode 100644 index 0000000..1779122 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_frintz_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048 -ftree-vectorize -fno-trapping-math" } */ + +#include "unpacked_frintz_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 3 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 2 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 2 } } */ + +/* { dg-final { scan-assembler-times {\tfrintz\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfrintz\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fsubr_1.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fsubr_1.c new file mode 100644 index 0000000..2cc8ec2 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fsubr_1.c @@ -0,0 +1,46 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -moverride=sve_width=2048" } */ + +#include <stdint.h> + +#define b_i b[i] +#define immp5 0.5 +#define SUBR(A, B) B - A + +#define TEST_FN(FN, TYPE0, TYPE1, COUNT, RHS) \ + void \ + f_##FN##_##TYPE0##_##TYPE1##_##RHS (TYPE1 *__restrict out, \ + TYPE0 *__restrict a, \ + TYPE0 *__restrict b, \ + TYPE0 *__restrict c) \ + { \ + for (unsigned int i = 0; i < COUNT; i++) \ + if (FN (a[i], (TYPE0)RHS) > c[i]) \ + out[i] = 3; \ + } + +#define TEST_ALL(FN, TYPE0, TYPE1, COUNT) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, b_i) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, immp5) \ + TEST_FN (FN, TYPE0, TYPE1, COUNT, 1) + +TEST_ALL (SUBR, _Float16, uint64_t, 32) + +TEST_ALL (SUBR, _Float16, uint32_t, 64) + +TEST_ALL (SUBR, float, uint64_t, 32) + +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.s} 3 } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.d} 6 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 7 } } */ + +/* { dg-final { scan-assembler-times {\tfsubr?\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfsubr?\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fsubr_2.c b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fsubr_2.c new file mode 100644 index 0000000..de9325c --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/unpacked_fsubr_2.c @@ -0,0 +1,20 @@ +/* { dg-do compile }*/ +/* { dg-options "-O2 -moverride=sve_width=2048 -fno-trapping-math" } */ + +#include "unpacked_fsubr_1.c" + +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.s} } } */ +/* { dg-final { scan-assembler-not {\tptrue\tp[0-7]\.d} } } */ +/* { dg-final { scan-assembler-times {\tptrue\tp[0-7]\.b} 6 } } */ + +/* { dg-final { scan-assembler-times {\tld1w\tz[0-9]+\.d} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.s} 7 } } */ +/* { dg-final { scan-assembler-times {\tld1h\tz[0-9]+\.d} 7 } } */ + +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.s, z[0-9]+\.s, z[0-9]+\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #0.5\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.s, p[0-7]/m, z[0-9]+\.s, #1.0\n} 1 } } */ + +/* { dg-final { scan-assembler-times {\tfsub\tz[0-9]+\.h, z[0-9]+\.h, z[0-9]+\.h\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #0.5\n} 2 } } */ +/* { dg-final { scan-assembler-times {\tfsubr\tz[0-9]+\.h, p[0-7]/m, z[0-9]+\.h, #1.0\n} 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/eon_bsl2n.c b/gcc/testsuite/gcc.target/aarch64/sve2/eon_bsl2n.c new file mode 100644 index 0000000..74b4637 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/eon_bsl2n.c @@ -0,0 +1,52 @@ +/* { dg-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ + +#include <arm_neon.h> +#include <arm_sve.h> + +#define EON(x, y) (~((x) ^ (y))) + +/* +** eon_d: +** bsl2n z0.d, z0.d, z0.d, z1.d +** ret +*/ +uint32x2_t eon_d(uint32x2_t a, uint32x2_t b) { return EON(a, b); } + +/* +** eon_d_mp: +** movprfx z0, z1 +** bsl2n z0.d, z0.d, z1.d, z2.d +** ret +*/ +uint32x2_t eon_d_mp(uint32x2_t c, uint32x2_t a, uint32x2_t b) { return EON(a, b); } + +/* +** eon_q: +** bsl2n z0.d, z0.d, z0.d, z1.d +** ret +*/ +uint64x2_t eon_q(uint64x2_t a, uint64x2_t b) { return EON(a, b); } + +/* +** eon_q_mp: +** movprfx z0, z1 +** bsl2n z0.d, z0.d, z1.d, z2.d +** ret +*/ +uint64x2_t eon_q_mp(uint64x2_t c, uint64x2_t a, uint64x2_t b) { return EON(a, b); } + +/* +** eon_z: +** bsl2n z0.d, z0.d, z0.d, z1.d +** ret +*/ +svuint64_t eon_z(svuint64_t a, svuint64_t b) { return EON(a, b); } + +/* +** eon_z_mp: +** movprfx z0, z1 +** bsl2n z0.d, z0.d, z1.d, z2.d +** ret +*/ +svuint64_t eon_z_mp(svuint64_t c, svuint64_t a, svuint64_t b) { return EON(a, b); } diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/nbsl_nor_nand_neon.c b/gcc/testsuite/gcc.target/aarch64/sve2/nbsl_nor_nand_neon.c new file mode 100644 index 0000000..09bfc19 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/nbsl_nor_nand_neon.c @@ -0,0 +1,68 @@ +/* { dg-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ + +#include <arm_neon.h> + +#define NAND(x, y) (~((x) & (y))) +#define NOR(x, y) (~((x) | (y))) + +/* +** nand_d: +** nbsl z0.d, z0.d, z1.d, z1.d +** ret +*/ +uint32x2_t nand_d(uint32x2_t a, uint32x2_t b) { return NAND(a, b); } + +/* +** nand_d_mp: +** movprfx z0, z1 +** nbsl z0.d, z0.d, z2.d, z2.d +** ret +*/ +uint32x2_t nand_d_mp(uint32x2_t c, uint32x2_t a, uint32x2_t b) { return NAND(a, b); } + +/* +** nor_d: +** nbsl z0.d, z0.d, z1.d, z0.d +** ret +*/ +uint32x2_t nor_d(uint32x2_t a, uint32x2_t b) { return NOR(a, b); } + +/* +** nor_d_mp: +** movprfx z0, z1 +** nbsl z0.d, z0.d, z2.d, z1.d +** ret +*/ +uint32x2_t nor_d_mp(uint32x2_t c, uint32x2_t a, uint32x2_t b) { return NOR(a, b); } + +/* +** nand_q: +** nbsl z0.d, z0.d, z1.d, z1.d +** ret +*/ +uint64x2_t nand_q(uint64x2_t a, uint64x2_t b) { return NAND(a, b); } + +/* +** nand_q_mp: +** movprfx z0, z1 +** nbsl z0.d, z0.d, z2.d, z2.d +** ret +*/ +uint32x4_t nand_q_mp(uint32x4_t c, uint32x4_t a, uint32x4_t b) { return NAND(a, b); } + +/* +** nor_q: +** nbsl z0.d, z0.d, z1.d, z0.d +** ret +*/ +uint64x2_t nor_q(uint64x2_t a, uint64x2_t b) { return NOR(a, b); } + +/* +** nor_q_mp: +** movprfx z0, z1 +** nbsl z0.d, z0.d, z2.d, z1.d +** ret +*/ +uint32x4_t nor_q_mp(uint32x4_t c, uint32x4_t a, uint32x4_t b) { return NOR(a, b); } + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary.c index 94470a5..977fa39 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_int_opt_n.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_int_opt_n.c index b8747b8..b816fa1 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_int_opt_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_int_opt_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_int_opt_single_n.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_int_opt_single_n.c index 7cb7ee5..0e4427a 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_int_opt_single_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_int_opt_single_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_opt_n.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_opt_n.c index 787126f..81d0c82 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_opt_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_opt_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_opt_single_n.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_opt_single_n.c index 6b2b0a42..3920bdb 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_opt_single_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_opt_single_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2 -march=armv8.2-a+sve2+faminmax" } */ +/* { dg-options "-O2 -march=armv8.2-a+sve2+faminmax -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_to_uint.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_to_uint.c index a0a7f80..c7d10b3 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_to_uint.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_to_uint.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_uint_opt_n.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_uint_opt_n.c index c13db48..122fba7 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_uint_opt_n.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_uint_opt_n.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_wide.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_wide.c index 145b077..7f35859 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_wide.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-binary_wide.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-compare.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-compare.c index da175db..b079a56 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-compare.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-compare.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-binary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_ext_gather_index_restricted.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_ext_gather_index_restricted.c index c0476ce..14e77c00 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_ext_gather_index_restricted.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_ext_gather_index_restricted.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_ext_gather_offset_restricted.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_ext_gather_offset_restricted.c index f644024..b680548 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_ext_gather_offset_restricted.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_ext_gather_offset_restricted.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_gather_sv_restricted.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_gather_sv_restricted.c index a48a8a9..6d1a356 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_gather_sv_restricted.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_gather_sv_restricted.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_gather_vs.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_gather_vs.c index 1fc08a3..9cb4471 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_gather_vs.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-load_gather_vs.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-shift_left_imm_to_uint.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-shift_left_imm_to_uint.c index bd2c937..e57a650 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-shift_left_imm_to_uint.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-shift_left_imm_to_uint.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-shift_right_imm.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-shift_right_imm.c index f4994de..710ca73 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-shift_right_imm.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-shift_right_imm.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-store_scatter_index_restricted.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-store_scatter_index_restricted.c index 6bec3b3..dc9cf46 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-store_scatter_index_restricted.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-store_scatter_index_restricted.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-store_scatter_offset_restricted.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-store_scatter_offset_restricted.c index bcb4a14..2728c9b 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-store_scatter_offset_restricted.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-store_scatter_offset_restricted.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary.c index ba7e931..9f33295 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2 -march=armv9.2-a+sve+sme" } */ +/* { dg-options "-O2 -march=armv9.2-a+sve+sme -funwind-tables" } */ #include "../pfalse-unary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_convert.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_convert.c index 7aa59ff..68769fe 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_convert.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_convert.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_convert_narrowt.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_convert_narrowt.c index 1a4525c..692891f 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_convert_narrowt.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_convert_narrowt.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include <arm_sve.h> diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_to_int.c b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_to_int.c index b64bfc3..7dffa1c 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_to_int.c +++ b/gcc/testsuite/gcc.target/aarch64/sve2/pfalse-unary_to_int.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target elf } */ -/* { dg-options "-O2" } */ +/* { dg-options "-O2 -funwind-tables" } */ #include "../pfalse-unary_0.h" diff --git a/gcc/testsuite/gcc.target/aarch64/vec-set-zero.c b/gcc/testsuite/gcc.target/aarch64/vec-set-zero.c index b34b902c..ba4696e 100644 --- a/gcc/testsuite/gcc.target/aarch64/vec-set-zero.c +++ b/gcc/testsuite/gcc.target/aarch64/vec-set-zero.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2" } */ +/* { dg-options "-Os" } */ #include "arm_neon.h" diff --git a/gcc/testsuite/gcc.target/arm/pr121065.c b/gcc/testsuite/gcc.target/arm/pr121065.c new file mode 100644 index 0000000..dfc6059 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr121065.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mcpu=cortex-m55" } */ + +_Accum sa; +char c; + +void +div_csa () +{ + c /= sa; +} diff --git a/gcc/testsuite/gcc.target/i386/20020224-1.c b/gcc/testsuite/gcc.target/i386/20020224-1.c index 2905719..769332b 100644 --- a/gcc/testsuite/gcc.target/i386/20020224-1.c +++ b/gcc/testsuite/gcc.target/i386/20020224-1.c @@ -4,6 +4,7 @@ while callee was actually not poping it up (as the hidden argument was passed in register). */ /* { dg-do run } */ +/* { dg-require-effective-target ia32 } */ /* { dg-options "-O2 -fomit-frame-pointer" } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowd2ps-2.c b/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowd2ps-2.c index cfd5644..c9a2d19 100644 --- a/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowd2ps-2.c +++ b/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowd2ps-2.c @@ -1,6 +1,6 @@ /* { dg-do run { target { ! ia32 } } } */ /* { dg-require-effective-target amx_avx512 } */ -/* { dg-options "-O2 -march=x86-64-v3 -mamx-avx512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mamx-avx512 -mavx512fp16" } */ #define AMX_AVX512 #define DO_TEST test_amx_avx512_cvtrowd2ps void test_amx_avx512_cvtrowd2ps(); diff --git a/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowps2bf16-2.c b/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowps2bf16-2.c index acd5f76..2014ec6 100644 --- a/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowps2bf16-2.c +++ b/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowps2bf16-2.c @@ -1,6 +1,6 @@ /* { dg-do run { target { ! ia32 } } } */ /* { dg-require-effective-target amx_avx512 } */ -/* { dg-options "-O2 -march=x86-64-v3 -mamx-avx512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mamx-avx512 -mavx512fp16" } */ #define AMX_AVX512 #define DO_TEST test_amx_avx512_cvtrowps2bf16 void test_amx_avx512_cvtrowps2bf16(); diff --git a/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowps2ph-2.c b/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowps2ph-2.c index 1fd28de..ca53ed00 100644 --- a/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowps2ph-2.c +++ b/gcc/testsuite/gcc.target/i386/amxavx512-cvtrowps2ph-2.c @@ -1,6 +1,6 @@ /* { dg-do run { target { ! ia32 } } } */ /* { dg-require-effective-target amx_avx512 } */ -/* { dg-options "-O2 -march=x86-64-v3 -mamx-avx512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mamx-avx512 -mavx512fp16" } */ #define AMX_AVX512 #define DO_TEST test_amx_avx512_cvtrowps2ph void test_amx_avx512_cvtrowps2ph(); diff --git a/gcc/testsuite/gcc.target/i386/amxavx512-movrow-2.c b/gcc/testsuite/gcc.target/i386/amxavx512-movrow-2.c index ea28d82..b2dee14 100644 --- a/gcc/testsuite/gcc.target/i386/amxavx512-movrow-2.c +++ b/gcc/testsuite/gcc.target/i386/amxavx512-movrow-2.c @@ -1,6 +1,6 @@ /* { dg-do run { target { ! ia32 } } } */ /* { dg-require-effective-target amx_avx512 } */ -/* { dg-options "-O2 -march=x86-64-v3 -mamx-avx512" } */ +/* { dg-options "-O2 -march=x86-64-v3 -mamx-avx512 -mavx512fp16" } */ #define AMX_AVX512 #define DO_TEST test_amx_avx512_movrow void test_amx_avx512_movrow(); diff --git a/gcc/testsuite/gcc.target/i386/apx-1.c b/gcc/testsuite/gcc.target/i386/apx-1.c index 4e580ec..b118928 100644 --- a/gcc/testsuite/gcc.target/i386/apx-1.c +++ b/gcc/testsuite/gcc.target/i386/apx-1.c @@ -3,6 +3,6 @@ /* { dg-error "'-mapxf' is not supported for 32-bit code" "" { target ia32 } 0 } */ void -apx_hanlder () +apx_handler () { } diff --git a/gcc/testsuite/gcc.target/i386/asm-hard-reg-1.c b/gcc/testsuite/gcc.target/i386/asm-hard-reg-1.c new file mode 100644 index 0000000..8080f56 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/asm-hard-reg-1.c @@ -0,0 +1,80 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +void +test (void) +{ + int x, y; + + __asm__ __volatile__ ("" : "=a" (x), "={rbx}" (y)); + __asm__ __volatile__ ("" : "=a" (x), "={rax}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=a" (x) : "{rax}" (y)); + __asm__ __volatile__ ("" : "=&a" (x) : "{rax}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "a" (x), "{rax}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "={rbx}" (x), "=a" (y)); + __asm__ __volatile__ ("" : "={rax}" (x), "=a" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "={rax}" (x) : "a" (y)); + __asm__ __volatile__ ("" : "=&{rax}" (x) : "a" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "{rax}" (x), "a" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "=b" (x), "={rax}" (y)); + __asm__ __volatile__ ("" : "=b" (x), "={rbx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=b" (x) : "{rbx}" (y)); + __asm__ __volatile__ ("" : "=&b" (x) : "{rbx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "b" (x), "{rbx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "={rax}" (x), "=b" (y)); + __asm__ __volatile__ ("" : "={rbx}" (x), "=b" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "={rbx}" (x) : "b" (y)); + __asm__ __volatile__ ("" : "=&{rbx}" (x) : "b" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "{rbx}" (x), "b" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "=c" (x), "={rax}" (y)); + __asm__ __volatile__ ("" : "=c" (x), "={rcx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=c" (x) : "{rcx}" (y)); + __asm__ __volatile__ ("" : "=&c" (x) : "{rcx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "c" (x), "{rcx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "={rax}" (x), "=c" (y)); + __asm__ __volatile__ ("" : "={rcx}" (x), "=c" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "={rcx}" (x) : "c" (y)); + __asm__ __volatile__ ("" : "=&{rcx}" (x) : "c" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "{rcx}" (x), "c" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "=d" (x), "={rax}" (y)); + __asm__ __volatile__ ("" : "=d" (x), "={rdx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=d" (x) : "{rdx}" (y)); + __asm__ __volatile__ ("" : "=&d" (x) : "{rdx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "d" (x), "{rdx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "={rax}" (x), "=d" (y)); + __asm__ __volatile__ ("" : "={rdx}" (x), "=d" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "={rdx}" (x) : "d" (y)); + __asm__ __volatile__ ("" : "=&{rdx}" (x) : "d" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "{rdx}" (x), "d" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "=S" (x), "={rax}" (y)); + __asm__ __volatile__ ("" : "=S" (x), "={rsi}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=S" (x) : "{rsi}" (y)); + __asm__ __volatile__ ("" : "=&S" (x) : "{rsi}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "S" (x), "{rsi}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "={rax}" (x), "=S" (y)); + __asm__ __volatile__ ("" : "={rsi}" (x), "=S" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "={rsi}" (x) : "S" (y)); + __asm__ __volatile__ ("" : "=&{rsi}" (x) : "S" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "{rsi}" (x), "S" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "=D" (x), "={rax}" (y)); + __asm__ __volatile__ ("" : "=D" (x), "={rdi}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=D" (x) : "{rdi}" (y)); + __asm__ __volatile__ ("" : "=&D" (x) : "{rdi}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "D" (x), "{rdi}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "={rax}" (x), "=D" (y)); + __asm__ __volatile__ ("" : "={rdi}" (x), "=D" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "={rdi}" (x) : "D" (y)); + __asm__ __volatile__ ("" : "=&{rdi}" (x) : "D" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "{rdi}" (x), "D" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ +} diff --git a/gcc/testsuite/gcc.target/i386/asm-hard-reg-2.c b/gcc/testsuite/gcc.target/i386/asm-hard-reg-2.c new file mode 100644 index 0000000..b35cf53 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/asm-hard-reg-2.c @@ -0,0 +1,43 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +void +test (void) +{ + int x, y, yy; +#ifdef __x86_64__ + int z __attribute__ ((mode (TI))); +#else + long z; +#endif + + __asm__ __volatile__ ("" : "=A" (z), "={rbx}" (y)); + __asm__ __volatile__ ("" : "=A" (z), "={rax}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=A" (z), "={rdx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=A" (z) : "{rax}" (y)); + __asm__ __volatile__ ("" : "=A" (z) : "{rdx}" (y)); + __asm__ __volatile__ ("" : "=&A" (z) : "{rax}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=&A" (z) : "{rdx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "A" (z), "{rax}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "A" (z), "{rdx}" (y)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + __asm__ __volatile__ ("" : "={rbx}" (y), "=A" (z)); + __asm__ __volatile__ ("" : "={rax}" (y), "=A" (z)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "={rdx}" (y), "=A" (z)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "={rax}" (y) : "A" (z)); + __asm__ __volatile__ ("" : "={rdx}" (y) : "A" (z)); + __asm__ __volatile__ ("" : "=&{rax}" (y) : "A" (z)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=&{rdx}" (y) : "A" (z)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "{rax}" (y), "A" (z)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" :: "{rdx}" (y), "A" (z)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + + /* Note, we do not error for */ + __asm__ __volatile__ ("" : "=A" (x), "={rax}" (y)); + __asm__ __volatile__ ("" : "=A" (x), "={rdx}" (y)); + /* This is due to how constraint A is implemented. RA has the freedom to + choose between rax or rdx for operand 0 since x fits into a single + register and does not require a register pair. Of course, we error out if + rax and rdx are taken by other operands as in the following: */ + __asm__ __volatile__ ("" : "=A" (x), "={rax}" (y), "={rdx}" (yy)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + __asm__ __volatile__ ("" : "=A" (x), "={rdx}" (y), "={rax}" (yy)); /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ +} diff --git a/gcc/testsuite/gcc.target/i386/attributes-error.c b/gcc/testsuite/gcc.target/i386/attributes-error.c index 405eda5..5d1c77d 100644 --- a/gcc/testsuite/gcc.target/i386/attributes-error.c +++ b/gcc/testsuite/gcc.target/i386/attributes-error.c @@ -1,12 +1,40 @@ +/* { dg-options "-msse2" } */ /* { dg-do compile } */ /* { dg-require-effective-target ia32 } */ -void foo1(int i, int j) __attribute__((fastcall, cdecl)); /* { dg-error "not compatible" } */ -void foo2(int i, int j) __attribute__((fastcall, stdcall)); /* { dg-error "not compatible" } */ +void foo1(int i, int j) __attribute__((cdecl, regparm(2))); +void foo2(int i, int j) __attribute__((stdcall, regparm(2))); void foo3(int i, int j) __attribute__((fastcall, regparm(2))); /* { dg-error "not compatible" } */ -void foo4(int i, int j) __attribute__((stdcall, cdecl)); /* { dg-error "not compatible" } */ -void foo5(int i, int j) __attribute__((stdcall, fastcall)); /* { dg-error "not compatible" } */ -void foo6(int i, int j) __attribute__((cdecl, fastcall)); /* { dg-error "not compatible" } */ -void foo7(int i, int j) __attribute__((cdecl, stdcall)); /* { dg-error "not compatible" } */ -void foo8(int i, int j) __attribute__((regparm(2), fastcall)); /* { dg-error "not compatible" } */ +void foo4(int i, int j) __attribute__((thiscall, regparm(2))); /* { dg-error "not compatible" } */ +void foo5(int i, int j) __attribute__((sseregparm, regparm(2))); + +void foo6(int i, int j) __attribute__((stdcall, fastcall)); /* { dg-error "not compatible" } */ +void foo7(int i, int j) __attribute__((regparm(2), fastcall)); /* { dg-error "not compatible" } */ +void foo8(int i, int j) __attribute__((cdecl, fastcall)); /* { dg-error "not compatible" } */ +void foo9(int i, int j) __attribute__((thiscall, fastcall)); /* { dg-error "not compatible" } */ +void foo10(int i, int j) __attribute__((sseregparm, fastcall)); + +void foo11(int i, int j) __attribute__((cdecl, stdcall)); /* { dg-error "not compatible" } */ +void foo12(int i, int j) __attribute__((fastcall, stdcall)); /* { dg-error "not compatible" } */ +void foo13(int i, int j) __attribute__((thiscall, stdcall)); /* { dg-error "not compatible" } */ +void foo14(int i, int j) __attribute__((regparm(2), stdcall)); +void foo15(int i, int j) __attribute__((sseregparm, stdcall)); + +void foo16(int i, int j) __attribute__((stdcall, cdecl)); /* { dg-error "not compatible" } */ +void foo17(int i, int j) __attribute__((fastcall, cdecl)); /* { dg-error "not compatible" } */ +void foo18(int i, int j) __attribute__((thiscall, cdecl)); /* { dg-error "not compatible" } */ +void foo19(int i, int j) __attribute__((regparm(2), cdecl)); +void foo20(int i, int j) __attribute__((sseregparm, cdecl)); + +void foo21(int i, int j) __attribute__((stdcall, thiscall)); /* { dg-error "not compatible" } */ +void foo22(int i, int j) __attribute__((fastcall, thiscall)); /* { dg-error "not compatible" } */ +void foo23(int i, int j) __attribute__((cdecl, thiscall)); /* { dg-error "not compatible" } */ +void foo24(int i, int j) __attribute__((regparm(2), thiscall)); /* { dg-error "not compatible" } */ +void foo25(int i, int j) __attribute__((sseregparm, thiscall)); + +void foo26(int i, int j) __attribute__((cdecl, sseregparm)); +void foo27(int i, int j) __attribute__((fastcall, sseregparm)); +void foo28(int i, int j) __attribute__((stdcall, sseregparm)); +void foo29(int i, int j) __attribute__((thiscall, sseregparm)); +void foo30(int i, int j) __attribute__((regparm(2), sseregparm)); diff --git a/gcc/testsuite/gcc.target/i386/attributes-ignore.c b/gcc/testsuite/gcc.target/i386/attributes-ignore.c new file mode 100644 index 0000000..93a3770 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/attributes-ignore.c @@ -0,0 +1,8 @@ +/* { dg-do compile { target { ! ia32 } } } */ + +void foo1(int i, int j) __attribute__((regparm(0))); /* { dg-warning "ignored" } */ +void foo2(int i, int j) __attribute__((stdcall)); /* { dg-warning "ignored" } */ +void foo3(int i, int j) __attribute__((fastcall)); /* { dg-warning "ignored" } */ +void foo4(int i, int j) __attribute__((cdecl)); /* { dg-warning "ignored" } */ +void foo5(int i, int j) __attribute__((thiscall)); /* { dg-warning "ignored" } */ +void foo6(int i, int j) __attribute__((sseregparm)); /* { dg-warning "ignored" } */ diff --git a/gcc/testsuite/gcc.target/i386/pr103785.c b/gcc/testsuite/gcc.target/i386/pr103785.c index 5503b96..49d6c56 100644 --- a/gcc/testsuite/gcc.target/i386/pr103785.c +++ b/gcc/testsuite/gcc.target/i386/pr103785.c @@ -11,7 +11,10 @@ struct wrapper_t struct wrapper_t **table; -__attribute__ ((weak, regparm (2))) +#ifndef __x86_64__ +__attribute__ ((regparm (2))) +#endif +__attribute__ ((weak)) void update (long k, long e) { diff --git a/gcc/testsuite/gcc.target/i386/pr104447.c b/gcc/testsuite/gcc.target/i386/pr104447.c index cb618c7..145ba90 100644 --- a/gcc/testsuite/gcc.target/i386/pr104447.c +++ b/gcc/testsuite/gcc.target/i386/pr104447.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-require-profiling "-pg" } */ /* { dg-options "-O2 -pg" } */ +/* { dg-additional-options "-mfentry -fno-pic" { target *-*-gnu* } } */ int bar (int x) diff --git a/gcc/testsuite/gcc.target/i386/pr113122-3.c b/gcc/testsuite/gcc.target/i386/pr113122-3.c index 71aa240..87b76de 100644 --- a/gcc/testsuite/gcc.target/i386/pr113122-3.c +++ b/gcc/testsuite/gcc.target/i386/pr113122-3.c @@ -2,6 +2,7 @@ /* { dg-do assemble { target *-*-linux* } } */ /* { dg-require-effective-target masm_intel } */ /* { dg-options "-fprofile -O2 -masm=intel" } */ +/* { dg-additional-options "-mfentry -fno-pic" { target *-*-gnu* } } */ void func (void) diff --git a/gcc/testsuite/gcc.target/i386/pr119386-1.c b/gcc/testsuite/gcc.target/i386/pr119386-1.c index 9a0dc64..7a56eac 100644 --- a/gcc/testsuite/gcc.target/i386/pr119386-1.c +++ b/gcc/testsuite/gcc.target/i386/pr119386-1.c @@ -1,7 +1,9 @@ /* PR target/119386 */ /* { dg-do compile { target *-*-linux* } } */ /* { dg-options "-O2 -fpic -pg" } */ -/* { dg-final { scan-assembler "call\[ \t\]+mcount@PLT" } } */ +/* { dg-additional-options "-mfentry" { target { *-*-gnu* && { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]+mcount@PLT" { target ia32 } } } */ +/* { dg-final { scan-assembler "call\[ \t\]+__fentry__@PLT" { target { *-*-gnu* && { ! ia32 } } } } } */ int main () diff --git a/gcc/testsuite/gcc.target/i386/pr119386-2.c b/gcc/testsuite/gcc.target/i386/pr119386-2.c index 3ea978e..cddaaf0 100644 --- a/gcc/testsuite/gcc.target/i386/pr119386-2.c +++ b/gcc/testsuite/gcc.target/i386/pr119386-2.c @@ -1,7 +1,8 @@ /* PR target/119386 */ /* { dg-do compile { target *-*-linux* } } */ /* { dg-options "-O2 -fpic -fno-plt -pg" } */ -/* { dg-final { scan-assembler "call\[ \t\]+\\*mcount@GOTPCREL\\(" { target { ! ia32 } } } } */ +/* { dg-additional-options "-mfentry" { target { *-*-gnu* && { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]+\\*__fentry__@GOTPCREL" { target { *-*-gnu* && { ! ia32 } } } } } */ /* { dg-final { scan-assembler "call\[ \t\]+\\*mcount@GOT\\(" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr119795.c b/gcc/testsuite/gcc.target/i386/pr119795.c new file mode 100644 index 0000000..03c91cc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr119795.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-options "-O -fschedule-insns -favoid-store-forwarding" } */ + +unsigned a, b, c; + +void +foo (_BitInt(2) b2, unsigned _BitInt(255) by, unsigned _BitInt(5) b5, + unsigned _BitInt(256) *ret) +{ + unsigned _BitInt(255) bx = b2; + by += 0x80000000000000000000000000000000wb; + __builtin_memmove (&b, &c, 3); + unsigned d = b; + unsigned e = __builtin_stdc_rotate_right (0x1uwb % b5, a); + unsigned _BitInt(256) r = by + bx + d + e; + *ret = r; +} + +int +main () +{ + unsigned _BitInt(256) x; + foo (0, -1, 2, &x); + if (x != 0x80000000000000000000000000000000wb) + __builtin_abort(); +}
\ No newline at end of file diff --git a/gcc/testsuite/gcc.target/i386/pr120427-5.c b/gcc/testsuite/gcc.target/i386/pr120427-5.c new file mode 100644 index 0000000..7199aef --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr120427-5.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-Oz" } */ + +long long +func1 (void) +{ + return -1; +} +/* { dg-final { scan-assembler-times "pushq\[ \\t\]+\\\$-1" 1 } } */ +/* { dg-final { scan-assembler-times "popq\[ \\t\]+%rax" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr120881-1a.c b/gcc/testsuite/gcc.target/i386/pr120881-1a.c new file mode 100644 index 0000000..3d9ac0e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr120881-1a.c @@ -0,0 +1,4 @@ +/* { dg-do compile { target fpic } } */ +/* { dg-require-profiling "-pg" } */ +/* { dg-options "-O2 -pg -mno-fentry -fno-pic" } */ +/* { dg-message "'-pg' without '-mfentry' may be unreliable with shrink wrapping" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/i386/pr120881-1b.c b/gcc/testsuite/gcc.target/i386/pr120881-1b.c new file mode 100644 index 0000000..0826407 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr120881-1b.c @@ -0,0 +1,4 @@ +/* { dg-do compile { target { fpic && { ! ia32 } } } } */ +/* { dg-require-profiling "-pg" } */ +/* { dg-options "-O2 -pg -mno-fentry -fpic" } */ +/* { dg-message "'-pg' without '-mfentry' may be unreliable with shrink wrapping" "" { target *-*-* } 0 } */ diff --git a/gcc/testsuite/gcc.target/i386/pr120881-1c.c b/gcc/testsuite/gcc.target/i386/pr120881-1c.c new file mode 100644 index 0000000..c21979f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr120881-1c.c @@ -0,0 +1,3 @@ +/* { dg-do compile { target { fpic && ia32 } } } */ +/* { dg-require-profiling "-pg" } */ +/* { dg-options "-O2 -pg -mno-fentry -fpic" } */ diff --git a/gcc/testsuite/gcc.target/i386/pr120881-1d.c b/gcc/testsuite/gcc.target/i386/pr120881-1d.c new file mode 100644 index 0000000..f74af23 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr120881-1d.c @@ -0,0 +1,3 @@ +/* { dg-do compile { target { fpic && ia32 } } } */ +/* { dg-require-profiling "-pg" } */ +/* { dg-options "-O2 -pg -mno-fentry -fno-shrink-wrap -fno-pic" } */ diff --git a/gcc/testsuite/gcc.target/i386/pr120881-2a.c b/gcc/testsuite/gcc.target/i386/pr120881-2a.c new file mode 100644 index 0000000..52e3e52 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr120881-2a.c @@ -0,0 +1,21 @@ +/* { dg-do compile { target fentry } } */ +/* { dg-options "-O2 -pg" } */ +/* Keep labels and directives ('.cfi_startproc', '.cfi_endproc'). */ +/* { dg-final { check-function-bodies "**" "" "" { target "*-*-*" } {^\t?\.} } } */ + +/* +**f2: +**.LFB[0-9]+: +** .cfi_startproc +** call __fentry__ +**... +*/ + +extern void f1 (void); + +void +f2 (int count) +{ + for (int i = 0; i < count; ++i) + f1 (); +} diff --git a/gcc/testsuite/gcc.target/i386/pr120881-2b.c b/gcc/testsuite/gcc.target/i386/pr120881-2b.c new file mode 100644 index 0000000..43a12f0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr120881-2b.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-rtl-pro_and_epilogue -march=x86-64" } */ +/* { dg-final { scan-rtl-dump "Now spread 1 times" "pro_and_epilogue" } } */ + +#include "pr120881-2a.c" + diff --git a/gcc/testsuite/gcc.target/i386/pr121015.c b/gcc/testsuite/gcc.target/i386/pr121015.c new file mode 100644 index 0000000..57c8bff --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121015.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64-v3" } */ + +extern union { + int i; + float f; +} int_as_float_u; + +extern int render_result_from_bake_w; +extern int render_result_from_bake_h_seed_pass; +extern float *render_result_from_bake_h_primitive; +extern float *render_result_from_bake_h_seed; + +float +int_as_float(int i) +{ + int_as_float_u.i = i; + return int_as_float_u.f; +} + +void +render_result_from_bake_h(int tx) +{ + while (render_result_from_bake_w) { + for (; tx < render_result_from_bake_w; tx++) + render_result_from_bake_h_primitive[1] = + render_result_from_bake_h_primitive[2] = int_as_float(-1); + if (render_result_from_bake_h_seed_pass) { + *render_result_from_bake_h_seed = 0; + } + } +} diff --git a/gcc/testsuite/gcc.target/i386/pr121062-1.c b/gcc/testsuite/gcc.target/i386/pr121062-1.c new file mode 100644 index 0000000..799f856 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121062-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64-v3" } */ + +extern union { + int i; + float f; +} int_as_float_u; + +extern int render_result_from_bake_w; +extern int render_result_from_bake_h_seed_pass; +extern float *render_result_from_bake_h_primitive; +extern float *render_result_from_bake_h_seed; + +float +int_as_float(int i) +{ + int_as_float_u.i = i; + return int_as_float_u.f; +} + +void +render_result_from_bake_h(int tx) +{ + while (render_result_from_bake_w) { + for (; tx < render_result_from_bake_w; tx++) + render_result_from_bake_h_primitive[1] = + render_result_from_bake_h_primitive[2] = int_as_float(-1); + if (render_result_from_bake_h_seed_pass) { + *render_result_from_bake_h_seed = 0; + } + } +} + +/* { dg-final { scan-assembler-times "movq\[ \\t\]+\\\$-1, %r\[a-z0-9\]+" 2 { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr121062-2.c b/gcc/testsuite/gcc.target/i386/pr121062-2.c new file mode 100644 index 0000000..723d68a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121062-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-Og -fno-dce -mtune=generic" } */ + +typedef int __attribute__((__vector_size__ (4))) S; +extern void bar (S); + +void +foo () +{ + bar ((S){-1}); +} + +/* { dg-final { scan-assembler-times "movl\[ \\t\]+\\\$-1, \\(%esp\\)" 1 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movl\[ \\t\]+\\\$-1, %edi" 1 { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr121062-3a.c b/gcc/testsuite/gcc.target/i386/pr121062-3a.c new file mode 100644 index 0000000..effd4ff --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121062-3a.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target fpic } } */ +/* { dg-options "-O2 -march=x86-64 -fpic" } */ + +typedef struct { + struct { + unsigned short lo4; + unsigned short lo3; + unsigned short lo2; + unsigned short lo1; + } i; +} BID_BINARY80LDOUBLE; +extern BID_BINARY80LDOUBLE __bid64_to_binary80_x_out; +void +__bid64_to_binary80 (void) +{ + __bid64_to_binary80_x_out.i.lo4 + = __bid64_to_binary80_x_out.i.lo3 + = __bid64_to_binary80_x_out.i.lo2 + = __bid64_to_binary80_x_out.i.lo1 = 65535; +} + +/* { dg-final { scan-assembler-times "movq\[ \\t\]+%xmm\[0-9\]+, " 1 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movq\[ \\t\]+\\\$-1, \\(%(e|r)\[a-z0-9\]+\\)" 1 { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr121062-3b.c b/gcc/testsuite/gcc.target/i386/pr121062-3b.c new file mode 100644 index 0000000..eb89b5d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121062-3b.c @@ -0,0 +1,6 @@ +/* { dg-do compile { target { fpic && lp64 } } } */ +/* { dg-options "-O2 -march=x86-64 -fno-pic -mcmodel=large" } */ + +#include "pr121062-3a.c" + +/* { dg-final { scan-assembler-times "movq\[ \\t\]+\\\$-1, \\(%r\[a-z0-9\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr121062-3c.c b/gcc/testsuite/gcc.target/i386/pr121062-3c.c new file mode 100644 index 0000000..4c07029 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121062-3c.c @@ -0,0 +1,6 @@ +/* { dg-do compile { target { fpic && lp64 } } } */ +/* { dg-options "-O2 -march=x86-64 -fpic -mcmodel=large" } */ + +#include "pr121062-3a.c" + +/* { dg-final { scan-assembler-times "movq\[ \\t\]+\\\$-1, \\(%r\[a-z0-9\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr121062-4.c b/gcc/testsuite/gcc.target/i386/pr121062-4.c new file mode 100644 index 0000000..77a0c2e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121062-4.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64" } */ + +typedef long long int __attribute__((__vector_size__ (8))) S; + +void +foo (S *c) +{ + *c = (S){0x12345678badbeefULL}; +} + + +/* { dg-final { scan-assembler-times "movq\[ \\t\]+%xmm\[0-9\]+, " 1 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movabsq\[ \\t\]+\\\$81985529250168559, %r\[a-z0-9\]+" 1 { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr121062-5.c b/gcc/testsuite/gcc.target/i386/pr121062-5.c new file mode 100644 index 0000000..22c09a6 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121062-5.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64" } */ + +typedef int __attribute__((__vector_size__ (4))) S; + +void +foo (S *c) +{ + *c = (S){0x12345678}; +} + + +/* { dg-final { scan-assembler-times "movl\[ \\t\]+\\\$305419896, \\(%(e|r)\[a-z0-9\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr121062-6.c b/gcc/testsuite/gcc.target/i386/pr121062-6.c new file mode 100644 index 0000000..780b496 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121062-6.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-Og -fno-dce -mtune=generic" } */ + +typedef int __attribute__((__vector_size__ (8))) S; + +void +foo (S *c) +{ + *c = (S){0x12345678,0xbadbeefULL}; +} + +/* { dg-final { scan-assembler-times "movq\[ \\t\]+%xmm\[0-9\]+, " 1 { target ia32 } } } */ +/* { dg-final { scan-assembler-times "movabsq\[ \\t\]+\\\$841538639400031864, %r\[a-z0-9\]+" 1 { target { ! ia32 } } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr121062-7.c b/gcc/testsuite/gcc.target/i386/pr121062-7.c new file mode 100644 index 0000000..f1834f8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121062-7.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -march=x86-64" } */ + +typedef __bf16 __attribute__((__vector_size__ (4))) S; + +void +foo (S *c) +{ + *c = (S){-0.1, 2.1}; +} + + +/* { dg-final { scan-assembler-times "movl\[ \\t\]+\\\$1074183629, \\(%(e|r)\[a-z0-9\]+\\)" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr121208-1a.c b/gcc/testsuite/gcc.target/i386/pr121208-1a.c new file mode 100644 index 0000000..cb8bd0b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121208-1a.c @@ -0,0 +1,15 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fPIC -mno-80387 -mtls-dialect=gnu" } */ + +extern __thread int bar; +extern void func (void); + +__attribute__((no_caller_saved_registers)) +void +foo (int error) +{ + bar = 1; /* { dg-error -mtls-dialect=gnu2 } */ + if (error == 0) + func (); + bar = 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr121208-1b.c b/gcc/testsuite/gcc.target/i386/pr121208-1b.c new file mode 100644 index 0000000..037e9a0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121208-1b.c @@ -0,0 +1,4 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fPIC -mno-80387 -mtls-dialect=gnu2" } */ + +#include "pr121208-1a.c" diff --git a/gcc/testsuite/gcc.target/i386/pr121208-2a.c b/gcc/testsuite/gcc.target/i386/pr121208-2a.c new file mode 100644 index 0000000..c1891ae --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121208-2a.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fPIC -mtls-dialect=gnu" } */ + +typedef unsigned int uword_t __attribute__ ((mode (__word__))); +extern __thread int bar; +extern void func (void); + +__attribute__((target("general-regs-only"))) +__attribute__((interrupt)) +void +foo (void *frame, uword_t error) +{ + bar = 1; /* { dg-error -mtls-dialect=gnu2 } */ + if (error == 0) + func (); + bar = 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr121208-2b.c b/gcc/testsuite/gcc.target/i386/pr121208-2b.c new file mode 100644 index 0000000..269b120 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121208-2b.c @@ -0,0 +1,4 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fPIC -mtls-dialect=gnu2" } */ + +#include "pr121208-2a.c" diff --git a/gcc/testsuite/gcc.target/i386/pr121208-3a.c b/gcc/testsuite/gcc.target/i386/pr121208-3a.c new file mode 100644 index 0000000..26fe687 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121208-3a.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fPIC -mtls-dialect=gnu" } */ + +typedef unsigned int uword_t __attribute__ ((mode (__word__))); +extern __thread int bar; +extern void func (void); + +__attribute__((target("general-regs-only"))) +__attribute__((interrupt)) +void +foo (void *frame) +{ + bar = 1; /* { dg-error -mtls-dialect=gnu2 } */ + if (frame == 0) + func (); + bar = 0; +} diff --git a/gcc/testsuite/gcc.target/i386/pr121208-3b.c b/gcc/testsuite/gcc.target/i386/pr121208-3b.c new file mode 100644 index 0000000..b672d75 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121208-3b.c @@ -0,0 +1,4 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fPIC -mtls-dialect=gnu2" } */ + +#include "pr121208-3a.c" diff --git a/gcc/testsuite/gcc.target/i386/pr121274.c b/gcc/testsuite/gcc.target/i386/pr121274.c new file mode 100644 index 0000000..16760cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121274.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-march=x86-64-v4 -O2" } */ +/* { dg-final { scan-assembler-not "vpextrq" } } */ +/* { dg-final { scan-assembler-not "vpinsrq" } } */ + +typedef int v16si __attribute__((vector_size(64))); +typedef int v4si __attribute__((vector_size(16))); + +v4si f(v16si x) +{ + return __builtin_shufflevector(x, x, 0, 1, 2, 3); +} + +v4si g(v16si x) +{ +return __builtin_shufflevector(x, x, 4, 5, 6, 7); +} + +v4si f1(__int128 *x) +{ + __int128 t = *x; + asm("":"+x"(t)); + return (v4si)t; +} diff --git a/gcc/testsuite/gcc.target/i386/pr15184-2.c b/gcc/testsuite/gcc.target/i386/pr15184-2.c index cb8201f..dd50c42 100644 --- a/gcc/testsuite/gcc.target/i386/pr15184-2.c +++ b/gcc/testsuite/gcc.target/i386/pr15184-2.c @@ -1,4 +1,4 @@ -/* PR 15184 second two tests +/* PR 15184 second two tests */ /* { dg-do compile { target ia32 } } */ /* { dg-options "-O2 -march=pentiumpro" } */ /* { dg-additional-options "-fno-PIE" { target ia32 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr36533.c b/gcc/testsuite/gcc.target/i386/pr36533.c index 8d71ece..8699d26 100644 --- a/gcc/testsuite/gcc.target/i386/pr36533.c +++ b/gcc/testsuite/gcc.target/i386/pr36533.c @@ -55,14 +55,22 @@ typedef struct S1 *s18; } S7; -__attribute__((regparm (3), noinline)) int +#ifndef __x86_64__ +__attribute__((regparm (3))) +#endif +__attribute__((noinline)) +int fn1 (const char *x, void *y, S1 *z) { asm volatile ("" : : : "memory"); return *x + (y != 0); } -__attribute__((regparm (3), noinline)) int +#ifndef __x86_64__ +__attribute__((regparm (3))) +#endif +__attribute__((noinline)) +int fn2 (const char *x, int y, S2 *z) { asm volatile ("" : : : "memory"); @@ -84,7 +92,11 @@ fn3 (S3 *p) return (S3 *) ((char *) p + fn4 (p->s9)); } -__attribute__((regparm (3), noinline)) int +#ifndef __x86_64__ +__attribute__((regparm (3))) +#endif +__attribute__((noinline)) +int fn5 (void) { asm volatile ("" : : : "memory"); @@ -116,7 +128,11 @@ fn6 (S3 *w, int x, S2 *y, S4 *z) return a; } -__attribute__((regparm (3), noinline)) unsigned int +#ifndef __x86_64__ +__attribute__((regparm (3))) +#endif +__attribute__((noinline)) +unsigned int test (void *u, S6 *v, S1 **w, S7 *x, S2 *y, S1 *z) { unsigned b = v->s17->s16; diff --git a/gcc/testsuite/gcc.target/i386/pr59099.c b/gcc/testsuite/gcc.target/i386/pr59099.c index cf4a8da..21dfbc2 100644 --- a/gcc/testsuite/gcc.target/i386/pr59099.c +++ b/gcc/testsuite/gcc.target/i386/pr59099.c @@ -13,10 +13,17 @@ struct s }; -void* f (struct s *, struct s *) __attribute__ ((noinline, regparm(1))); +void* f (struct s *, struct s *) +#ifndef __x86_64__ +__attribute__ ((regparm(1))) +#endif +__attribute__ ((noinline)) +; void* +#ifndef __x86_64__ __attribute__ ((regparm(1))) +#endif f (struct s *p, struct s *p2) { void *gp, *gp1; diff --git a/gcc/testsuite/gcc.target/i386/pr82699-1.c b/gcc/testsuite/gcc.target/i386/pr82699-1.c index 272d079..96e3ccb 100644 --- a/gcc/testsuite/gcc.target/i386/pr82699-1.c +++ b/gcc/testsuite/gcc.target/i386/pr82699-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target *-*-linux* } } */ -/* { dg-options "-O2 -fno-pic -fcf-protection -pg -fasynchronous-unwind-tables" } */ +/* { dg-options "-O2 -mfentry -fno-pic -fcf-protection -pg -fasynchronous-unwind-tables" } */ /* { dg-final { scan-assembler-times {\t\.cfi_startproc\n\tendbr} 1 } } */ extern int bar (int); diff --git a/gcc/testsuite/gcc.target/i386/pr91384-1.c b/gcc/testsuite/gcc.target/i386/pr91384-1.c new file mode 100644 index 0000000..4f8823d --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr91384-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -mapxf" } */ + +void foo (void); +void bar (void); + +int +test (int a) +{ + int r; + + if (r = -a) + foo (); + else + bar (); + + return r; +} + +/* { dg-final { scan-assembler-not "testl" } } */ diff --git a/gcc/testsuite/gcc.target/i386/sibcall-8.c b/gcc/testsuite/gcc.target/i386/sibcall-8.c index 3ab3809..29ebfe5 100644 --- a/gcc/testsuite/gcc.target/i386/sibcall-8.c +++ b/gcc/testsuite/gcc.target/i386/sibcall-8.c @@ -1,23 +1,29 @@ /* { dg-do run } */ /* { dg-options "-O2" } */ +#ifndef __x86_64__ +#define REGPARM __attribute__((regparm(1))) +#else +#define REGPARM +#endif + extern void abort (void); -static int __attribute__((regparm(1))) +static int REGPARM bar(void *arg) { return arg != bar; } -static int __attribute__((noinline,noclone,regparm(1))) -foo(int (__attribute__((regparm(1))) **bar)(void*)) +static int __attribute__((noinline,noclone)) REGPARM +foo(int (REGPARM **bar)(void*)) { return (*bar)(*bar); } int main() { - int (__attribute__((regparm(1))) *p)(void*) = bar; + int (REGPARM *p)(void*) = bar; if (foo(&p)) abort(); return 0; diff --git a/gcc/testsuite/gcc.target/i386/sw-1.c b/gcc/testsuite/gcc.target/i386/sw-1.c index 14db3ce..025f0e1 100644 --- a/gcc/testsuite/gcc.target/i386/sw-1.c +++ b/gcc/testsuite/gcc.target/i386/sw-1.c @@ -7,7 +7,10 @@ int c; int x[2000]; -__attribute__((regparm(1))) void foo (int a, int b) +#ifndef __x86_64__ +__attribute__((regparm(1))) +#endif +void foo (int a, int b) { int t[200]; if (a == 0 || c == 0) diff --git a/gcc/testsuite/gcc.target/i386/uintr-2.c b/gcc/testsuite/gcc.target/i386/uintr-2.c index 0a83c66..a0d2514 100644 --- a/gcc/testsuite/gcc.target/i386/uintr-2.c +++ b/gcc/testsuite/gcc.target/i386/uintr-2.c @@ -15,6 +15,6 @@ foo (void *frame, uword_t uirrv) void __attribute__((interrupt)) -UINTR_hanlder (struct __uintr_frame *frame, uword_t uirrv) +UINTR_handler (struct __uintr_frame *frame, uword_t uirrv) { } diff --git a/gcc/testsuite/gcc.target/i386/uintr-5.c b/gcc/testsuite/gcc.target/i386/uintr-5.c index 49cb2ec..7c7c12f 100644 --- a/gcc/testsuite/gcc.target/i386/uintr-5.c +++ b/gcc/testsuite/gcc.target/i386/uintr-5.c @@ -7,6 +7,6 @@ typedef unsigned int uword_t __attribute__ ((mode (__word__))); void -UINTR_hanlder (struct __uintr_frame *frame, uword_t uirrv) +UINTR_handler (struct __uintr_frame *frame, uword_t uirrv) { } diff --git a/gcc/testsuite/gcc.target/loongarch/pr121064.c b/gcc/testsuite/gcc.target/loongarch/pr121064.c new file mode 100644 index 0000000..a466c7a --- /dev/null +++ b/gcc/testsuite/gcc.target/loongarch/pr121064.c @@ -0,0 +1,38 @@ +/* { dg-require-effective-target loongarch_sx_hw } */ +/* { dg-do run } */ +/* { dg-options "-march=loongarch64 -mfpu=64 -mlsx -O3" } */ + +typedef __INT32_TYPE__ int32_t; +typedef unsigned __INT32_TYPE__ uint32_t; + +__attribute__ ((noipa)) static int32_t +long_filter_ehigh_3830_1 (int32_t *buffer, int length) +{ + int i, j; + int32_t dotprod = 0; + int32_t delay[4] = { 0 }; + uint32_t coeffs[4] = { 0 }; + + for (i = 0; i < length; i++) + { + dotprod = 0; + for (j = 3; j >= 0; j--) + { + dotprod += delay[j] * coeffs[j]; + coeffs[j] += ((delay[j] >> 31) | 1); + } + for (j = 3; j > 0; j--) + delay[j] = delay[j - 1]; + delay[0] = buffer[i]; + } + + return dotprod; +} + +int +main () +{ + int32_t buffer[] = { -1, 1 }; + if (long_filter_ehigh_3830_1 (buffer, 2) != -1) + __builtin_trap (); +} diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_100.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_100.c new file mode 100644 index 0000000..e759a11 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_100.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_100 -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_100a.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_100a.c new file mode 100644 index 0000000..153ed1e --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_100a.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_100a -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_100f.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_100f.c new file mode 100644 index 0000000..9bb9127 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_100f.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_100f -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_101.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_101.c new file mode 100644 index 0000000..06b3ceb --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_101.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_101 -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_101a.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_101a.c new file mode 100644 index 0000000..0cca3f3 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_101a.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_101a -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_101f.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_101f.c new file mode 100644 index 0000000..9548be5 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_101f.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_101f -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_103.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_103.c new file mode 100644 index 0000000..5731249 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_103.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_103 -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_103a.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_103a.c new file mode 100644 index 0000000..aea501e --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_103a.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_103a -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_103f.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_103f.c new file mode 100644 index 0000000..59d8987 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_103f.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_103f -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_120.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_120.c new file mode 100644 index 0000000..d28a671 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_120.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_120 -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_120a.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_120a.c new file mode 100644 index 0000000..613dd65 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_120a.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_120a -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_120f.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_120f.c new file mode 100644 index 0000000..1b23350 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_120f.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_120f -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_121.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_121.c new file mode 100644 index 0000000..240332b --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_121.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_121 -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_121a.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_121a.c new file mode 100644 index 0000000..1e7fb70 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_121a.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_121a -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/nvptx/march-map=sm_121f.c b/gcc/testsuite/gcc.target/nvptx/march-map=sm_121f.c new file mode 100644 index 0000000..2cbec51 --- /dev/null +++ b/gcc/testsuite/gcc.target/nvptx/march-map=sm_121f.c @@ -0,0 +1,19 @@ +/* { dg-do assemble } */ +/* { dg-options {-march-map=sm_121f -mptx=_} } */ +/* { dg-additional-options -save-temps } */ +/* { dg-final { scan-assembler-times {(?n)^ \.version 7\.8$} 1 } } */ +/* { dg-final { scan-assembler-times {(?n)^ \.target sm_89$} 1 } } */ + +#if __PTX_ISA_VERSION_MAJOR__ != 7 +#error wrong value for __PTX_ISA_VERSION_MAJOR__ +#endif + +#if __PTX_ISA_VERSION_MINOR__ != 8 +#error wrong value for __PTX_ISA_VERSION_MINOR__ +#endif + +#if __PTX_SM__ != 890 +#error wrong value for __PTX_SM__ +#endif + +int dummy; diff --git a/gcc/testsuite/gcc.target/powerpc/pr121007.c b/gcc/testsuite/gcc.target/powerpc/pr121007.c new file mode 100644 index 0000000..9e6b1be --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr121007.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ + +typedef struct { int a; } A; +unsigned char *a; +char b; +int c; +void foo (vector char, vector char, vector char); + +void +bar (long stride) +{ + vector char v0, v1, v2, v3, v5; + vector char r0 = __builtin_vec_vsx_ld (0, a); + vector char r2 = __builtin_vec_vsx_ld (2 * stride, a - 3); + vector char r3 = __builtin_vec_vsx_ld (3 * stride, a - 3); + vector char r4; + vector char r6 = __builtin_vec_vsx_ld (6 * stride, a - 3); + vector char r7 = __builtin_vec_vsx_ld (7 * stride, a - 3); + vector char r14, h, i, j; + if (b) + return; + v1 = __builtin_vec_vsx_ld (9 * stride, a); + v2 = __builtin_vec_vsx_ld (10 * stride, a - 3); + v3 = __builtin_vec_vsx_ld (11 * stride, a - 3); + r3 = __builtin_vec_mergeh (r3, v3); + v5 = __builtin_vec_mergel (r2, r6); + r14 = __builtin_vec_mergeh (r3, r7); + r4 = __builtin_vec_mergeh (v2, r14); + v0 = __builtin_vec_mergeh (r0, r4); + union { unsigned char a[16]; A b; } temp; + vector signed char k; + h = __builtin_vec_ld (0, temp.a); + i = __builtin_vec_splat (h, 1); + temp.b.a = c; + k = __builtin_vec_ld (0, (signed char *) temp.a); + j = __builtin_vec_and (i, (vector char) k); + foo (v1, v0, j); + foo (v1, v5, j); +} diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c index 5095d50..312043b 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c @@ -1,8 +1,16 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ -/* { dg-options "-O2 -mdejagnu-cpu=power7 -fno-inline-functions" } */ +/* { dg-options "-O2 -mdejagnu-cpu=power7 -fno-inline-functions -fno-ipa-icf" } */ /* { dg-require-effective-target powerpc_vsx } */ +/* PR testsuite/119382 + Note: Added -fno-ipa-icf to disable Interprocedural Identical Code + Folding (ICF). Without this, insert_di_0_v2 is merged with insert_di_0 + due to improved alias analysis introduced in commit r15-7961-gdc47161c1f32c3. + This results in the compiler replacing insert_di_0_v2 with a tail call to + insert_di_0, altering expected test behavior. Disabling ICF ensures correct + execution of the test. */ + /* Test simple extract/insert/slat operations. Make sure all types are supported with various options. */ diff --git a/gcc/testsuite/gcc.target/pru/pragma-ctable_entry-2.c b/gcc/testsuite/gcc.target/pru/pragma-ctable_entry-2.c new file mode 100644 index 0000000..a1c707d --- /dev/null +++ b/gcc/testsuite/gcc.target/pru/pragma-ctable_entry-2.c @@ -0,0 +1,22 @@ +/* Test for base addresses with bit 31 set (PR121124). */ + +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +/* -O1 in the options is significant. Without it LBCO/SBCO operations may + not be optimized to the respective instructions. */ + + +#pragma ctable_entry 12 0x80beef00 + +unsigned int +test_ctable (unsigned int val1, unsigned int val2) +{ + ((volatile unsigned short int *)0x80beef00)[0] = val2; + ((volatile unsigned int *)0x80beef00)[val1] = val2; + return ((volatile unsigned int *)0x80beef00)[5]; +} + +/* { dg-final { scan-assembler "sbco\\tr15.b\[012\]?, 12, 0, 2" } } */ +/* { dg-final { scan-assembler "sbco\\tr15.b0, 12, r14, 4" } } */ +/* { dg-final { scan-assembler "lbco\\tr14.b0, 12, 20, 4" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-conflict-mode.c b/gcc/testsuite/gcc.target/riscv/interrupt-conflict-mode.c index 81ebf5f..15cc3ee 100644 --- a/gcc/testsuite/gcc.target/riscv/interrupt-conflict-mode.c +++ b/gcc/testsuite/gcc.target/riscv/interrupt-conflict-mode.c @@ -1,7 +1,7 @@ /* Verify proper errors are generated for conflicted interrupt type. */ /* { dg-do compile } */ /* { dg-options "" } */ -void __attribute__ ((interrupt ("user"))) +void __attribute__ ((interrupt ("supervisor"))) foo(void); void __attribute__ ((interrupt ("machine"))) diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-rnmi.c b/gcc/testsuite/gcc.target/riscv/interrupt-rnmi.c new file mode 100644 index 0000000..f340108 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/interrupt-rnmi.c @@ -0,0 +1,11 @@ +/* Verify the return instruction is mnret. */ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc_smrnmi" { target { rv32 } } } */ +/* { dg-options "-march=rv64gc_smrnmi" { target { rv64 } } } */ + +void __attribute__ ((interrupt ("rnmi"))) +foo (void) +{ +} + +/* { dg-final { scan-assembler {\mmnret} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/interrupt-umode.c b/gcc/testsuite/gcc.target/riscv/interrupt-umode.c deleted file mode 100644 index 042abf0..0000000 --- a/gcc/testsuite/gcc.target/riscv/interrupt-umode.c +++ /dev/null @@ -1,8 +0,0 @@ -/* Verify the return instruction is mret. */ -/* { dg-do compile } */ -/* { dg-options "" } */ -void __attribute__ ((interrupt ("user"))) -foo (void) -{ -} -/* { dg-final { scan-assembler {\muret} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/mipscondmov.c b/gcc/testsuite/gcc.target/riscv/mipscondmov.c new file mode 100644 index 0000000..5485133 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/mipscondmov.c @@ -0,0 +1,29 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32imafd_xmipscmov" { target { rv32 } } } */ +/* { dg-options "-march=rv64imafd_xmipscmov -mabi=lp64d" { target { rv64 } } } */ +/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ + +#define MYTEST(name, mytype) \ +mytype test1_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a == b) ? c : d; } \ +mytype test2_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a != b) ? c : d; } \ +mytype test3_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a > b) ? c : d; } \ +mytype test4_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a >= b) ? c : d; } \ +mytype test5_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a < b) ? c : d; } \ +mytype test6_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a <= b) ? c : d; } \ +mytype test7_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a == 1) ? c : d; } \ +mytype test8_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a != 1) ? c : d; } \ +mytype test9_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a > 1) ? c : d; } \ +mytype test10_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a >= 1) ? c : d; } \ +mytype test11_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a < 1) ? c : d; } \ +mytype test12_ ## name (mytype a, mytype b, mytype c, mytype d) { return (a <= 1) ? c : d; } + +MYTEST(1, long) +MYTEST(2, unsigned long) +MYTEST(3, int) +MYTEST(4, unsigned int) +MYTEST(5, short) +MYTEST(6, unsigned short) +MYTEST(7, signed char) +MYTEST(8, unsigned char) + +/* { dg-final { scan-assembler-times "mips.ccmov" 96 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h index 4aeb637..2de7d7c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h @@ -3,6 +3,11 @@ #include <stdint.h> +#if __riscv_xlen == 64 +typedef unsigned __int128 uint128_t; +typedef signed __int128 int128_t; +#endif + #define DEF_AVG_0(NT, WT, NAME) \ __attribute__((noinline)) \ void \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i32.c index 138124c..31d3b43 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i32.c @@ -6,7 +6,7 @@ #define NT int16_t #define WT int32_t -DEF_AVG_1(NT, WT, avg_ceil) +DEF_AVG_1_WRAP(NT, WT, avg_ceil) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i64.c index 30438c9..7f30b9e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i64.c @@ -6,7 +6,7 @@ #define NT int16_t #define WT int64_t -DEF_AVG_1(NT, WT, avg_ceil) +DEF_AVG_1_WRAP(NT, WT, avg_ceil) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i32-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i32-from-i64.c index 2e9cfa5..2e06d0a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i32-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i32-from-i64.c @@ -6,7 +6,7 @@ #define NT int32_t #define WT int64_t -DEF_AVG_1(NT, WT, avg_ceil) +DEF_AVG_1_WRAP(NT, WT, avg_ceil) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c new file mode 100644 index 0000000..ca23066 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "avg.h" + +#define NT int64_t +#define WT int128_t + +DEF_AVG_1_WRAP(NT, WT, avg_ceil) + +/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 1 } } */ +/* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i16.c index 2ebf294..dda84a6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i16.c @@ -6,7 +6,7 @@ #define NT int8_t #define WT int16_t -DEF_AVG_1(NT, WT, avg_ceil) +DEF_AVG_1_WRAP(NT, WT, avg_ceil) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i32.c index 64fec913..dfd2bb3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i32.c @@ -6,7 +6,7 @@ #define NT int8_t #define WT int32_t -DEF_AVG_1(NT, WT, avg_ceil) +DEF_AVG_1_WRAP(NT, WT, avg_ceil) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i64.c index a72642c..d1060cc 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i64.c @@ -6,7 +6,7 @@ #define NT int8_t #define WT int64_t -DEF_AVG_1(NT, WT, avg_ceil) +DEF_AVG_1_WRAP(NT, WT, avg_ceil) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*0} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i32.c index 1fa080b..3d872a8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i32.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i64.c index deec763..eda9736 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i64.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i32-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i32-from-i64.c index fa72000..21cbb94 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i32-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i32-from-i64.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i64-from-i128.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i64-from-i128.c new file mode 100644 index 0000000..ee5330c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i64-from-i128.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v && rv64 } } } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ + +#include "avg.h" +#include "avg_data.h" + +#define WT int128_t +#define NT int64_t +#define NAME avg_ceil + +DEF_AVG_1_WRAP(NT, WT, NAME) + +#define TEST_DATA TEST_AVG_DATA_WRAP(NT, NAME) +#define TEST_RUN(NT, WT, NAME, a, b, out, n) RUN_AVG_1_WRAP(NT, WT, NAME, a, b, out, n) + +#include "avg_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i16.c index 6865cf2..fd91b6f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i16.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i32.c index 78620f4..38f4920 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i32.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i64.c index b2c763c..f65ee15 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i64.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h index 12b464a..49103f3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h @@ -169,8 +169,8 @@ int64_t TEST_AVG_DATA(int64_t, avg_floor)[][3][N] = }, { 9223372036854775806ull, 9223372036854775806ull, 9223372036854775806ull, 9223372036854775806ull, - 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, -2ull, -2ull, -2ull, -2ull, + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, }, { @@ -345,8 +345,8 @@ int64_t TEST_AVG_DATA(int64_t, avg_ceil)[][3][N] = }, { 9223372036854775806ull, 9223372036854775806ull, 9223372036854775806ull, 9223372036854775806ull, - 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, -2ull, -2ull, -2ull, -2ull, + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, }, { diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c index 16ba967..fc7943c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c @@ -6,7 +6,7 @@ #define NT int16_t #define WT int32_t -DEF_AVG_0(NT, WT, avg_floor) +DEF_AVG_0_WRAP(NT, WT, avg_floor) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c index b229b4b..e02e5df 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c @@ -6,7 +6,7 @@ #define NT int16_t #define WT int64_t -DEF_AVG_0(NT, WT, avg_floor) +DEF_AVG_0_WRAP(NT, WT, avg_floor) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c index 5f946bb..e36e424 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c @@ -6,7 +6,7 @@ #define NT int32_t #define WT int64_t -DEF_AVG_0(NT, WT, avg_floor) +DEF_AVG_0_WRAP(NT, WT, avg_floor) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i64-from-i128.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i64-from-i128.c new file mode 100644 index 0000000..3e2d97d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i64-from-i128.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "avg.h" + +#define NT int64_t +#define WT int128_t + +DEF_AVG_0_WRAP(NT, WT, avg_floor) + +/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */ +/* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c index 5d9297a..cdbb299 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c @@ -6,7 +6,7 @@ #define NT int8_t #define WT int16_t -DEF_AVG_0(NT, WT, avg_floor) +DEF_AVG_0_WRAP(NT, WT, avg_floor) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c index 5c5d4ea..53508b0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c @@ -6,7 +6,7 @@ #define NT int8_t #define WT int32_t -DEF_AVG_0(NT, WT, avg_floor) +DEF_AVG_0_WRAP(NT, WT, avg_floor) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c index f297953..9a6d1a2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c @@ -6,7 +6,7 @@ #define NT int8_t #define WT int64_t -DEF_AVG_0(NT, WT, avg_floor) +DEF_AVG_0_WRAP(NT, WT, avg_floor) /* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */ /* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c index 9d0dd61..92239a2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c index 2736baa..5716c29 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c index 2334045..705e091 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i64-from-i128.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i64-from-i128.c new file mode 100644 index 0000000..91e9809 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i64-from-i128.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { riscv_v && rv64 } } } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ + +#include "avg.h" +#include "avg_data.h" + +#define WT int128_t +#define NT int64_t +#define NAME avg_floor + +DEF_AVG_0_WRAP(NT, WT, NAME) + +#define TEST_DATA TEST_AVG_DATA_WRAP(NT, NAME) +#define TEST_RUN(NT, WT, NAME, a, b, out, n) RUN_AVG_0_WRAP(NT, WT, NAME, a, b, out, n) + +#include "avg_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c index 8364748..abe5c5b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c index 157c936..355b90f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c index 2db0d3c..a9ae96f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c @@ -1,5 +1,5 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-std=c99 -O3" } */ +/* { dg-additional-options "-std=c99 -O3 -Wno-pedantic" } */ #include "avg.h" #include "avg_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h index 9e4b4f4..93c29f0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_arith.h @@ -531,6 +531,40 @@ vec_sat_u_sub_##T##_fmt_10 (T *out, T *op_1, T *op_2, unsigned limit) \ #define DEF_VEC_SAT_U_SUB_FMT_10_WRAP(T) \ DEF_VEC_SAT_U_SUB_FMT_10(T) +#define DEF_VEC_SAT_U_SUB_FMT_11(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_11 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T ret; \ + T overflow = __builtin_sub_overflow (x, y, &ret); \ + out[i] = overflow ? 0 : ret; \ + } \ +} +#define DEF_VEC_SAT_U_SUB_FMT_11_WRAP(T) \ + DEF_VEC_SAT_U_SUB_FMT_11(T) + +#define DEF_VEC_SAT_U_SUB_FMT_12(T) \ +void __attribute__((noinline)) \ +vec_sat_u_sub_##T##_fmt_12 (T *out, T *op_1, T *op_2, unsigned limit) \ +{ \ + unsigned i; \ + for (i = 0; i < limit; i++) \ + { \ + T x = op_1[i]; \ + T y = op_2[i]; \ + T ret; \ + T overflow = __builtin_sub_overflow (x, y, &ret); \ + out[i] = !overflow ? ret : 0; \ + } \ +} +#define DEF_VEC_SAT_U_SUB_FMT_12_WRAP(T) \ + DEF_VEC_SAT_U_SUB_FMT_12(T) + #define DEF_VEC_SAT_U_SUB_ZIP(T1, T2) \ void __attribute__((noinline)) \ vec_sat_u_sub_##T1##_##T2##_fmt_zip (T1 *x, T2 b, unsigned limit) \ @@ -737,6 +771,16 @@ vec_sat_s_sub_##T##_fmt_4 (T *out, T *op_1, T *op_2, unsigned limit) \ #define RUN_VEC_SAT_U_SUB_FMT_10_WRAP(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_10(T, out, op_1, op_2, N) +#define RUN_VEC_SAT_U_SUB_FMT_11(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_11(out, op_1, op_2, N) +#define RUN_VEC_SAT_U_SUB_FMT_11_WRAP(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_U_SUB_FMT_11(T, out, op_1, op_2, N) + +#define RUN_VEC_SAT_U_SUB_FMT_12(T, out, op_1, op_2, N) \ + vec_sat_u_sub_##T##_fmt_12(out, op_1, op_2, N) +#define RUN_VEC_SAT_U_SUB_FMT_12_WRAP(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_U_SUB_FMT_12(T, out, op_1, op_2, N) + #define RUN_VEC_SAT_U_SUB_FMT_ZIP(T1, T2, x, b, N) \ vec_sat_u_sub_##T1##_##T2##_fmt_zip(x, b, N) #define RUN_VEC_SAT_U_SUB_FMT_ZIP_WRAP(T1, T2, x, b, N) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h index 4469f0e..7647439 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h @@ -744,7 +744,7 @@ uint64_t TEST_UNARY_DATA(uint64_t, sat_u_sub_imm)[][2][N] = }, }; -uint8_t TEST_UNARY_DATA(uint8_t, usub)[][3][N] = { +uint8_t TEST_UNARY_DATA(uint8_t, ussub)[][3][N] = { { { 0, 0, 0, 0, @@ -807,7 +807,7 @@ uint8_t TEST_UNARY_DATA(uint8_t, usub)[][3][N] = { }, }; -uint16_t TEST_UNARY_DATA(uint16_t, usub)[][3][N] = { +uint16_t TEST_UNARY_DATA(uint16_t, ussub)[][3][N] = { { { 0, 0, 0, 0, @@ -870,7 +870,7 @@ uint16_t TEST_UNARY_DATA(uint16_t, usub)[][3][N] = { }, }; -uint32_t TEST_UNARY_DATA(uint32_t, usub)[][3][N] = { +uint32_t TEST_UNARY_DATA(uint32_t, ussub)[][3][N] = { { { 0, 0, 4, 0, @@ -933,7 +933,7 @@ uint32_t TEST_UNARY_DATA(uint32_t, usub)[][3][N] = { }, }; -uint64_t TEST_UNARY_DATA(uint64_t, usub)[][3][N] = { +uint64_t TEST_UNARY_DATA(uint64_t, ussub)[][3][N] = { { { 0, 9, 0, 0, diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u16.c new file mode 100644 index 0000000..57da9e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u16.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ + +#include "vec_sat_arith.h" + +DEF_VEC_SAT_U_SUB_FMT_11(uint16_t) + +/* { dg-final { scan-tree-dump-times ".SAT_SUB " 2 "optimized" } } */ +/* { dg-final { scan-assembler-times {vssubu\.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u32.c new file mode 100644 index 0000000..b5264a3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u32.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ + +#include "vec_sat_arith.h" + +DEF_VEC_SAT_U_SUB_FMT_11(uint32_t) + +/* { dg-final { scan-tree-dump-times ".SAT_SUB " 2 "optimized" } } */ +/* { dg-final { scan-assembler-times {vssubu\.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u64.c new file mode 100644 index 0000000..1a68b5c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u64.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ + +#include "vec_sat_arith.h" + +DEF_VEC_SAT_U_SUB_FMT_11(uint64_t) + +/* { dg-final { scan-tree-dump-times ".SAT_SUB " 2 "optimized" } } */ +/* { dg-final { scan-assembler-times {vssubu\.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u8.c new file mode 100644 index 0000000..a1c5c19 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-11-u8.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ + +#include "vec_sat_arith.h" + +DEF_VEC_SAT_U_SUB_FMT_11(uint8_t) + +/* { dg-final { scan-tree-dump-times ".SAT_SUB " 2 "optimized" } } */ +/* { dg-final { scan-assembler-times {vssubu\.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u16.c new file mode 100644 index 0000000..fd987e9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u16.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ + +#include "vec_sat_arith.h" + +DEF_VEC_SAT_U_SUB_FMT_12(uint16_t) + +/* { dg-final { scan-tree-dump-times ".SAT_SUB " 2 "optimized" } } */ +/* { dg-final { scan-assembler-times {vssubu\.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u32.c new file mode 100644 index 0000000..bc380fe --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u32.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ + +#include "vec_sat_arith.h" + +DEF_VEC_SAT_U_SUB_FMT_12(uint32_t) + +/* { dg-final { scan-tree-dump-times ".SAT_SUB " 2 "optimized" } } */ +/* { dg-final { scan-assembler-times {vssubu\.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u64.c new file mode 100644 index 0000000..c03163f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u64.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ + +#include "vec_sat_arith.h" + +DEF_VEC_SAT_U_SUB_FMT_12(uint64_t) + +/* { dg-final { scan-tree-dump-times ".SAT_SUB " 2 "optimized" } } */ +/* { dg-final { scan-assembler-times {vssubu\.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u8.c new file mode 100644 index 0000000..91e1909 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-12-u8.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -ftree-vectorize -fdump-tree-optimized" } */ + +#include "vec_sat_arith.h" + +DEF_VEC_SAT_U_SUB_FMT_12(uint8_t) + +/* { dg-final { scan-tree-dump-times ".SAT_SUB " 2 "optimized" } } */ +/* { dg-final { scan-assembler-times {vssubu\.vv} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u16.c index 5fc747b..5878c5b6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u16.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_1_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_1_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u32.c index c9976d0..f74979f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u32.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_1_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_1_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u64.c index 10a0b0c..1250e5b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u64.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_1_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_1_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u8.c index 7b22863..a2a77dd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u8.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_1_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_1_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u16.c index a6b2dc4..19c8fa0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u16.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_10_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_10_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u32.c index 91e749e..ada136f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u32.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_10_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_10_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u64.c index b7a6314..488c158 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u64.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_10_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_10_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u8.c index 1d55798..127c27a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u8.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_10_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_10_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u16.c new file mode 100644 index 0000000..4b49467 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u16.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "vec_sat_arith.h" +#include "vec_sat_data.h" + +#define T uint16_t + +DEF_VEC_SAT_U_SUB_FMT_11_WRAP(T) + +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) +#define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_U_SUB_FMT_11_WRAP(T, out, op_1, op_2, N) + +#include "vec_sat_binary_vvv_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u32.c new file mode 100644 index 0000000..80b55ea --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u32.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "vec_sat_arith.h" +#include "vec_sat_data.h" + +#define T uint32_t + +DEF_VEC_SAT_U_SUB_FMT_11_WRAP(T) + +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) +#define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_U_SUB_FMT_11_WRAP(T, out, op_1, op_2, N) + +#include "vec_sat_binary_vvv_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u64.c new file mode 100644 index 0000000..6a89d0f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u64.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "vec_sat_arith.h" +#include "vec_sat_data.h" + +#define T uint64_t + +DEF_VEC_SAT_U_SUB_FMT_11_WRAP(T) + +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) +#define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_U_SUB_FMT_11_WRAP(T, out, op_1, op_2, N) + +#include "vec_sat_binary_vvv_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u8.c new file mode 100644 index 0000000..974493e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-11-u8.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "vec_sat_arith.h" +#include "vec_sat_data.h" + +#define T uint8_t + +DEF_VEC_SAT_U_SUB_FMT_11_WRAP(T) + +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) +#define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_U_SUB_FMT_11_WRAP(T, out, op_1, op_2, N) + +#include "vec_sat_binary_vvv_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u16.c new file mode 100644 index 0000000..28778b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u16.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "vec_sat_arith.h" +#include "vec_sat_data.h" + +#define T uint16_t + +DEF_VEC_SAT_U_SUB_FMT_12_WRAP(T) + +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) +#define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_U_SUB_FMT_12_WRAP(T, out, op_1, op_2, N) + +#include "vec_sat_binary_vvv_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u32.c new file mode 100644 index 0000000..936a39a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u32.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "vec_sat_arith.h" +#include "vec_sat_data.h" + +#define T uint32_t + +DEF_VEC_SAT_U_SUB_FMT_12_WRAP(T) + +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) +#define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_U_SUB_FMT_12_WRAP(T, out, op_1, op_2, N) + +#include "vec_sat_binary_vvv_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u64.c new file mode 100644 index 0000000..b8fa65b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u64.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "vec_sat_arith.h" +#include "vec_sat_data.h" + +#define T uint64_t + +DEF_VEC_SAT_U_SUB_FMT_12_WRAP(T) + +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) +#define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_U_SUB_FMT_12_WRAP(T, out, op_1, op_2, N) + +#include "vec_sat_binary_vvv_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u8.c new file mode 100644 index 0000000..6bff1e1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-12-u8.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "vec_sat_arith.h" +#include "vec_sat_data.h" + +#define T uint8_t + +DEF_VEC_SAT_U_SUB_FMT_12_WRAP(T) + +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) +#define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ + RUN_VEC_SAT_U_SUB_FMT_12_WRAP(T, out, op_1, op_2, N) + +#include "vec_sat_binary_vvv_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u16.c index dcd6d17..45bef88 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u16.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_2_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_2_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u32.c index 98a1fff..6d8a653 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u32.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_2_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_2_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u64.c index 5445b01..0132d46 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u64.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_2_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_2_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u8.c index 3aaec4d..425f86f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u8.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_2_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_2_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u16.c index 99e58cd..97a8e08 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u16.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_3_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_3_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u32.c index bd7bcd0..9124899 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u32.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_3_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_3_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u64.c index 96ee0c8..1e54ede 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u64.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_3_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_3_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u8.c index b9fa957..d8d53b7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u8.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_3_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_3_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u16.c index 6d4f377..b293823 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u16.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_4_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_4_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u32.c index 1425017..f0f1c4f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u32.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_4_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_4_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u64.c index 149d481..27c28e2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u64.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_4_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_4_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u8.c index 12195cd..7911825 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u8.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_4_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_4_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u16.c index 9cd2577..6ae7b36 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u16.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_5_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_5_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u32.c index 638e054..4e6b9e6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u32.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_5_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_5_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u64.c index db86baf..6b26913 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u64.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_5_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_5_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u8.c index b277e1c..2bd28cd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u8.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_5_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_5_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u16.c index e79e2fc..69b0be9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u16.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_6_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_6_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u32.c index cd9cbfc..2450586 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u32.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_6_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_6_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u64.c index 7c0f753..0b97910 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u64.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_6_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_6_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u8.c index d97a834..afb23f6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u8.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_6_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_6_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u16.c index 3b8c870..0466d4c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u16.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_7_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_7_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u32.c index 065d898..14b8701 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u32.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_7_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_7_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u64.c index f6783a8..7e0afd8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u64.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_7_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_7_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u8.c index 6b9ae2d..40b1a6a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u8.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_7_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_7_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u16.c index 27c4563..bd33048 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u16.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_8_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_8_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u32.c index 2dba875..36f78f5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u32.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_8_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_8_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u64.c index 149a522..3bc5d5d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u64.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_8_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_8_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u8.c index 739850e..3964d1b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u8.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_8_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_8_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u16.c index 3eb91ef..4c0809a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u16.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_9_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_9_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u32.c index 3e8d6fb..3e700bd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u32.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_9_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_9_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u64.c index bb09035..81b8dc8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u64.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_9_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_9_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u8.c index 1dc3191..8bc52ae 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u8.c @@ -8,7 +8,7 @@ DEF_VEC_SAT_U_SUB_FMT_9_WRAP(T) -#define test_data TEST_UNARY_DATA_WRAP(T, usub) +#define test_data TEST_UNARY_DATA_WRAP(T, ussub) #define RUN_VEC_SAT_BINARY(T, out, op_1, op_2, N) \ RUN_VEC_SAT_U_SUB_FMT_9_WRAP(T, out, op_1, op_2, N) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-6.c index 4dc5703..0fa1ea0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/repeat-6.c @@ -72,7 +72,7 @@ f_vnx128qi (int8_t *out) *(vnx128qi *) out = v; } -/* { dg-final { scan-assembler-times {vmv.v.x\tv[0-9]+,\s*[a-x0-9]+} 6 } } */ +/* { dg-final { scan-assembler-times {vmv.v.x\tv[0-9]+,\s*[a-x0-9]+} 7 } } */ /* { dg-final { scan-assembler-times {slli\t[a-x0-9]+,\s*[a-x0-9]+,\s*8} 6 } } */ /* { dg-final { scan-assembler-times {or\t[a-x0-9]+,\s*[a-x0-9]+,\s*[a-x0-9]+} 6 } } */ /* { dg-final { scan-assembler-times {vslide1down\.vx\tv[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c index 05cf57c..811f26c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c @@ -11,6 +11,10 @@ DEF_VF_MULOP_ACC_CASE_0 (_Float16, +, +, acc) DEF_VF_MULOP_ACC_CASE_0 (_Float16, -, +, sac) DEF_VF_MULOP_ACC_CASE_0 (_Float16, +, -, nacc) DEF_VF_MULOP_ACC_CASE_0 (_Float16, -, -, nsac) +DEF_VF_MULOP_WIDEN_CASE_0 (_Float16, float, +, +, acc) +DEF_VF_MULOP_WIDEN_CASE_0 (_Float16, float, -, +, sac) +DEF_VF_MULOP_WIDEN_CASE_0 (_Float16, float, +, -, nacc) +DEF_VF_MULOP_WIDEN_CASE_0 (_Float16, float, -, -, nsac) /* { dg-final { scan-assembler-times {vfmadd.vf} 1 } } */ /* { dg-final { scan-assembler-times {vfmsub.vf} 1 } } */ @@ -20,3 +24,7 @@ DEF_VF_MULOP_ACC_CASE_0 (_Float16, -, -, nsac) /* { dg-final { scan-assembler-times {vfmsac.vf} 1 } } */ /* { dg-final { scan-assembler-times {vfnmacc.vf} 1 } } */ /* { dg-final { scan-assembler-times {vfnmsac.vf} 1 } } */ +/* { dg-final { scan-assembler-times {vfwmacc.vf} 1 } } */ +/* { dg-final { scan-assembler-times {vfwmsac.vf} 1 } } */ +/* { dg-final { scan-assembler-times {vfwnmacc.vf} 1 } } */ +/* { dg-final { scan-assembler-times {vfwnmsac.vf} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c index 873e315..ca82ead 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c @@ -11,6 +11,10 @@ DEF_VF_MULOP_ACC_CASE_0 (float, +, +, acc) DEF_VF_MULOP_ACC_CASE_0 (float, -, +, sac) DEF_VF_MULOP_ACC_CASE_0 (float, +, -, nacc) DEF_VF_MULOP_ACC_CASE_0 (float, -, -, nsac) +DEF_VF_MULOP_WIDEN_CASE_0 (float, double, +, +, acc) +DEF_VF_MULOP_WIDEN_CASE_0 (float, double, -, +, sac) +DEF_VF_MULOP_WIDEN_CASE_0 (float, double, +, -, nacc) +DEF_VF_MULOP_WIDEN_CASE_0 (float, double, -, -, nsac) /* { dg-final { scan-assembler-times {vfmadd.vf} 1 } } */ /* { dg-final { scan-assembler-times {vfmsub.vf} 1 } } */ @@ -20,3 +24,7 @@ DEF_VF_MULOP_ACC_CASE_0 (float, -, -, nsac) /* { dg-final { scan-assembler-times {vfmsac.vf} 1 } } */ /* { dg-final { scan-assembler-times {vfnmacc.vf} 1 } } */ /* { dg-final { scan-assembler-times {vfnmsac.vf} 1 } } */ +/* { dg-final { scan-assembler-times {vfwmacc.vf} 1 } } */ +/* { dg-final { scan-assembler-times {vfwmsac.vf} 1 } } */ +/* { dg-final { scan-assembler-times {vfwnmacc.vf} 1 } } */ +/* { dg-final { scan-assembler-times {vfwnmsac.vf} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c index 78127b6..3a39303 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c @@ -11,3 +11,9 @@ /* { dg-final { scan-assembler-not {vfmsac.vf} } } */ /* { dg-final { scan-assembler-not {vfnmacc.vf} } } */ /* { dg-final { scan-assembler-not {vfnmsac.vf} } } */ +/* { dg-final { scan-assembler-not {vfwmacc.vf} } } */ +/* { dg-final { scan-assembler-not {vfwmsac.vf} } } */ +/* { dg-final { scan-assembler-not {vfwnmacc.vf} } } */ +/* { dg-final { scan-assembler-not {vfwnmsac.vf} } } */ +/* { dg-final { scan-assembler-times {fcvt.s.h} 4 } } */ +/* { dg-final { scan-assembler-times {vfmv.v.f} 12 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c index 30d57e0..b4618bae 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c @@ -11,3 +11,9 @@ /* { dg-final { scan-assembler-not {vfmsac.vf} } } */ /* { dg-final { scan-assembler-not {vfnmacc.vf} } } */ /* { dg-final { scan-assembler-not {vfnmsac.vf} } } */ +/* { dg-final { scan-assembler-not {vfwmacc.vf} } } */ +/* { dg-final { scan-assembler-not {vfwmsac.vf} } } */ +/* { dg-final { scan-assembler-not {vfwnmacc.vf} } } */ +/* { dg-final { scan-assembler-not {vfwnmsac.vf} } } */ +/* { dg-final { scan-assembler-times {fcvt.d.s} 4 } } */ +/* { dg-final { scan-assembler-times {vfmv.v.f} 12 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c index 8295ffb..58afaa4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c @@ -11,6 +11,10 @@ DEF_VF_MULOP_ACC_CASE_1 (_Float16, +, +, acc, VF_MULOP_ACC_BODY_X128) DEF_VF_MULOP_ACC_CASE_1 (_Float16, -, +, sac, VF_MULOP_ACC_BODY_X128) DEF_VF_MULOP_ACC_CASE_1 (_Float16, +, -, nacc, VF_MULOP_ACC_BODY_X128) DEF_VF_MULOP_ACC_CASE_1 (_Float16, -, -, nsac, VF_MULOP_ACC_BODY_X128) +DEF_VF_MULOP_WIDEN_CASE_1 (_Float16, float, +, +, acc) +DEF_VF_MULOP_WIDEN_CASE_1 (_Float16, float, -, +, sac) +DEF_VF_MULOP_WIDEN_CASE_1 (_Float16, float, +, -, nacc) +DEF_VF_MULOP_WIDEN_CASE_1 (_Float16, float, -, -, nsac) /* { dg-final { scan-assembler {vfmadd.vf} } } */ /* { dg-final { scan-assembler {vfmsub.vf} } } */ @@ -20,3 +24,7 @@ DEF_VF_MULOP_ACC_CASE_1 (_Float16, -, -, nsac, VF_MULOP_ACC_BODY_X128) /* { dg-final { scan-assembler {vfmsac.vf} } } */ /* { dg-final { scan-assembler {vfnmacc.vf} } } */ /* { dg-final { scan-assembler {vfnmsac.vf} } } */ +/* { dg-final { scan-assembler {vfwmacc.vf} } } */ +/* { dg-final { scan-assembler {vfwmsac.vf} } } */ +/* { dg-final { scan-assembler {vfwnmacc.vf} } } */ +/* { dg-final { scan-assembler {vfwnmsac.vf} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c index f237f84..0e95774 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c @@ -11,6 +11,10 @@ DEF_VF_MULOP_ACC_CASE_1 (float, +, +, acc, VF_MULOP_ACC_BODY_X128) DEF_VF_MULOP_ACC_CASE_1 (float, -, +, sac, VF_MULOP_ACC_BODY_X128) DEF_VF_MULOP_ACC_CASE_1 (float, +, -, nacc, VF_MULOP_ACC_BODY_X128) DEF_VF_MULOP_ACC_CASE_1 (float, -, -, nsac, VF_MULOP_ACC_BODY_X128) +DEF_VF_MULOP_WIDEN_CASE_1 (float, double, +, +, acc) +DEF_VF_MULOP_WIDEN_CASE_1 (float, double, -, +, sac) +DEF_VF_MULOP_WIDEN_CASE_1 (float, double, +, -, nacc) +DEF_VF_MULOP_WIDEN_CASE_1 (float, double, -, -, nsac) /* { dg-final { scan-assembler {vfmadd.vf} } } */ /* { dg-final { scan-assembler {vfmsub.vf} } } */ @@ -20,3 +24,7 @@ DEF_VF_MULOP_ACC_CASE_1 (float, -, -, nsac, VF_MULOP_ACC_BODY_X128) /* { dg-final { scan-assembler {vfmsac.vf} } } */ /* { dg-final { scan-assembler {vfnmacc.vf} } } */ /* { dg-final { scan-assembler {vfnmsac.vf} } } */ +/* { dg-final { scan-assembler {vfwmacc.vf} } } */ +/* { dg-final { scan-assembler {vfwmsac.vf} } } */ +/* { dg-final { scan-assembler {vfwnmacc.vf} } } */ +/* { dg-final { scan-assembler {vfwnmsac.vf} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c index 7a50f67..559df6c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c @@ -11,3 +11,8 @@ /* { dg-final { scan-assembler-not {vfmsac.vf} } } */ /* { dg-final { scan-assembler-not {vfnmacc.vf} } } */ /* { dg-final { scan-assembler-not {vfnmsac.vf} } } */ +/* { dg-final { scan-assembler-not {vfwmacc.vf} } } */ +/* { dg-final { scan-assembler-not {vfwmsac.vf} } } */ +/* { dg-final { scan-assembler-not {vfwnmacc.vf} } } */ +/* { dg-final { scan-assembler-not {vfwnmsac.vf} } } */ +/* { dg-final { scan-assembler {fcvt.s.h} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c index fb0493e..03f9c5a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c @@ -11,3 +11,8 @@ /* { dg-final { scan-assembler-not {vfmsac.vf} } } */ /* { dg-final { scan-assembler-not {vfnmacc.vf} } } */ /* { dg-final { scan-assembler-not {vfnmsac.vf} } } */ +/* { dg-final { scan-assembler-not {vfwmacc.vf} } } */ +/* { dg-final { scan-assembler-not {vfwmsac.vf} } } */ +/* { dg-final { scan-assembler-not {vfwnmacc.vf} } } */ +/* { dg-final { scan-assembler-not {vfwnmsac.vf} } } */ +/* { dg-final { scan-assembler {fcvt.d.s} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h index 1659f78..b1a324f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop.h @@ -34,6 +34,21 @@ #define RUN_VF_MULOP_ACC_CASE_0_WRAP(T, NAME, out, in, x, n) \ RUN_VF_MULOP_ACC_CASE_0 (T, NAME, out, in, x, n) +#define DEF_VF_MULOP_WIDEN_CASE_0(T1, T2, OP, NEG, NAME) \ + void test_vf_mulop_widen_##NAME##_##T1##_case_0 (T2 *restrict out, \ + T1 *restrict in, \ + T1 *restrict f, unsigned n) \ + { \ + for (unsigned i = 0; i < n; i++) \ + out[i] = NEG ((T2) * f * (T2) in[i] OP out[i]); \ + } +#define DEF_VF_MULOP_WIDEN_CASE_0_WRAP(T1, T2, OP, NEG, NAME) \ + DEF_VF_MULOP_WIDEN_CASE_0 (T1, T2, OP, NEG, NAME) +#define RUN_VF_MULOP_WIDEN_CASE_0(T1, T2, NAME, out, in, x, n) \ + test_vf_mulop_widen_##NAME##_##T1##_case_0 (out, in, x, n) +#define RUN_VF_MULOP_WIDEN_CASE_0_WRAP(T1, T2, NAME, out, in, x, n) \ + RUN_VF_MULOP_WIDEN_CASE_0 (T1, T2, NAME, out, in, x, n) + #define VF_MULOP_BODY(op, neg) \ out[k + 0] = neg (tmp * out[k + 0] op in[k + 0]); \ out[k + 1] = neg (tmp * out[k + 1] op in[k + 1]); \ @@ -129,4 +144,19 @@ #define DEF_VF_MULOP_ACC_CASE_1_WRAP(T, OP, NEG, NAME, BODY) \ DEF_VF_MULOP_ACC_CASE_1 (T, OP, NEG, NAME, BODY) +#define DEF_VF_MULOP_WIDEN_CASE_1(TYPE1, TYPE2, OP, NEG, NAME) \ + void test_vf_mulop_widen_##NAME##_##TYPE1##_##TYPE2##_case_1 ( \ + TYPE2 *__restrict dst, TYPE2 *__restrict dst2, TYPE2 *__restrict dst3, \ + TYPE2 *__restrict dst4, TYPE1 *__restrict a, TYPE1 *__restrict b, \ + TYPE1 *__restrict a2, TYPE1 *__restrict b2, int n) \ + { \ + for (int i = 0; i < n; i++) \ + { \ + dst[i] = NEG ((TYPE2) * a * (TYPE2) b[i] OP dst[i]); \ + dst2[i] = NEG ((TYPE2) * a2 * (TYPE2) b[i] OP dst2[i]); \ + dst3[i] = NEG ((TYPE2) * a2 * (TYPE2) a[i] OP dst3[i]); \ + dst4[i] = NEG ((TYPE2) * a * (TYPE2) b2[i] OP dst4[i]); \ + } \ + } + #endif diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_widen_run.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_widen_run.h new file mode 100644 index 0000000..9f95fbb --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_mulop_widen_run.h @@ -0,0 +1,32 @@ +#ifndef HAVE_DEFINED_VF_MULOP_WIDEN_RUN_H +#define HAVE_DEFINED_VF_MULOP_WIDEN_RUN_H + +#include <assert.h> + +#define N 512 + +int main () +{ + T1 f[N]; + T1 in[N]; + T2 out[N]; + T2 out2[N]; + + for (int i = 0; i < N; i++) + { + f[i] = LIMIT + i % 8723; + in[i] = LIMIT + i & 1964; + out[i] = LIMIT + i & 628; + out2[i] = LIMIT + i & 628; + asm volatile ("" ::: "memory"); + } + + TEST_RUN (T1, T2, NAME, out, in, f, N); + + for (int i = 0; i < N; i++) + assert (out[i] == NEG(((T2) *f * (T2) in[i]) OP out2[i])); + + return 0; +} + +#endif diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmacc-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmacc-run-1-f16.c index 982dd97..fd8aa30 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmacc-run-1-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmacc-run-1-f16.c @@ -1,5 +1,9 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-march=rv64gcv_zvfh --param=fpr2vr-cost=0" } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ #include "vf_mulop.h" #include "vf_mulop_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c index 400bbcd..8fd8552 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c @@ -1,5 +1,9 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-march=rv64gcv_zvfh --param=fpr2vr-cost=0" } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ #include "vf_mulop.h" #include "vf_mulop_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsac-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsac-run-1-f16.c index 21c1860..e91fd15 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsac-run-1-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsac-run-1-f16.c @@ -1,5 +1,9 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-march=rv64gcv_zvfh --param=fpr2vr-cost=0" } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ #include "vf_mulop.h" #include "vf_mulop_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c index 163b5bd..ca7e0db 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c @@ -1,5 +1,9 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-march=rv64gcv_zvfh --param=fpr2vr-cost=0" } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ #include "vf_mulop.h" #include "vf_mulop_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmacc-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmacc-run-1-f16.c index 71f350f..b38e800 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmacc-run-1-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmacc-run-1-f16.c @@ -1,5 +1,9 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-march=rv64gcv_zvfh --param=fpr2vr-cost=0" } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ #include "vf_mulop.h" #include "vf_mulop_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f16.c index e252e0d..fef5d77 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f16.c @@ -1,5 +1,9 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-march=rv64gcv_zvfh --param=fpr2vr-cost=0" } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ #include "vf_mulop.h" #include "vf_mulop_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsac-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsac-run-1-f16.c index 439fd3e..7951d40 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsac-run-1-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsac-run-1-f16.c @@ -1,5 +1,9 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-march=rv64gcv_zvfh --param=fpr2vr-cost=0" } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ #include "vf_mulop.h" #include "vf_mulop_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f16.c index b9d66ba..d0def86 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f16.c @@ -1,5 +1,9 @@ /* { dg-do run { target { riscv_v } } } */ -/* { dg-additional-options "-march=rv64gcv_zvfh --param=fpr2vr-cost=0" } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ #include "vf_mulop.h" #include "vf_mulop_data.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f16.c new file mode 100644 index 0000000..d4c527a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f16.c @@ -0,0 +1,21 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ + +#include "vf_mulop.h" + +#define T1 _Float16 +#define T2 float +#define NAME acc +#define OP + +#define NEG + + +DEF_VF_MULOP_WIDEN_CASE_0_WRAP (T1, T2, OP, NEG, NAME) + +#define TEST_RUN(T1, T2, NAME, out, in, f, n) RUN_VF_MULOP_WIDEN_CASE_0_WRAP(T1, T2, NAME, out, in, f, n) +#define LIMIT -32768 + +#include "vf_mulop_widen_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f32.c new file mode 100644 index 0000000..1af5240 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmacc-run-1-f32.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ + +#include "vf_mulop.h" + +#define T1 float +#define T2 double +#define NAME acc +#define OP + +#define NEG + + +DEF_VF_MULOP_WIDEN_CASE_0_WRAP (T1, T2, OP, NEG, NAME) + +#define TEST_RUN(T1, T2, NAME, out, in, f, n) RUN_VF_MULOP_WIDEN_CASE_0_WRAP(T1, T2, NAME, out, in, f, n) +#define LIMIT -2147483648 + +#include "vf_mulop_widen_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f16.c new file mode 100644 index 0000000..abce2f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f16.c @@ -0,0 +1,21 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ + +#include "vf_mulop.h" + +#define T1 _Float16 +#define T2 float +#define NAME sac +#define OP - +#define NEG + + +DEF_VF_MULOP_WIDEN_CASE_0_WRAP (T1, T2, OP, NEG, NAME) + +#define TEST_RUN(T1, T2, NAME, out, in, f, n) RUN_VF_MULOP_WIDEN_CASE_0_WRAP(T1, T2, NAME, out, in, f, n) +#define LIMIT -32768 + +#include "vf_mulop_widen_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f32.c new file mode 100644 index 0000000..13617a0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmsac-run-1-f32.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ + +#include "vf_mulop.h" + +#define T1 float +#define T2 double +#define NAME sac +#define OP - +#define NEG + + +DEF_VF_MULOP_WIDEN_CASE_0_WRAP (T1, T2, OP, NEG, NAME) + +#define TEST_RUN(T1, T2, NAME, out, in, f, n) RUN_VF_MULOP_WIDEN_CASE_0_WRAP(T1, T2, NAME, out, in, f, n) +#define LIMIT -2147483648 + +#include "vf_mulop_widen_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f16.c new file mode 100644 index 0000000..ddf49d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f16.c @@ -0,0 +1,21 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ + +#include "vf_mulop.h" + +#define T1 _Float16 +#define T2 float +#define NAME nacc +#define OP + +#define NEG - + +DEF_VF_MULOP_WIDEN_CASE_0_WRAP (T1, T2, OP, NEG, NAME) + +#define TEST_RUN(T1, T2, NAME, out, in, f, n) RUN_VF_MULOP_WIDEN_CASE_0_WRAP(T1, T2, NAME, out, in, f, n) +#define LIMIT -32768 + +#include "vf_mulop_widen_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f32.c new file mode 100644 index 0000000..851c335 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f32.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ + +#include "vf_mulop.h" + +#define T1 float +#define T2 double +#define NAME nacc +#define OP + +#define NEG - + +DEF_VF_MULOP_WIDEN_CASE_0_WRAP (T1, T2, OP, NEG, NAME) + +#define TEST_RUN(T1, T2, NAME, out, in, f, n) RUN_VF_MULOP_WIDEN_CASE_0_WRAP(T1, T2, NAME, out, in, f, n) +#define LIMIT -2147483648 + +#include "vf_mulop_widen_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f16.c new file mode 100644 index 0000000..a874991 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f16.c @@ -0,0 +1,21 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-require-effective-target riscv_zvfh } */ +/* { dg-add-options "riscv_v" } */ +/* { dg-add-options "riscv_zvfh" } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ + +#include "vf_mulop.h" + +#define T1 _Float16 +#define T2 float +#define NAME nsac +#define OP - +#define NEG - + +DEF_VF_MULOP_WIDEN_CASE_0_WRAP (T1, T2, OP, NEG, NAME) + +#define TEST_RUN(T1, T2, NAME, out, in, f, n) RUN_VF_MULOP_WIDEN_CASE_0_WRAP(T1, T2, NAME, out, in, f, n) +#define LIMIT -32768 + +#include "vf_mulop_widen_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f32.c new file mode 100644 index 0000000..9eacace --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f32.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "--param=fpr2vr-cost=0" } */ + +#include "vf_mulop.h" + +#define T1 float +#define T2 double +#define NAME nsac +#define OP - +#define NEG - + +DEF_VF_MULOP_WIDEN_CASE_0_WRAP (T1, T2, OP, NEG, NAME) + +#define TEST_RUN(T1, T2, NAME, out, in, f, n) RUN_VF_MULOP_WIDEN_CASE_0_WRAP(T1, T2, NAME, out, in, f, n) +#define LIMIT -2147483648 + +#include "vf_mulop_widen_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c index 83515ee..4e1a575 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */ /* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */ /* { dg-final { scan-assembler-times {vssub.vx} 1 } } */ +/* { dg-final { scan-assembler-times {vaadd.vx} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c index 1488fe1..4c4f72d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */ /* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */ /* { dg-final { scan-assembler-times {vssub.vx} 1 } } */ +/* { dg-final { scan-assembler-times {vaadd.vx} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c index 342ea18..abf62c2 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c @@ -20,3 +20,7 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */ /* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */ /* { dg-final { scan-assembler-times {vssub.vx} 1 } } */ +/* { dg-final { scan-assembler-times {vaadd.vx} 2 { target { no-opts + "-O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c index 583f917..7744bcb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-times {vmin.vx} 2 } } */ /* { dg-final { scan-assembler-times {vsadd.vx} 1 } } */ /* { dg-final { scan-assembler-times {vssub.vx} 1 } } */ +/* { dg-final { scan-assembler-times {vaadd.vx} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c index b064748..cb62e0f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-times {vminu.vx} 2 } } */ /* { dg-final { scan-assembler-times {vsaddu.vx} 1 } } */ /* { dg-final { scan-assembler-times {vssubu.vx} 1 } } */ +/* { dg-final { scan-assembler-times {vaaddu.vx} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c index e334bb3..e2a5dbb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-times {vminu.vx} 2 } } */ /* { dg-final { scan-assembler-times {vsaddu.vx} 1 } } */ /* { dg-final { scan-assembler-times {vssubu.vx} 1 } } */ +/* { dg-final { scan-assembler-times {vaaddu.vx} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c index 3e8ca05..8e7a788 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c @@ -19,3 +19,7 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-times {vminu.vx} 2 } } */ /* { dg-final { scan-assembler-times {vsaddu.vx} 1 } } */ /* { dg-final { scan-assembler-times {vssubu.vx} 1 } } */ +/* { dg-final { scan-assembler-times {vaaddu.vx} 2 { target { no-opts { + "-O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c index 1f995cd..d213c18 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-times {vminu.vx} 2 } } */ /* { dg-final { scan-assembler-times {vsaddu.vx} 1 } } */ /* { dg-final { scan-assembler-times {vssubu.vx} 1 } } */ +/* { dg-final { scan-assembler-times {vaaddu.vx} 2 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c index 78d3e0b..05801a9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler-not {vaadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c index e7bcfe5..f05f091 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler-not {vaadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c index f9f1e39..adf9ccb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler-not {vaadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c index 80d6aaa..8b3f5bc 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler-not {vaadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c index f7fae37..365e650 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-not {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler-not {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c index b111a4e..c8fd42a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-not {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler-not {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c index 4640d16..bdb76b4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-not {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler-not {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c index 58341ad..fc9c101 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-not {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler-not {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c index 6bf2a35..741f431 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler-not {vaadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c index 5432706..1741c22 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler-not {vaadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c index a2099fd..d326357 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler-not {vaadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c index 1daede9..3137dc0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c @@ -20,3 +20,4 @@ TEST_BINARY_VX_SIGNED_0(T) /* { dg-final { scan-assembler-not {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler-not {vaadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c index 406b999..121daeb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-not {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler-not {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c index 6792b6b..9616e7f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-not {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler-not {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c index 692a709..cf985f0 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-not {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler-not {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c index 4e30498..3bb382d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c @@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T) /* { dg-final { scan-assembler-not {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler-not {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c index d79a9f2..2ae4804 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,9 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler {vsadd.vx} } } */ /* { dg-final { scan-assembler {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { any-opts { + "-mrvv-vector-bits=scalable -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c index 940f596..88cfc72 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler {vsadd.vx} } } */ /* { dg-final { scan-assembler {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { any-opts { + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c index 22a64f6..6b29a72 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { no-opts { + "-O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c index 3286b1a..f862eb7 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler {vsadd.vx} } } */ /* { dg-final { scan-assembler {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { any-opts { + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c index afb5a85..3ecfce6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -32,3 +34,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vminu.vx} } } */ /* { dg-final { scan-assembler {vsaddu.vx} } } */ /* { dg-final { scan-assembler {vssubu.vx} } } */ +/* { dg-final { scan-assembler {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c index a907e9b..7ce1fe8 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -30,4 +32,6 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vremu.vx} } } */ /* { dg-final { scan-assembler {vmaxu.vx} } } */ /* { dg-final { scan-assembler {vminu.vx} } } */ +/* { dg-final { scan-assembler {vsaddu.vx} } } */ /* { dg-final { scan-assembler {vssubu.vx} } } */ +/* { dg-final { scan-assembler {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c index efabf99..c84a30c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -32,3 +34,7 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler {vaaddu.vx} { target { no-opts { + "-O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-O3 -mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c index 7b2b088..9f3d7df 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -32,3 +34,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vminu.vx} } } */ /* { dg-final { scan-assembler {vsaddu.vx} } } */ /* { dg-final { scan-assembler {vssubu.vx} } } */ +/* { dg-final { scan-assembler {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c index b92db10..df6872c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler {vsadd.vx} } } */ /* { dg-final { scan-assembler {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { any-opts { + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c index 0870cde..05ed639 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { no-opts { + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c index a4d60e9..6776b1f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler-not {vaadd.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c index ec069a3..d3e2785 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler {vsadd.vx} } } */ /* { dg-final { scan-assembler {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { no-opts { + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c index da1b1be..5497b5a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -32,3 +34,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vminu.vx} } } */ /* { dg-final { scan-assembler {vsaddu.vx} } } */ /* { dg-final { scan-assembler {vssubu.vx} } } */ +/* { dg-final { scan-assembler {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c index b7ec6c9..3a8e85f 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -32,3 +34,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler {vssubu.vx} } } */ +/* { dg-final { scan-assembler {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c index dce78b1..060d591 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -32,3 +34,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler-not {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c index c5c6fb8..86a6c45 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -32,3 +34,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vminu.vx} } } */ /* { dg-final { scan-assembler {vsaddu.vx} } } */ /* { dg-final { scan-assembler {vssubu.vx} } } */ +/* { dg-final { scan-assembler {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c index 473c31b..0bfa2cb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler {vsadd.vx} } } */ /* { dg-final { scan-assembler {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { any-opts { + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c index 6ae84c1..3e3acfc 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { any-opts { + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c index 794f506..531c119 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler-not {vsub.vx} } } */ @@ -34,3 +36,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler-not {vmin.vx} } } */ /* { dg-final { scan-assembler-not {vsadd.vx} } } */ /* { dg-final { scan-assembler-not {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { any-opts { + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c index 77bcdeb..43246bb 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c @@ -20,6 +20,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -34,3 +36,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_S_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vmin.vx} } } */ /* { dg-final { scan-assembler {vsadd.vx} } } */ /* { dg-final { scan-assembler {vssub.vx} } } */ +/* { dg-final { scan-assembler {vaadd.vx} { target { any-opts { + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m1" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m2" + "-mrvv-vector-bits=zvl -mrvv-max-lmul=m4" + } } } } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c index 5952a7c..f51e7a1 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -32,3 +34,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vminu.vx} } } */ /* { dg-final { scan-assembler {vsaddu.vx} } } */ /* { dg-final { scan-assembler {vssubu.vx} } } */ +/* { dg-final { scan-assembler {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c index 5bbc585..79b7477 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X4) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X4) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X4) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -32,3 +34,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler {vssubu.vx} } } */ +/* { dg-final { scan-assembler {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c index 255ae62..ac5fd69 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY) /* { dg-final { scan-assembler-not {vadd.vx} } } */ /* { dg-final { scan-assembler-not {vsub.vx} } } */ @@ -32,3 +34,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler-not {vminu.vx} } } */ /* { dg-final { scan-assembler-not {vsaddu.vx} } } */ /* { dg-final { scan-assembler-not {vssubu.vx} } } */ +/* { dg-final { scan-assembler-not {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c index 63cd449..84aa06b 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c @@ -19,6 +19,8 @@ DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_0_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, MIN_FUNC_1_WARP(T), min, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_ADD_FUNC_WRAP(T), sat_add, VX_BINARY_FUNC_BODY_X8) DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor, VX_BINARY_FUNC_BODY_X8) +DEF_VX_BINARY_CASE_3_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil, VX_BINARY_FUNC_BODY_X8) /* { dg-final { scan-assembler {vadd.vx} } } */ /* { dg-final { scan-assembler {vsub.vx} } } */ @@ -32,3 +34,4 @@ DEF_VX_BINARY_CASE_3_WRAP(T, SAT_U_SUB_FUNC_WRAP(T), sat_sub, VX_BINARY_FUNC_BOD /* { dg-final { scan-assembler {vminu.vx} } } */ /* { dg-final { scan-assembler {vsaddu.vx} } } */ /* { dg-final { scan-assembler {vssubu.vx} } } */ +/* { dg-final { scan-assembler {vaaddu.vx} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i16.c new file mode 100644 index 0000000..2b87321 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i16.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl --param=gpr2vr-cost=0 " } */ + +#define VL 8 + +#include "vx-fixed-vxrm.h" + +#define VT vint16m1_t +#define T int16_t +#define ELEM_SIZE 16 +#define SUFFIX i16 +#define FUNC __riscv_vaadd_vv_i16m1 + +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNU, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNE, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RDN, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_ROD, FUNC) + +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,0} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,1} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,2} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,3} 1 } } */ +/* { dg-final { scan-assembler-times {vaadd.vx} 4 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i32.c new file mode 100644 index 0000000..b95699b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i32.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl --param=gpr2vr-cost=0 " } */ + +#define VL 4 + +#include "vx-fixed-vxrm.h" + +#define VT vint32m1_t +#define T int32_t +#define ELEM_SIZE 32 +#define SUFFIX i32 +#define FUNC __riscv_vaadd_vv_i32m1 + +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNU, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNE, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RDN, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_ROD, FUNC) + +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,0} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,1} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,2} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,3} 1 } } */ +/* { dg-final { scan-assembler-times {vaadd.vx} 4 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i64.c new file mode 100644 index 0000000..48b6010 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i64.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl --param=gpr2vr-cost=0 " } */ + +#define VL 2 + +#include "vx-fixed-vxrm.h" + +#define VT vint64m1_t +#define T int64_t +#define ELEM_SIZE 64 +#define SUFFIX i64 +#define FUNC __riscv_vaadd_vv_i64m1 + +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNU, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNE, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RDN, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_ROD, FUNC) + +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,0} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,1} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,2} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,3} 1 } } */ +/* { dg-final { scan-assembler-times {vaadd.vx} 4 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i8.c new file mode 100644 index 0000000..d07a625 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-i8.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl --param=gpr2vr-cost=0 " } */ + +#define VL 16 + +#include "vx-fixed-vxrm.h" + +#define VT vint8m1_t +#define T int8_t +#define ELEM_SIZE 8 +#define SUFFIX i8 +#define FUNC __riscv_vaadd_vv_i8m1 + +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNU, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNE, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RDN, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_ROD, FUNC) + +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,0} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,1} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,2} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,3} 1 } } */ +/* { dg-final { scan-assembler-times {vaadd.vx} 4 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u16.c new file mode 100644 index 0000000..bd36429 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u16.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl --param=gpr2vr-cost=0 " } */ + +#define VL 8 + +#include "vx-fixed-vxrm.h" + +#define VT vuint16m1_t +#define T uint16_t +#define ELEM_SIZE 16 +#define SUFFIX u16 +#define FUNC __riscv_vaaddu_vv_u16m1 + +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNU, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNE, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RDN, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_ROD, FUNC) + +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,0} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,1} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,2} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,3} 1 } } */ +/* { dg-final { scan-assembler-times {vaaddu.vx} 4 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u32.c new file mode 100644 index 0000000..f023a76 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u32.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl --param=gpr2vr-cost=0 " } */ + +#define VL 4 + +#include "vx-fixed-vxrm.h" + +#define VT vuint32m1_t +#define T uint32_t +#define ELEM_SIZE 32 +#define SUFFIX u32 +#define FUNC __riscv_vaaddu_vv_u32m1 + +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNU, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNE, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RDN, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_ROD, FUNC) + +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,0} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,1} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,2} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,3} 1 } } */ +/* { dg-final { scan-assembler-times {vaaddu.vx} 4 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u64.c new file mode 100644 index 0000000..d9a37ae --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u64.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl --param=gpr2vr-cost=0 " } */ + +#define VL 2 + +#include "vx-fixed-vxrm.h" + +#define VT vuint64m1_t +#define T uint64_t +#define ELEM_SIZE 64 +#define SUFFIX u64 +#define FUNC __riscv_vaaddu_vv_u64m1 + +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNU, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNE, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RDN, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_ROD, FUNC) + +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,0} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,1} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,2} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,3} 1 } } */ +/* { dg-final { scan-assembler-times {vaaddu.vx} 4 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u8.c new file mode 100644 index 0000000..328e5d4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm-1-u8.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -mrvv-vector-bits=zvl --param=gpr2vr-cost=0 " } */ + +#define VL 16 + +#include "vx-fixed-vxrm.h" + +#define VT vuint8m1_t +#define T uint8_t +#define ELEM_SIZE 8 +#define SUFFIX u8 +#define FUNC __riscv_vaaddu_vv_u8m1 + +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNU, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RNE, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_RDN, FUNC) +DEF_FIXED_BINARY_VX_WRAP(VT, T, ELEM_SIZE, SUFFIX, __RISCV_VXRM_ROD, FUNC) + +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,0} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,1} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,2} 1 } } */ +/* { dg-final { scan-assembler-times {csrwi\s+vxrm,3} 1 } } */ +/* { dg-final { scan-assembler-times {vaaddu.vx} 4 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm.h new file mode 100644 index 0000000..438c7ab --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-fixed-vxrm.h @@ -0,0 +1,28 @@ +#ifndef HAVE_DEFINED_VX_FIXED_VXRM_H +#define HAVE_DEFINED_VX_FIXED_VXRM_H + +#include <riscv_vector.h> + +int64_t go[VL] = {}; +int64_t ga[VL] = {}; + +#define DEF_FIXED_BINARY_VX(VT, T, ES, SX, VXRM, FUNC) \ +void __attribute__((noinline)) \ +test_fixed_binary_##VT##_##VXRM##_##FUNC##_vx () { \ + VT a = __riscv_vle##ES##_v_##SX##m1((T *)ga, VL); \ + VT b; \ + T *bp = (T *)&b; \ + \ + for (int i = 0; i < VL; i++) { \ + bp[i] = 123; \ + } \ + \ + VT d = FUNC (a, b, VXRM, VL); \ + \ + __riscv_vse##ES##_v_##SX##m1((T *)&go, d, VL); \ +} + +#define DEF_FIXED_BINARY_VX_WRAP(VT, T, ES, SX, VXRM, FUNC) \ + DEF_FIXED_BINARY_VX(VT, T, ES, SX, VXRM, FUNC) + +#endif diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h index 6d4d720..4a9daff 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h @@ -3,6 +3,14 @@ #include <stdint.h> +#undef HAS_INT128 + +#if __riscv_xlen == 64 +#define HAS_INT128 +typedef unsigned __int128 uint128_t; +typedef signed __int128 int128_t; +#endif + #define DEF_VX_BINARY_CASE_0(T, OP, NAME) \ void \ test_vx_binary_##NAME##_##T##_case_0 (T * restrict out, T * restrict in, \ @@ -340,37 +348,85 @@ DEF_SAT_S_SUB(int64_t, uint64_t, INT64_MIN, INT64_MAX) #define SAT_S_SUB_FUNC(T) test_##T##_sat_sub #define SAT_S_SUB_FUNC_WRAP(T) SAT_S_SUB_FUNC(T) -#define TEST_BINARY_VX_SIGNED_0(T) \ - DEF_VX_BINARY_CASE_0_WRAP(T, +, add) \ - DEF_VX_BINARY_CASE_0_WRAP(T, -, sub) \ - DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub) \ - DEF_VX_BINARY_CASE_0_WRAP(T, &, and) \ - DEF_VX_BINARY_CASE_0_WRAP(T, |, or) \ - DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor) \ - DEF_VX_BINARY_CASE_0_WRAP(T, *, mul) \ - DEF_VX_BINARY_CASE_0_WRAP(T, /, div) \ - DEF_VX_BINARY_CASE_0_WRAP(T, %, rem) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_0_WARP(T), min) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_1_WARP(T), min) \ - DEF_VX_BINARY_CASE_2_WRAP(T, SAT_S_ADD_FUNC(T), sat_add) \ - DEF_VX_BINARY_CASE_2_WRAP(T, SAT_S_SUB_FUNC(T), sat_sub) \ - -#define TEST_BINARY_VX_UNSIGNED_0(T) \ - DEF_VX_BINARY_CASE_0_WRAP(T, +, add) \ - DEF_VX_BINARY_CASE_0_WRAP(T, -, sub) \ - DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub) \ - DEF_VX_BINARY_CASE_0_WRAP(T, &, and) \ - DEF_VX_BINARY_CASE_0_WRAP(T, |, or) \ - DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor) \ - DEF_VX_BINARY_CASE_0_WRAP(T, /, div) \ - DEF_VX_BINARY_CASE_0_WRAP(T, %, rem) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_0_WARP(T), min) \ - DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_1_WARP(T), min) \ - DEF_VX_BINARY_CASE_2_WRAP(T, SAT_U_ADD_FUNC(T), sat_add) \ - DEF_VX_BINARY_CASE_2_WRAP(T, SAT_U_SUB_FUNC(T), sat_sub) \ +#define DEF_AVG_FLOOR(NT, WT) \ +NT \ +test_##NT##_avg_floor(NT x, NT y) \ +{ \ + return (NT)(((WT)x + (WT)y) >> 1); \ +} + +DEF_AVG_FLOOR(uint8_t, uint16_t) +DEF_AVG_FLOOR(uint16_t, uint32_t) +DEF_AVG_FLOOR(uint32_t, uint64_t) + +DEF_AVG_FLOOR(int8_t, int16_t) +DEF_AVG_FLOOR(int16_t, int32_t) +DEF_AVG_FLOOR(int32_t, int64_t) + +#define DEF_AVG_CEIL(NT, WT) \ +NT \ +test_##NT##_avg_ceil(NT x, NT y) \ +{ \ + return (NT)(((WT)x + (WT)y + 1) >> 1); \ +} + +DEF_AVG_CEIL(uint8_t, uint16_t) +DEF_AVG_CEIL(uint16_t, uint32_t) +DEF_AVG_CEIL(uint32_t, uint64_t) + +DEF_AVG_CEIL(int8_t, int16_t) +DEF_AVG_CEIL(int16_t, int32_t) +DEF_AVG_CEIL(int32_t, int64_t) + +#ifdef HAS_INT128 + DEF_AVG_FLOOR(uint64_t, uint128_t) + DEF_AVG_FLOOR(int64_t, int128_t) + + DEF_AVG_CEIL(uint64_t, uint128_t) + DEF_AVG_CEIL(int64_t, int128_t) +#endif + +#define AVG_FLOOR_FUNC(T) test_##T##_avg_floor +#define AVG_FLOOR_FUNC_WRAP(T) AVG_FLOOR_FUNC(T) + +#define AVG_CEIL_FUNC(T) test_##T##_avg_ceil +#define AVG_CEIL_FUNC_WRAP(T) AVG_CEIL_FUNC(T) + +#define TEST_BINARY_VX_SIGNED_0(T) \ + DEF_VX_BINARY_CASE_0_WRAP(T, +, add) \ + DEF_VX_BINARY_CASE_0_WRAP(T, -, sub) \ + DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub) \ + DEF_VX_BINARY_CASE_0_WRAP(T, &, and) \ + DEF_VX_BINARY_CASE_0_WRAP(T, |, or) \ + DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor) \ + DEF_VX_BINARY_CASE_0_WRAP(T, *, mul) \ + DEF_VX_BINARY_CASE_0_WRAP(T, /, div) \ + DEF_VX_BINARY_CASE_0_WRAP(T, %, rem) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_0_WARP(T), min) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_1_WARP(T), min) \ + DEF_VX_BINARY_CASE_2_WRAP(T, SAT_S_ADD_FUNC(T), sat_add) \ + DEF_VX_BINARY_CASE_2_WRAP(T, SAT_S_SUB_FUNC(T), sat_sub) \ + DEF_VX_BINARY_CASE_2_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor) \ + DEF_VX_BINARY_CASE_2_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil) \ + +#define TEST_BINARY_VX_UNSIGNED_0(T) \ + DEF_VX_BINARY_CASE_0_WRAP(T, +, add) \ + DEF_VX_BINARY_CASE_0_WRAP(T, -, sub) \ + DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub) \ + DEF_VX_BINARY_CASE_0_WRAP(T, &, and) \ + DEF_VX_BINARY_CASE_0_WRAP(T, |, or) \ + DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor) \ + DEF_VX_BINARY_CASE_0_WRAP(T, /, div) \ + DEF_VX_BINARY_CASE_0_WRAP(T, %, rem) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_0_WARP(T), min) \ + DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_1_WARP(T), min) \ + DEF_VX_BINARY_CASE_2_WRAP(T, SAT_U_ADD_FUNC(T), sat_add) \ + DEF_VX_BINARY_CASE_2_WRAP(T, SAT_U_SUB_FUNC(T), sat_sub) \ + DEF_VX_BINARY_CASE_2_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor) \ + DEF_VX_BINARY_CASE_2_WRAP(T, AVG_CEIL_FUNC_WRAP(T), avg_ceil) \ #endif diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h index 47f6128..626347c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h @@ -4906,4 +4906,788 @@ int64_t TEST_BINARY_DATA(int64_t, sat_sub)[][3][N] = }, }; +uint8_t TEST_BINARY_DATA(uint8_t, avg_floor)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 0, 0, 0, 0, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 127 }, + { + 127, 127, 127, 127, + 128, 128, 128, 128, + 255, 255, 255, 255, + 1, 1, 1, 1, + }, + { + 127, 127, 127, 127, + 127, 127, 127, 127, + 191, 191, 191, 191, + 64, 64, 64, 64, + }, + }, + { + { 255 }, + { + 0, 0, 0, 0, + 255, 255, 255, 255, + 254, 254, 254, 254, + 1, 1, 1, 1, + }, + { + 127, 127, 127, 127, + 255, 255, 255, 255, + 254, 254, 254, 254, + 128, 128, 128, 128, + }, + }, +}; + +uint16_t TEST_BINARY_DATA(uint16_t, avg_floor)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 0, 0, 0, 0, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 32767 }, + { + 32767, 32767, 32767, 32767, + 32768, 32768, 32768, 32768, + 65535, 65535, 65535, 65535, + 1, 1, 1, 1, + }, + { + 32767, 32767, 32767, 32767, + 32767, 32767, 32767, 32767, + 49151, 49151, 49151, 49151, + 16384, 16384, 16384, 16384, + }, + }, + { + { 65535 }, + { + 0, 0, 0, 0, + 65535, 65535, 65535, 65535, + 65534, 65534, 65534, 65534, + 1, 1, 1, 1, + }, + { + 32767, 32767, 32767, 32767, + 65535, 65535, 65535, 65535, + 65534, 65534, 65534, 65534, + 32768, 32768, 32768, 32768, + }, + }, +}; + +uint32_t TEST_BINARY_DATA(uint32_t, avg_floor)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 0, 0, 0, 0, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 2147483647 }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + 2147483648, 2147483648, 2147483648, 2147483648, + 4294967295, 4294967295, 4294967295, 4294967295, + 1, 1, 1, 1, + }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + 2147483647, 2147483647, 2147483647, 2147483647, + 3221225471, 3221225471, 3221225471, 3221225471, + 1073741824, 1073741824, 1073741824, 1073741824, + }, + }, + { + { 4294967295 }, + { + 0, 0, 0, 0, + 4294967295, 4294967295, 4294967295, 4294967295, + 4294967294, 4294967294, 4294967294, 4294967294, + 1, 1, 1, 1, + }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + 4294967295, 4294967295, 4294967295, 4294967295, + 4294967294, 4294967294, 4294967294, 4294967294, + 2147483648, 2147483648, 2147483648, 2147483648, + }, + }, +}; + +uint64_t TEST_BINARY_DATA(uint64_t, avg_floor)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 0, 0, 0, 0, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 9223372036854775807ull }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, + 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, + 1, 1, 1, 1, + }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + 13835058055282163711ull, 13835058055282163711ull, 13835058055282163711ull, 13835058055282163711ull, + 4611686018427387904ull, 4611686018427387904ull, 4611686018427387904ull, 4611686018427387904ull, + }, + }, + { + { 18446744073709551615ull }, + { + 0, 0, 0, 0, + 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, + 18446744073709551614ull, 18446744073709551614ull, 18446744073709551614ull, 18446744073709551614ull, + 1, 1, 1, 1, + }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, + 18446744073709551614ull, 18446744073709551614ull, 18446744073709551614ull, 18446744073709551614ull, + 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, + }, + }, +}; + +int8_t TEST_BINARY_DATA(int8_t, avg_floor)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 0, 0, 0, 0, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 127 }, + { + 127, 127, 127, 127, + -128, -128, -128, -128, + -127, -127, -127, -127, + 1, 1, 1, 1, + }, + { + 127, 127, 127, 127, + -1, -1, -1, -1, + 0, 0, 0, 0, + 64, 64, 64, 64, + }, + }, + { + {-128 }, + { + 0, 0, 0, 0, + -128, -128, -128, -128, + 126, 126, 126, 126, + 127, 127, 127, 127, + }, + { + -64, -64, -64, -64, + -128, -128, -128, -128, + -1, -1, -1, -1, + -1, -1, -1, -1, + }, + }, +}; + +int16_t TEST_BINARY_DATA(int16_t, avg_floor)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 0, 0, 0, 0, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 32767 }, + { + 32767, 32767, 32767, 32767, + -32768, -32768, -32768, -32768, + -32767, -32767, -32767, -32767, + 1, 1, 1, 1, + }, + { + 32767, 32767, 32767, 32767, + -1, -1, -1, -1, + 0, 0, 0, 0, + 16384, 16384, 16384, 16384, + }, + }, + { + {-32768 }, + { + 0, 0, 0, 0, + -32768, -32768, -32768, -32768, + 32766, 32766, 32766, 32766, + 32767, 32767, 32767, 32767, + }, + { + -16384, -16384, -16384, -16384, + -32768, -32768, -32768, -32768, + -1, -1, -1, -1, + -1, -1, -1, -1, + }, + }, +}; + +int32_t TEST_BINARY_DATA(int32_t, avg_floor)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 0, 0, 0, 0, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 2147483647 }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483647, -2147483647, -2147483647, -2147483647, + 1, 1, 1, 1, + }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + -1, -1, -1, -1, + 0, 0, 0, 0, + 1073741824, 1073741824, 1073741824, 1073741824, + }, + }, + { + {-2147483648 }, + { + 0, 0, 0, 0, + -2147483648, -2147483648, -2147483648, -2147483648, + 2147483646, 2147483646, 2147483646, 2147483646, + 2147483647, 2147483647, 2147483647, 2147483647, + }, + { + -1073741824, -1073741824, -1073741824, -1073741824, + -2147483648, -2147483648, -2147483648, -2147483648, + -1, -1, -1, -1, + -1, -1, -1, -1, + }, + }, +}; + +int64_t TEST_BINARY_DATA(int64_t, avg_floor)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 0, 0, 0, 0, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 9223372036854775807ull }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, + 1, 1, 1, 1, + }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + -1, -1, -1, -1, + 0, 0, 0, 0, + 4611686018427387904ull, 4611686018427387904ull, 4611686018427387904ull, 4611686018427387904ull, + }, + }, + { + {-9223372036854775808ull }, + { + 0, 0, 0, 0, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + }, + { + -4611686018427387904ull, -4611686018427387904ull, -4611686018427387904ull, -4611686018427387904ull, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -1, -1, -1, -1, + -1, -1, -1, -1, + }, + }, +}; + +uint8_t TEST_BINARY_DATA(uint8_t, avg_ceil)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 1, 1, 1, 1, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 127 }, + { + 127, 127, 127, 127, + 128, 128, 128, 128, + 255, 255, 255, 255, + 1, 1, 1, 1, + }, + { + 127, 127, 127, 127, + 128, 128, 128, 128, + 191, 191, 191, 191, + 64, 64, 64, 64, + }, + }, + { + { 255 }, + { + 0, 0, 0, 0, + 255, 255, 255, 255, + 254, 254, 254, 254, + 1, 1, 1, 1, + }, + { + 128, 128, 128, 128, + 255, 255, 255, 255, + 255, 255, 255, 255, + 128, 128, 128, 128, + }, + }, +}; + +uint16_t TEST_BINARY_DATA(uint16_t, avg_ceil)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 1, 1, 1, 1, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 32767 }, + { + 32767, 32767, 32767, 32767, + 32768, 32768, 32768, 32768, + 65535, 65535, 65535, 65535, + 1, 1, 1, 1, + }, + { + 32767, 32767, 32767, 32767, + 32768, 32768, 32768, 32768, + 49151, 49151, 49151, 49151, + 16384, 16384, 16384, 16384, + }, + }, + { + { 65535 }, + { + 0, 0, 0, 0, + 65535, 65535, 65535, 65535, + 65534, 65534, 65534, 65534, + 1, 1, 1, 1, + }, + { + 32768, 32768, 32768, 32768, + 65535, 65535, 65535, 65535, + 65535, 65535, 65535, 65535, + 32768, 32768, 32768, 32768, + }, + }, +}; + +uint32_t TEST_BINARY_DATA(uint32_t, avg_ceil)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 1, 1, 1, 1, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 2147483647 }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + 2147483648, 2147483648, 2147483648, 2147483648, + 4294967295, 4294967295, 4294967295, 4294967295, + 1, 1, 1, 1, + }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + 2147483648, 2147483648, 2147483648, 2147483648, + 3221225471, 3221225471, 3221225471, 3221225471, + 1073741824, 1073741824, 1073741824, 1073741824, + }, + }, + { + { 4294967295 }, + { + 0, 0, 0, 0, + 4294967295, 4294967295, 4294967295, 4294967295, + 4294967294, 4294967294, 4294967294, 4294967294, + 1, 1, 1, 1, + }, + { + 2147483648, 2147483648, 2147483648, 2147483648, + 4294967295, 4294967295, 4294967295, 4294967295, + 4294967295, 4294967295, 4294967295, 4294967295, + 2147483648, 2147483648, 2147483648, 2147483648, + }, + }, +}; + +uint64_t TEST_BINARY_DATA(uint64_t, avg_ceil)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 1, 1, 1, 1, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 9223372036854775807ull }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, + 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, + 1, 1, 1, 1, + }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, + 13835058055282163711ull, 13835058055282163711ull, 13835058055282163711ull, 13835058055282163711ull, + 4611686018427387904ull, 4611686018427387904ull, 4611686018427387904ull, 4611686018427387904ull, + }, + }, + { + { 18446744073709551615ull }, + { + 0, 0, 0, 0, + 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, + 18446744073709551614ull, 18446744073709551614ull, 18446744073709551614ull, 18446744073709551614ull, + 1, 1, 1, 1, + }, + { + 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, + 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, + 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, + 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, 9223372036854775808ull, + }, + }, +}; + +int8_t TEST_BINARY_DATA(int8_t, avg_ceil)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 1, 1, 1, 1, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 127 }, + { + 127, 127, 127, 127, + -128, -128, -128, -128, + -127, -127, -127, -127, + 1, 1, 1, 1, + }, + { + 127, 127, 127, 127, + 0, 0, 0, 0, + 0, 0, 0, 0, + 64, 64, 64, 64, + }, + }, + { + {-128 }, + { + 0, 0, 0, 0, + -128, -128, -128, -128, + 126, 126, 126, 126, + 127, 127, 127, 127, + }, + { + -64, -64, -64, -64, + -128, -128, -128, -128, + -1, -1, -1, -1, + 0, 0, 0, 0, + }, + }, +}; + +int16_t TEST_BINARY_DATA(int16_t, avg_ceil)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 1, 1, 1, 1, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 32767 }, + { + 32767, 32767, 32767, 32767, + -32768, -32768, -32768, -32768, + -32767, -32767, -32767, -32767, + 1, 1, 1, 1, + }, + { + 32767, 32767, 32767, 32767, + 0, 0, 0, 0, + 0, 0, 0, 0, + 16384, 16384, 16384, 16384, + }, + }, + { + {-32768 }, + { + 0, 0, 0, 0, + -32768, -32768, -32768, -32768, + 32766, 32766, 32766, 32766, + 32767, 32767, 32767, 32767, + }, + { + -16384, -16384, -16384, -16384, + -32768, -32768, -32768, -32768, + -1, -1, -1, -1, + 0, 0, 0, 0, + }, + }, +}; + +int32_t TEST_BINARY_DATA(int32_t, avg_ceil)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 1, 1, 1, 1, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 2147483647 }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + -2147483648, -2147483648, -2147483648, -2147483648, + -2147483647, -2147483647, -2147483647, -2147483647, + 1, 1, 1, 1, + }, + { + 2147483647, 2147483647, 2147483647, 2147483647, + 0, 0, 0, 0, + 0, 0, 0, 0, + 1073741824, 1073741824, 1073741824, 1073741824, + }, + }, + { + {-2147483648 }, + { + 0, 0, 0, 0, + -2147483648, -2147483648, -2147483648, -2147483648, + 2147483646, 2147483646, 2147483646, 2147483646, + 2147483647, 2147483647, 2147483647, 2147483647, + }, + { + -1073741824, -1073741824, -1073741824, -1073741824, + -2147483648, -2147483648, -2147483648, -2147483648, + -1, -1, -1, -1, + 0, 0, 0, 0, + }, + }, +}; + +int64_t TEST_BINARY_DATA(int64_t, avg_ceil)[][3][N] = +{ + { + { 0 }, + { + 2, 2, 2, 2, + 1, 1, 1, 1, + 0, 0, 0, 0, + 4, 4, 4, 4, + }, + { + 1, 1, 1, 1, + 1, 1, 1, 1, + 0, 0, 0, 0, + 2, 2, 2, 2, + }, + }, + { + { 9223372036854775807ull }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, -9223372036854775807ull, + 1, 1, 1, 1, + }, + { + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + 0, 0, 0, 0, + 0, 0, 0, 0, + 4611686018427387904ull, 4611686018427387904ull, 4611686018427387904ull, 4611686018427387904ull, + }, + }, + { + {-9223372036854775808ull }, + { + 0, 0, 0, 0, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + 9223372036854775806ull, 9223372036854775806ull, 9223372036854775806ull, 9223372036854775806ull, + 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, 9223372036854775807ull, + }, + { + -4611686018427387904ull, -4611686018427387904ull, -4611686018427387904ull, -4611686018427387904ull, + -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, + -1, -1, -1, -1, + 0, 0, 0, 0, + }, + }, +}; + #endif diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i16.c new file mode 100644 index 0000000..0307b3f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i16.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int16_t +#define NAME avg_floor +#define FUNC AVG_FLOOR_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i32.c new file mode 100644 index 0000000..d73325b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i32.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int32_t +#define NAME avg_floor +#define FUNC AVG_FLOOR_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i64.c new file mode 100644 index 0000000..481774b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i64.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v && rv64 } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int64_t +#define NAME avg_floor +#define FUNC AVG_FLOOR_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i8.c new file mode 100644 index 0000000..7de89ee --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-i8.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int8_t +#define NAME avg_floor +#define FUNC AVG_FLOOR_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c new file mode 100644 index 0000000..73d1a57 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T uint16_t +#define NAME avg_floor +#define FUNC AVG_FLOOR_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c new file mode 100644 index 0000000..60a7aa4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T uint32_t +#define NAME avg_floor +#define FUNC AVG_FLOOR_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u64.c new file mode 100644 index 0000000..803bcba --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u64.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v && rv64 } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T uint64_t +#define NAME avg_floor +#define FUNC AVG_FLOOR_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c new file mode 100644 index 0000000..f28147b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T uint8_t +#define NAME avg_floor +#define FUNC AVG_FLOOR_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i16.c new file mode 100644 index 0000000..8def643 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i16.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int16_t +#define NAME avg_ceil +#define FUNC AVG_CEIL_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i32.c new file mode 100644 index 0000000..d9ca67d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i32.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int32_t +#define NAME avg_ceil +#define FUNC AVG_CEIL_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i64.c new file mode 100644 index 0000000..313109a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i64.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v && rv64 } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int64_t +#define NAME avg_ceil +#define FUNC AVG_CEIL_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i8.c new file mode 100644 index 0000000..47e4a5d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-i8.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T int8_t +#define NAME avg_ceil +#define FUNC AVG_CEIL_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u16.c new file mode 100644 index 0000000..6297672 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u16.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T uint16_t +#define NAME avg_ceil +#define FUNC AVG_CEIL_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u32.c new file mode 100644 index 0000000..30db24b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u32.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T uint32_t +#define NAME avg_ceil +#define FUNC AVG_CEIL_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u64.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u64.c new file mode 100644 index 0000000..db3c911 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u64.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v && rv64 } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T uint64_t +#define NAME avg_ceil +#define FUNC AVG_CEIL_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u8.c new file mode 100644 index 0000000..a7755f0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-2-u8.c @@ -0,0 +1,17 @@ +/* { dg-do run { target { riscv_v } } } */ +/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */ + +#include "vx_binary.h" +#include "vx_binary_data.h" + +#define T uint8_t +#define NAME avg_ceil +#define FUNC AVG_CEIL_FUNC_WRAP(T) +#define TEST_DATA TEST_BINARY_DATA_WRAP(T, NAME) + +DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME) + +#define TEST_RUN(T, NAME, out, in, x, n) \ + RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n) + +#include "vx_binary_run.h" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-5.c b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-5.c index 04dec7b..4f6785a 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-5.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-5.c @@ -6,9 +6,9 @@ /* ** foo: -** addi\t[a-x0-9]+,\s*[a-x0-9]+,100 +** ... ** vsetvli\tzero,a2,e64,m2,t[au],m[au] -** vlse64.v\tv[0-9]+,0\([a-x0-9]+\),zero +** vmv.s.x\tv[0-9]+.* ** vs2r.v\tv[0-9]+,0\([a-x0-9]+\) ** ret */ @@ -23,7 +23,7 @@ void foo (void *base, void *out, size_t vl) ** foo2: ** fld\tfa[0-9]+,\s*100\(a0\) ** vsetvli\tzero,a2,e64,m2,t[au],m[au] -** vfmv\.v\.f\tv[0-9]+,\s*fa[0-9]+ +** vfmv\.s\.f\tv[0-9]+,\s*fa[0-9]+ ** vs2r.v\tv[0-9]+,0\([a-x0-9]+\) ** ret */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-6.c b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-6.c index 0ebb92e..a8c9263c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-6.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-6.c @@ -23,7 +23,7 @@ void foo (void *base, void *out, size_t vl) ** foo2: ** fld\tfa[0-9]+,\s*100\(a0\) ** vsetvli\tzero,a2,e64,m2,t[au],m[au] -** vfmv\.v\.f\tv[0-9]+,\s*fa[0-9]+ +** vfmv\.s\.f\tv[0-9]+,\s*fa[0-9]+ ** vs2r.v\tv[0-9]+,0\([a-x0-9]+\) ** ret */ @@ -52,7 +52,7 @@ void foo3 (void *base, void *out, size_t vl) /* ** foo4: ** ... -** vfmv\.v\.f\tv[0-9]+,\s*fa[0-9]+ +** vfmv\.s\.f\tv[0-9]+,\s*fa[0-9]+ ** ... ** ret */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-7.c b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-7.c index 512fa62..cf53aca 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-7.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-7.c @@ -6,9 +6,9 @@ /* ** foo: -** addi\t[a-x0-9]+,\s*[a-x0-9]+,100 +** ... ** vsetvli\tzero,a2,e64,m2,t[au],m[au] -** vlse64.v\tv[0-9]+,0\([a-x0-9]+\),zero +** vmv\.v\.x\tv[0-9]+,\s*a[0-9]+ ** vs2r.v\tv[0-9]+,0\([a-x0-9]+\) ** ret */ @@ -37,7 +37,7 @@ void foo2 (void *base, void *out, size_t vl) /* ** foo3: ** ... -** vlse64.v\tv[0-9]+,0\([a-x0-9]+\),zero +** vmv\.v\.x\tv[0-9]+,\s*a[0-9]+ ** ... ** ret */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-8.c b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-8.c index d9d10f3..fd3b7c5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-8.c @@ -175,9 +175,8 @@ void foo12 (void *base, void *out, size_t vl) /* ** foo13: ** ... -** vmv.v.x\tv[0-9]+,\s*[a-x0-9]+ +** vlse64.v\tv[0-9]+,0\([a-x0-9]+\),zero ** ... -** ret */ void foo13 (void *base, void *out, size_t vl) { @@ -189,7 +188,7 @@ void foo13 (void *base, void *out, size_t vl) /* ** foo14: ** ... -** vmv.v.x\tv[0-9]+,\s*[a-x0-9]+ +** vlse64.v\tv[0-9]+,0\([a-x0-9]+\),zero ** ... */ void foo14 (void *base, void *out, size_t vl) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-9.c b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-9.c index 80ee1b5..64c22dd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-9.c @@ -23,4 +23,3 @@ vuint64m2_t f3(vuint64m2_t var_17, uint64_t var_60, size_t vl) /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*0,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 } } */ /* { dg-final { scan-assembler-times {vsetivli\s+zero,\s*1,\s*e64,\s*m2,\s*t[au],\s*m[au]} 1 } } */ -/* { dg-final { scan-assembler-times {sgtu} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/pr120297.c b/gcc/testsuite/gcc.target/riscv/rvv/pr120297.c new file mode 100644 index 0000000..3d1845d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/pr120297.c @@ -0,0 +1,50 @@ +/* { dg-do run } */ +/* { dg-require-effective-target riscv_v_ok } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fwhole-program" } */ + +unsigned a; +short c; +char d; +unsigned long e; +_Bool f[10][10]; +unsigned g[10]; +long long ak; +char i = 7; +long long t[10]; +short x[10][10][10][10]; +short y[10][10][10][10]; + +void +h (char i, long long t[], short x[][10][10][10], short y[][10][10][10], + _Bool aa) +{ + for (int j = 2; j < 8; j += 2) + { + for (short k = 0; k < 10; k++) + { + for (int l = 3; l < 8; l += 2) + a = x[1][j][k][l]; + c = x[c][1][1][c]; + } + for (int k = 0; k < 10; k++) + { + f[2][k] |= (_Bool) t[c]; + g[c] = t[c + 1]; + d += y[j][1][k][k]; + e = e > i ? e : i; + } + } +} + +int +main () +{ + t[c] = 1; + h (i, t, x, y, a); + for (int j = 0; j < 10; ++j) + for (int k = 0; k < 10; ++k) + ak ^= f[j][k] + 238516665 + (ak >> 2); + ak ^= g[c] + 238516665 + (ak >> 2); + if (ak != 234635118ull) + __builtin_abort (); +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/pr121073.c b/gcc/testsuite/gcc.target/riscv/rvv/pr121073.c new file mode 100644 index 0000000..2789d0f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/pr121073.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -mrvv-vector-bits=zvl -fsigned-char -fno-strict-aliasing -fwrapv -Wno-stringop-overflow -Wno-aggressive-loop-optimizations" } */ + +int a; +unsigned char p[1][21]; +void init() { + for (int s = 0; s < 21; ++s) + for (int t = 0; t < 21; ++t) + p[s][t] = 39; + for (short t = 0; t < 9; t += -5077966496202321318LL + 28071) + a = p[3][t] && p[2][t]; +} diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h index 7e2c93e..e40902a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h @@ -73,6 +73,22 @@ sat_u_add_##WT##_##T##_fmt_7(T x, T y) \ } #define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T) +#define DEF_SAT_U_ADD_FMT_8(T) \ +T __attribute__((noinline)) \ +sat_u_add_##T##_fmt_8(T x, T y) \ +{ \ + return x <= (T)(x + y) ? (x + y) : -1; \ +} +#define DEF_SAT_U_ADD_FMT_8_WRAP(T) DEF_SAT_U_ADD_FMT_8(T) + +#define DEF_SAT_U_ADD_FMT_9(T) \ +T __attribute__((noinline)) \ +sat_u_add_##T##_fmt_9(T x, T y) \ +{ \ + return x > (T)(x + y) ? -1 : (x + y); \ +} +#define DEF_SAT_U_ADD_FMT_9_WRAP(T) DEF_SAT_U_ADD_FMT_9(T) + #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y) #define RUN_SAT_U_ADD_FMT_1_WRAP(T, x, y) RUN_SAT_U_ADD_FMT_1(T, x, y) #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y) @@ -97,6 +113,10 @@ sat_u_add_##WT##_##T##_fmt_7(T x, T y) \ sat_u_add_uint64_t_##T##_fmt_7(x, y) #define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \ RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) +#define RUN_SAT_U_ADD_FMT_8(T, x, y) sat_u_add_##T##_fmt_8(x, y) +#define RUN_SAT_U_ADD_FMT_8_WRAP(T, x, y) RUN_SAT_U_ADD_FMT_8(T, x, y) +#define RUN_SAT_U_ADD_FMT_9(T, x, y) sat_u_add_##T##_fmt_9(x, y) +#define RUN_SAT_U_ADD_FMT_9_WRAP(T, x, y) RUN_SAT_U_ADD_FMT_9(T, x, y) #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM) \ T __attribute__((noinline)) \ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c index 55890d8..50f0f1f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c @@ -1,32 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int16_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_FMT_1(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c index 29e843f..dc65817 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c @@ -1,31 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int32_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_FMT_1(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c index 7f29d21..9995bc7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c @@ -1,29 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int64_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c index 3ad7bdd..caf745a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int8_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_FMT_1(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c index 07d3101..f19187d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c @@ -1,32 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int16_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_FMT_2(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c index 81b85b4..88dc37d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c @@ -1,31 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int32_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_FMT_2(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c index 9a3d83e..891d6cf 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c @@ -1,29 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int64_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_FMT_2(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c index ecc9a0f..a07172b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int8_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_FMT_2(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c index 7e93385..5077198 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c @@ -1,32 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int16_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_FMT_3(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c index 09bf497..07af4e1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c @@ -1,31 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int32_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_FMT_3(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c index 5652cdb..7c4be5b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c @@ -1,29 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int64_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_FMT_3(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c index 0eb0c84..fc0e1b7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int8_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c index 9dfdb9e..4c0b38a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c @@ -1,32 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int16_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_FMT_4(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c index 74df576..45b4638 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c @@ -1,31 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int32_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_FMT_4(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c index 5937699..294eb52 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c @@ -1,29 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int64_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_FMT_4(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c index af850d0..143fa3c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_int8_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_FMT_4(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c index 2e23af5..414cb61 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c @@ -1,57 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int16_t_fmt_1_0: -** addi\s+[atx][0-9]+,\s*a0,\s*-7 -** xori\s+[atx][0-9]+,\s*a0,\s*-7 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX) - -/* -** sat_s_add_imm_int16_t_fmt_1_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** not\s+[atx][0-9]+,\s*a0 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c index e63211f..adf5b39 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c @@ -1,54 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int32_t_fmt_1_0: -** addi\s+[atx][0-9]+,\s*a0,\s*10 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*a0,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,a0,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX) -/* -** sat_s_add_imm_int32_t_fmt_1_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** not\s+[atx][0-9]+,\s*a0 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(1, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c index 3843b71..b88e064 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c @@ -1,48 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int64_t_fmt_1_0: -** addi\s+[atx][0-9]+,\s*a0,\s*10 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX) -/* -** sat_s_add_imm_int64_t_fmt_1_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** slti\s+[atx][0-9]+,\s*a0,\s*0 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(1, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c index ceae1ea..0e337ef 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c @@ -1,49 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int8_t_fmt_1_0: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*a0,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*a0,\s*127 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX) -/* -** sat_s_add_imm_int8_t_fmt_1_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*56 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srai\s+a0,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*a0,\s*127 -** neg\s+a0,\s*a5 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_1(1, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c index 14c5d51..f217fe1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c @@ -1,57 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int16_t_fmt_2_0: -** addi\s+[atx][0-9]+,\s*a0,\s*-7 -** xori\s+[atx][0-9]+,\s*a0,\s*-7 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX) -/* -** sat_s_add_imm_int16_t_fmt_2_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** not\s+[atx][0-9]+,\s*a0 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c index ecd757d..4025b5a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c @@ -1,54 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int32_t_fmt_2_0: -** addi\s+[atx][0-9]+,\s*a0,\s*10 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*a0,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,a0,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX) -/* -** sat_s_add_imm_int32_t_fmt_2_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** not\s+[atx][0-9]+,\s*a0 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(1, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c index 07d798f..3fc2514 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c @@ -1,48 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int64_t_fmt_2_0: -** addi\s+[atx][0-9]+,\s*a0,\s*10 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srli\s+[atx][0-9]+,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX) -/* -** sat_s_add_imm_int64_t_fmt_2_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** slti\s+[atx][0-9]+,\s*a0,\s*0 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*a0,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(1, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c index 2734211..a0e15cf 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c @@ -1,49 +1,11 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_add_imm_int8_t_fmt_2_0: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*a0,\s*7 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+a0,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*a0,\s*127 -** neg\s+a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX) -/* -** sat_s_add_imm_int8_t_fmt_2_1: -** addi\s+[atx][0-9]+,\s*a0,\s*-1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+a0,\s*a0,\s*63 -** xori\s+[atx][0-9]+,\s*a0,\s*127 -** neg\s+a0,\s*a4 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*a0,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_ADD_IMM_FMT_2(1, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c index c244eb4..734e8be 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int16_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_SUB_FMT_1(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c index 9d8245d..3aa4c58 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int32_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7] -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_1(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c index 929de16..4c0caa1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c @@ -1,27 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int64_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c index a918d5c..6c1441b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int8_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_SUB_FMT_1(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c index 2da1c0d..57a4327 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int16_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_SUB_FMT_2(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c index 20b28e7..28582fb 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int32_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7] -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_2(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c index a540198..130ca46 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c @@ -1,27 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int64_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_2(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c index c54057d..cd407b2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int8_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_SUB_FMT_2(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c index 469a113..748d61a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int16_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_SUB_FMT_3(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c index b2c03f6..be7869a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int32_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7] -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_3(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c index e3fe6c7..d16a7fb 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c @@ -1,27 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int64_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_3(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c index 150cde1..14a2454 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int8_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_SUB_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c index 26d159c..614d1ec 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c @@ -1,30 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int16_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_SUB_FMT_4(int16_t, uint16_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c index d576c38..2f52bd7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int32_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7] -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_4(int32_t, uint32_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c index f42ffea..cef478b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c @@ -1,27 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int64_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_S_SUB_FMT_4(int64_t, uint64_t, INT64_MIN, INT64_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c index ee510a6..3ed7790 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_sub_int8_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*a1 -** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_SUB_FMT_4(int8_t, uint8_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c index 451a375..6d1fbc4 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_1: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c index 2aafb94..56a6699 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_1: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c index 6e21ee3..10c3320 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_1: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c index 5e971e4..558d704 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_1: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c index 87e5a52..02bef46 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_1: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c index 22a0dd4..da04904 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_1: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_1(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c index cb307ac..41391e2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_2: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c index b4bee21..3e5f9e1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_2: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c index c467c8d..228eeab 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_2: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c index 883b77b..78542ca 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_2: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c index bb9ffce..556e8ea 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_2: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c index a54db48..918a8c3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_2: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_2(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c index 219156c..13c0291 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_3: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c index 87b8a70..03077b7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_3: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c index 7acd515..e09a88d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_3: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c index 9141f08..ca071d1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_3: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c index 839a6f7..4acd93c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_3: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c index 5d13f09..362970c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_3: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_3(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c index 34dc804..94d9cc4 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_4: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c index 89c476e..51a6e7b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_4: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c index 03ca7b7..9101b40 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_4: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c index aafe167..48452e3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_4: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c index 08e5eb3..6757913 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_4: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c index b0e71fe..9c65582 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_4: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_4(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c index b42c759..f02f866 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_5: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c index 625372e..6753c03 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_5: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c index 250e174..3fd17fa 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_5: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c index 4a6ac6d..fba761a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_5: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c index 02aa6db..8872f7f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_5: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c index ae1bcb9..13539aa 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_5: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_5(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c index 9a740d7..4aa9a8f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_6: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c index 1e42bfd..a772ee8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_6: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c index c3bd46d..9c5d88b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_6: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c index a6575f5..f9f18e9 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_6: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c index fd7b72e..3658fbb 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_6: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c index 242d2d0..f1a7eb8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_6: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_6(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c index 3f258b8..50b06d5 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_7: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c index f37a57e..12be220 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_7: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c index 4e4a7eb..cb73531 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_7: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c index 29b64b4..d52394c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_7: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c index 2bfe898..cf79778 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_7: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c index 494a314..67485a3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_7: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_7(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c index 678dec6..a34bf4a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int16_t_to_int8_t_fmt_8: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int8_t, int16_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c index 4acc789..9c25ff0 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int16_t_fmt_8: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int16_t, int32_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c index 34a992b..9ee75e2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int32_t_to_int8_t_fmt_8: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int8_t, int32_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c index 1919ba5..8cd361e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c @@ -1,28 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int16_t_fmt_8: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** li\s+[atx][0-9]+,\s*-32768 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*16 -** sraiw\s+a0,\s*a0,\s*16 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int16_t, int64_t, INT16_MIN, INT16_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c index 541e55c..ace064b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int32_t_fmt_8: -** li\s+[atx][0-9]+,\s*-2147483648 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int32_t, int64_t, INT32_MIN, INT32_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c index 36a0085..e9a4d3b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c @@ -1,26 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_s_trunc_int64_t_to_int8_t_fmt_8: -** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** li\s+[atx][0-9]+,\s*-128 -** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63 -** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127 -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slliw\s+a0,\s*a0,\s*24 -** sraiw\s+a0,\s*a0,\s*24 -** ret -*/ DEF_SAT_S_TRUNC_FMT_8(int8_t, int64_t, INT8_MIN, INT8_MAX) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c index 3c916bc..8f1b5c0 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_1(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c index edded3e..2c66eee 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_1: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_1(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c index 821e4bc..28d7b7c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_1(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c index fd73c3a..ab18336 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_1: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_1(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c index a166d28..c03b15d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_2(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c index c06731b..f753c01 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_2: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_2(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c index ae10dff..cad539c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_2(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c index f3977be..b595241 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_2: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_2(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c index 5898c3b..08cd820 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_3(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c index a1017c9..e0b73748 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_3: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_3(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c index 83fcb60..7ce0121 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_3(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c index 2c398e0c..48f61c1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_3: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_3(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c index c18a5d59..49d5af1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_4(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c index fa2e55d..20ad476 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_4: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_4(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c index 6818c0c..6d2c9a7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_4(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c index 1096de8..15e613b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_4: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_4(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c index fd4be5c..225ba0c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_5: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_5(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c index 4fbc807..106baf7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_5: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_5(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c index 5bc2948..48e84f6 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_5: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_5(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c index 74109c3..9c0d42a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_5: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_5(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c index 3cb9cbe..0b541e0 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_fmt_6: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_6(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c index fd1cb1a..ee79156 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_fmt_6: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_6(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c index c968f33..fd79139 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_fmt_6: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_FMT_6(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c index 9cd95ad..f826aa4 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint8_t_fmt_6: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_6(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c index 527f8de..446a951 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_uint16_t_fmt_7: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint32_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c index e9031de..626effc 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_uint16_t_fmt_7: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint64_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c index a71bd2f..3014634 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_uint32_t_fmt_7: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** add\s+[atx][0-9]+,\s*a[01],\s*a[01] -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c index 5892986..541a1d8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint16_t_uint8_t_fmt_7: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint16_t, uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c index a42a712..26749a8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint32_t_uint8_t_fmt_7: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint32_t, uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c index f37ef1c..321f662 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_uint64_t_uint8_t_fmt_7: -** add\s+[atx][0-9]+,\s*a0,\s*a1 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_FMT_7(uint64_t, uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u16.c new file mode 100644 index 0000000..a7062b5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u16.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_U_ADD_FMT_8(uint16_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u32.c new file mode 100644 index 0000000..2e43c7f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u32.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_U_ADD_FMT_8(uint32_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u64.c new file mode 100644 index 0000000..4ad18c1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u64.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_U_ADD_FMT_8(uint64_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u8.c new file mode 100644 index 0000000..608d31b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-8-u8.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_U_ADD_FMT_8(uint8_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u16.c new file mode 100644 index 0000000..b9766d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u16.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_U_ADD_FMT_9(uint16_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u32.c new file mode 100644 index 0000000..2456d39 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u32.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_U_ADD_FMT_9(uint32_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u64.c new file mode 100644 index 0000000..0a0ff24 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u64.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_U_ADD_FMT_9(uint64_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u8.c new file mode 100644 index 0000000..53879dd --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-9-u8.c @@ -0,0 +1,9 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +DEF_SAT_U_ADD_FMT_9(uint8_t) + +/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u16.c new file mode 100644 index 0000000..aaf13be --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u16.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint16_t +#define DATA TEST_BINARY_DATA_WRAP(T1, usadd) +#define T TEST_BINARY_STRUCT_DECL(T1, usadd) + +DEF_SAT_U_ADD_FMT_8_WRAP(T1) + +#define RUN_BINARY(x, y) RUN_SAT_U_ADD_FMT_8_WRAP(T1, x, y) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u32.c new file mode 100644 index 0000000..0ec8d90 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u32.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint32_t +#define DATA TEST_BINARY_DATA_WRAP(T1, usadd) +#define T TEST_BINARY_STRUCT_DECL(T1, usadd) + +DEF_SAT_U_ADD_FMT_8_WRAP(T1) + +#define RUN_BINARY(x, y) RUN_SAT_U_ADD_FMT_8_WRAP(T1, x, y) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u64.c new file mode 100644 index 0000000..f367f67 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u64.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint64_t +#define DATA TEST_BINARY_DATA_WRAP(T1, usadd) +#define T TEST_BINARY_STRUCT_DECL(T1, usadd) + +DEF_SAT_U_ADD_FMT_8_WRAP(T1) + +#define RUN_BINARY(x, y) RUN_SAT_U_ADD_FMT_8_WRAP(T1, x, y) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u8.c new file mode 100644 index 0000000..0fd4036 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-8-u8.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint8_t +#define DATA TEST_BINARY_DATA_WRAP(T1, usadd) +#define T TEST_BINARY_STRUCT_DECL(T1, usadd) + +DEF_SAT_U_ADD_FMT_8_WRAP(T1) + +#define RUN_BINARY(x, y) RUN_SAT_U_ADD_FMT_8_WRAP(T1, x, y) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u16.c new file mode 100644 index 0000000..4289e2a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u16.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint16_t +#define DATA TEST_BINARY_DATA_WRAP(T1, usadd) +#define T TEST_BINARY_STRUCT_DECL(T1, usadd) + +DEF_SAT_U_ADD_FMT_9_WRAP(T1) + +#define RUN_BINARY(x, y) RUN_SAT_U_ADD_FMT_9_WRAP(T1, x, y) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u32.c new file mode 100644 index 0000000..d3dd52e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u32.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint32_t +#define DATA TEST_BINARY_DATA_WRAP(T1, usadd) +#define T TEST_BINARY_STRUCT_DECL(T1, usadd) + +DEF_SAT_U_ADD_FMT_9_WRAP(T1) + +#define RUN_BINARY(x, y) RUN_SAT_U_ADD_FMT_9_WRAP(T1, x, y) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u64.c new file mode 100644 index 0000000..a9f0964 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u64.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint64_t +#define DATA TEST_BINARY_DATA_WRAP(T1, usadd) +#define T TEST_BINARY_STRUCT_DECL(T1, usadd) + +DEF_SAT_U_ADD_FMT_9_WRAP(T1) + +#define RUN_BINARY(x, y) RUN_SAT_U_ADD_FMT_9_WRAP(T1, x, y) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u8.c new file mode 100644 index 0000000..91cdb7e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-run-9-u8.c @@ -0,0 +1,15 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define T1 uint8_t +#define DATA TEST_BINARY_DATA_WRAP(T1, usadd) +#define T TEST_BINARY_STRUCT_DECL(T1, usadd) + +DEF_SAT_U_ADD_FMT_9_WRAP(T1) + +#define RUN_BINARY(x, y) RUN_SAT_U_ADD_FMT_9_WRAP(T1, x, y) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c index 3c31ac3..b6388dc 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm3_uint16_t_fmt_1: -** addi\s+[atx][0-9]+,\s*a0,\s*3 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_1(uint16_t, 3) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c index c6b352c..cae6796 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm7_uint32_t_fmt_1: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*7 -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_1(uint32_t, 7) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c index 1d9df3c..f9d6939 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm8_uint64_t_fmt_1: -** addi\s+[atx][0-9]+,\s*a0,\s*8 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_1(uint64_t, 8) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c index 101acd8..d90209a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm9_uint8_t_fmt_1: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_1(uint8_t, 9) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c index ac57cc9..a34194d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm3_uint16_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*3 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_2(uint16_t, 3) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c index 6aca60c..9a801d2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm7_uint32_t_fmt_2: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*7 -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_2(uint32_t, 7) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c index d041724..2eb57a3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm8_uint64_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*8 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_2(uint64_t, 8) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c index 7baeb8d..363b2df8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm9_uint8_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_2(uint8_t, 9) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c index 6dbabf6..aaf1209 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm3_uint16_t_fmt_3: -** addi\s+[atx][0-9]+,\s*a0,\s*3 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_3(uint16_t, 3) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c index 1c52b21..e430b37 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm7u_uint32_t_fmt_3: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*7 -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_3(uint32_t, 7u) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c index ef60ce2..aef5c58 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm8ull_uint64_t_fmt_3: -** addi\s+[atx][0-9]+,\s*a0,\s*8 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_3(uint64_t, 8ull) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c index 81a4b21..039d982 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm9_uint8_t_fmt_3: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_3(uint8_t, 9) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c index 2f6c0460..baf70c3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c @@ -1,21 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm3_uint16_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*3 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_4(uint16_t, 3) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c index 1fc9a50..a4bfe50 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm7u_uint32_t_fmt_4: -** slli\s+[atx][0-9]+,\s*a0,\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*7 -** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_4(uint32_t, 7u) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c index 0ca423c..f355de6 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm8ull_uint64_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*8 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_4(uint64_t, 8ull) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c index c8a43fa..54880d7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_add_imm9_uint8_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*9 -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** neg\s+[atx][0-9]+,\s*[atx][0-9]+ -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_ADD_IMM_FMT_4(uint8_t, 9) /* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c index b60c91c..cd6f2f8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c @@ -9,3 +9,4 @@ DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u32.c new file mode 100644 index 0000000..7409232 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u32.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +#define NT uint16_t +#define WT uint32_t + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u64.c new file mode 100644 index 0000000..43ab563 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u64.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc -mabi=ilp32d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +#define NT uint16_t +#define WT uint64_t + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c index 1ac6f39..dea9f6d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c @@ -9,3 +9,4 @@ DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u64.c new file mode 100644 index 0000000..8d5449b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u64.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc -mabi=ilp32d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +#define NT uint32_t +#define WT uint64_t + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c index af12d82..d8a01d1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c @@ -9,3 +9,4 @@ DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c index c73353a..dfc9d2e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c @@ -9,3 +9,4 @@ DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) /* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u16.c new file mode 100644 index 0000000..ec79e5d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u16.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +#define NT uint8_t +#define WT uint16_t + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u32.c new file mode 100644 index 0000000..eb95184 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u32.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +#define NT uint8_t +#define WT uint32_t + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u64.c new file mode 100644 index 0000000..ee41593 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u64.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc -mabi=ilp32d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +#define NT uint8_t +#define WT uint64_t + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u16-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u16-from-u64.c new file mode 100644 index 0000000..b1d33a9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u16-from-u64.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +#define NT uint16_t +#define WT uint64_t + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u32-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u32-from-u64.c new file mode 100644 index 0000000..af5ffecf --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u32-from-u64.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +#define NT uint32_t +#define WT uint64_t + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u8-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u8-from-u64.c new file mode 100644 index 0000000..d65cab0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-2-u8-from-u64.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ + +#include "sat_arith.h" + +#define NT uint8_t +#define WT uint64_t + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u32.c new file mode 100644 index 0000000..e212391 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u32.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define NT uint16_t +#define WT uint32_t +#define NAME usmul +#define DATA TEST_BINARY_DATA_WRAP(NT, NAME) +#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME) +#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_1_WRAP(NT, WT, x, y) + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u64.c new file mode 100644 index 0000000..79d3fb3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u16-from-u64.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define NT uint16_t +#define WT uint64_t +#define NAME usmul +#define DATA TEST_BINARY_DATA_WRAP(NT, NAME) +#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME) +#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_1_WRAP(NT, WT, x, y) + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u32-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u32-from-u64.c new file mode 100644 index 0000000..ad63db3 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u32-from-u64.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define NT uint32_t +#define WT uint64_t +#define NAME usmul +#define DATA TEST_BINARY_DATA_WRAP(NT, NAME) +#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME) +#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_1_WRAP(NT, WT, x, y) + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u16.c new file mode 100644 index 0000000..f5a0ab5 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u16.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define NT uint8_t +#define WT uint16_t +#define NAME usmul +#define DATA TEST_BINARY_DATA_WRAP(NT, NAME) +#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME) +#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_1_WRAP(NT, WT, x, y) + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u32.c new file mode 100644 index 0000000..32074a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u32.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define NT uint8_t +#define WT uint32_t +#define NAME usmul +#define DATA TEST_BINARY_DATA_WRAP(NT, NAME) +#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME) +#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_1_WRAP(NT, WT, x, y) + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u64.c new file mode 100644 index 0000000..16ca905 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-run-1-u8-from-u64.c @@ -0,0 +1,16 @@ +/* { dg-do run { target { rv32 || rv64 } } } */ +/* { dg-additional-options "-std=c99" } */ + +#include "sat_arith.h" +#include "sat_arith_data.h" + +#define NT uint8_t +#define WT uint64_t +#define NAME usmul +#define DATA TEST_BINARY_DATA_WRAP(NT, NAME) +#define T TEST_BINARY_STRUCT_DECL_WRAP(NT, NAME) +#define RUN_BINARY(x, y) RUN_SAT_U_MUL_FMT_1_WRAP(NT, WT, x, y) + +DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT) + +#include "scalar_sat_binary_run_xxx.h" diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c index eb140ae..66a439e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_1(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c index 59ad242..6f40907 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_1: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_1(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c index 47a8382..647fc6d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_1(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c index f01317b..a344c58 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_1: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_1(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c index 4b7bd3a..87fb1fc 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_10: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_10(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c index a28213f..280236a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_10: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_10(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c index 432da0c..4b7d339 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_10: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_10(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c index 0658d38..191c3a5 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_10: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_10(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c index 2e4b875..9dc41e1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_11: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_11(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c index 61fb80f..475f944 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_11: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_11(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c index 2a28b1f..61e3584 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_11: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_11(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c index 3033844..7a61055 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_11: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_11(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c index 9cb86df..c4d21cb 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_12: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_12(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c index babe768..56beb83 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_12: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_12(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c index 294ef5a..1bef3fe 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_12: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_12(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c index 8b8f924..9004281 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_12: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_12(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c index e724752..7b85582 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_2(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c index 9240406..cfdf66c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_2(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c index 3e1efba..3898817 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_2(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c index 600688a..3318211 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_2: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_2(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c index bb2d0b7..61bb5e5 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_3(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c index 06635df..73bfa99 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_3: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_3(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c index ac485da..24d1e69 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_3(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c index cdc8776..5523112 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_3: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_3(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c index 407ff8f..fb6a604 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_4(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c index cb2cd05..0f7e2d3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_4: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_4(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c index 0ce6269..c762647 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_4(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c index 302206a..3e5d2e6 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_4: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_4(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c index ce2758f..ab1b375 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_5: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_5(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c index d33cef3..1b8ce84 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_5: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_5(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c index 1bf1e97..3fc4e7a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_5: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_5(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c index b2ed732..5c34ead 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_5: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_5(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c index 20614ec..70dc6ec 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_6: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_6(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c index 5d7adfd..cc36036 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_6: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_6(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c index b3c6f8d..ea633ff 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_6: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_6(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c index a4f92a8..7c4747a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_6: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_6(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c index ebfe673..cac8471 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_7: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_7(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c index 9884123..18b8e5f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_7: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_7(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c index 67236d5..f5ade61 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_7: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_7(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c index 549d9d2..9b528a4 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_7: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_7(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c index aa5aec7..0d093c3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_8: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_8(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c index 89a8cc9..f04ea1d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_8: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_8(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c index a52948d..17dd8f3 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_8: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_8(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c index 5606733..b043207 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_8: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_8(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c index 984867a..19b1a5b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint16_t_fmt_9: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_FMT_9(uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c index d1109a4..a0026a1 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c @@ -1,22 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint32_t_fmt_9: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** slli\s+a1,\s*a1,\s*32 -** srli\s+a1,\s*a1,\s*32 -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_FMT_9(uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c index a9acf15..01c155e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint64_t_fmt_9: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*a0,\s*a1 -** addi\s+a0,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_FMT_9(uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c index 47551fa..7b94d40 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c @@ -1,18 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_uint8_t_fmt_9: -** sub\s+[atx][0-9]+,\s*a0,\s*a1 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_FMT_9(uint8_t) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c index 573ef11..475b31e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm32768_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*32768 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 32768) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c index 0fefbe7..a984f84b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm65533_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 65533) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c index ad6d4f9..b2930d4 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm65534_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-2 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 65534) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c index 02dcbc5..362cf48 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 1) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c index 7346fbb..9f17082 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm6_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*6 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 6) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c index c7dac8a..801a86e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c @@ -1,23 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm2147483648_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 2147483648) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c index 4320db3..e044768 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm68719476732_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 68719476732) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c index 765d13c..5518064 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm4294967294_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-2 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 4294967294) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c index ca11cf1..a4cb49b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 1) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c index 3711930..64808bf 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm255_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*255 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 255) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c index 2e490f0..493a14d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm18446744073709551614u_uint64_t_fmt_1: -** li\s+[atx][0-9]+,\s*-2 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 18446744073709551614u) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c index 45baa8f..4faae52 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint64_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 1) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c index a29a6e9..3f993fd 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm82_uint64_t_fmt_1: -** li\s+[atx][0-9]+,\s*82 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 82) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c index d1c6e94..a0d9235 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm128_uint8_t_fmt_1: -** li\s+[atx][0-9]+,\s*128 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 128) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c index 4c8cf90..67dae03 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm253_uint8_t_fmt_1: -** li\s+[atx][0-9]+,\s*253 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 253) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c index b958f5e..0054532 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm254_uint8_t_fmt_1: -** li\s+[atx][0-9]+,\s*254 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 254) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c index 1951ec5..c12b560 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint8_t_fmt_1: -** li\s+[atx][0-9]+,\s*1 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 1) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c index 86d0b39..ce9f495 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm11_uint8_t_fmt_1: -** li\s+[atx][0-9]+,\s*11 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 11) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c index 31c1bb8..93d7169 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm32768_uint16_t_fmt_2: -** li\s+[atx][0-9]+,\s*32768 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 32768) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c index 68807b9..8ac2ce8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm65533_uint16_t_fmt_2: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 65533) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c index 62deec1..740d6ac 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c @@ -1,18 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint16_t_fmt_2: -** snez\s+[atx][0-9]+,\s*a0 -** subw\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 1) /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c index f789fee..c82c478 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm6_uint16_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*-6 -** sltiu\s+a0,\s*[atx][0-9]+,\s*6 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 6) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c index 2f4a439..b2f690a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c @@ -1,23 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm2147483648_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 2147483648) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c index dcfba62..e62010b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm68719476732_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 68719476732) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c index a3f48f7..dd063d8 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c @@ -1,16 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint32_t_fmt_2: -** snez\s+[atx][0-9]+,\s*a0 -** subw\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ - DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 1) /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c index 0bd8ddc..c0eb8a7 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm255_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*-255 -** sltiu\s+a0,\s*[atx][0-9]+,\s*255 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 255) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c index 7b6d857..ed69313 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c @@ -1,16 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint64_t_fmt_2: -** snez\s+[atx][0-9]+,\s*a0 -** sub\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ - DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 1) /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c index c334665..fb7db13 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c @@ -1,18 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm82_uint64_t_fmt_2: -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-82 -** sltiu\s+a0,\s*[atx][0-9]+,\s*82 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 82) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c index 26e77f0..efe6c00 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm128_uint8_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*-128 -** sltiu\s+a0,\s*[atx][0-9]+,\s*128 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 128) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c index c5ac1b0..1262648 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm253_uint8_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*-253 -** sltiu\s+a0,\s*[atx][0-9]+,\s*253 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 253) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c index ee59b5a..108daf2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c @@ -1,17 +1,8 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm1_uint8_t_fmt_2: -** snez\s+[atx][0-9]+,\s*a0 -** subw\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ - DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 1) /* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c index 69dcc2a..784a97b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm11_uint8_t_fmt_2: -** addi\s+[atx][0-9]+,\s*a0,\s*-11 -** sltiu\s+a0,\s*[atx][0-9]+,\s*11 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 11) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c index f312362..0f16f9c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm32769_uint16_t_fmt_3: -** li\s+[atx][0-9]+,\s*32768 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 32769) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c index fa9a9ef..49daab5 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm65533_uint16_t_fmt_3: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 65533) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c index b98de41..30fc2bf 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm6_uint16_t_fmt_3: -** li\s+[atx][0-9]+,\s*6 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 6) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c index 79457a3..2d3c63d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm2147483649_uint32_t_fmt_3: -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 2147483649) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c index 2e8426e..8d96c00 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm68719476732_uint32_t_fmt_3: -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 68719476732) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c index 845218c..c06c441 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm255_uint32_t_fmt_3: -** li\s+[atx][0-9]+,\s*255 -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 255) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c index ee2fbf8..4d2b96d 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm82_uint64_t_fmt_3: -** li\s+[atx][0-9]+,\s*82 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint64_t, 82) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c index 8cc81e2..8c3eb14 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm134_uint8_t_fmt_3: -** li\s+[atx][0-9]+,\s*134 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 134) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c index 8d8c70b..b02d832 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm253_uint8_t_fmt_3: -** li\s+[atx][0-9]+,\s*253 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 253) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c index 348d75b..d8e0a69 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm11_uint8_t_fmt_3: -** li\s+[atx][0-9]+,\s*11 -** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0 -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 11) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c index 089c168..8f3726f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm32768_uint16_t_fmt_4: -** li\s+[atx][0-9]+,\s*32768 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 32768) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c index b96e3f3..56c377e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c @@ -1,22 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm65533_uint16_t_fmt_4: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 65533) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c index 5c209bc..29c6b86 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c @@ -1,20 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm6_uint16_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*-6 -** sltiu\s+a0,\s*[atx][0-9]+,\s*6 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 6) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c index 2f4a439..b2f690a 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c @@ -1,23 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm2147483648_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 2147483648) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c index dcfba62..e62010b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c @@ -1,24 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm68719476732_uint32_t_fmt_2: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** li\s+[atx][0-9]+,\s*1 -** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4 -** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 68719476732) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c index ee1ad9a..6cfb1e4c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c @@ -1,21 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm255_uint32_t_fmt_4: -** slli\s+a0,\s*a0,\s*32 -** srli\s+a0,\s*a0,\s*32 -** addi\s+[atx][0-9]+,\s*a0,\s*-255 -** sltiu\s+a0,\s*[atx][0-9]+,\s*255 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** sext\.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint32_t, 255) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c index c334665..fb7db13 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c @@ -1,18 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm82_uint64_t_fmt_2: -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-82 -** sltiu\s+a0,\s*[atx][0-9]+,\s*82 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 82) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c index 3fe4103..49a4150 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm128_uint8_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*-128 -** sltiu\s+a0,\s*[atx][0-9]+,\s*128 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 128) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c index 18dc505..1022de2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm253_uint8_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*-253 -** sltiu\s+a0,\s*[atx][0-9]+,\s*253 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 253) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c index 5c40f32..48aaeb2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c @@ -1,19 +1,10 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_sub_imm11_uint8_t_fmt_4: -** addi\s+[atx][0-9]+,\s*a0,\s*-11 -** sltiu\s+a0,\s*[atx][0-9]+,\s*11 -** addi\s+a0,\s*a0,\s*-1 -** and\s+a0,\s*a0,\s*[atx][0-9]+ -** andi\s+a0,\s*a0,\s*0xff -** ret -*/ DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 11) /* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c index b73290a..d368621 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint16_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c index 8af803f..02ca992 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint32_t_fmt_1: -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint32_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c index 1c887d4..cc01abd 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint8_t_fmt_1: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c index 6bcf64b..e28ee5c 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint16_t_to_uint8_t_fmt_1: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c index 8a35e72..59302cb 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint16_t_fmt_1: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint16_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c index a3b52de..735ea7e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint16_t_to_uint8_t_fmt_2: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c index b9b43f1..8fd3f43 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint16_t_fmt_2: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint16_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c index 7ed3623..bb4ecc5 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint8_t_fmt_1: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c index 7572c9e..e476897 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint8_t_fmt_2: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c index d83b5dd..524d625 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint8_t_fmt_2: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c index b7202f9..ba8b238 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint16_t_fmt_2: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint16_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c index e90b853..cba8573 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint32_t_fmt_2: -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_TRUNC_FMT_2(uint32_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c index e8655b9..5852028 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint16_t_fmt_3: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint16_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c index 41e676a..5d5cf97 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint32_t_fmt_3: -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint32_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c index 32eeb88..866e240 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint8_t_fmt_3: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c index 5d043ce..f3adfb6 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint16_t_to_uint8_t_fmt_3: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c index 7e5906b..4e132a9 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint16_t_fmt_3: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint16_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c index e1b0acd..893f43e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint16_t_to_uint8_t_fmt_4: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint16_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c index 618d50bd..5c0c7a7e 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint16_t_fmt_4: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint16_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c index c9a9a4c..395bb1b 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint8_t_fmt_3: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c index 418cdc8..8f20c8f 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint32_t_to_uint8_t_fmt_4: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint32_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c index 4903a04..f7e7ff2 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c @@ -1,17 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint8_t_fmt_4: -** sltiu\s+[atx][0-9]+,\s*a0,\s*255 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c index 6f8191c..2d9b6a6 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c @@ -1,20 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint16_t_fmt_4: -** li\s+[atx][0-9]+,\s*65536 -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** slli\s+a0,\s*a0,\s*48 -** srli\s+a0,\s*a0,\s*48 -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint16_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c index 24bb846..4fa81fe 100644 --- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c +++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c @@ -1,19 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */ -/* { dg-final { check-function-bodies "**" "" } } */ +/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */ #include "sat_arith.h" -/* -** sat_u_trunc_uint64_t_to_uint32_t_fmt_4: -** li\s+[atx][0-9]+,\s*-1 -** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32 -** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+ -** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1 -** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+ -** sext.w\s+a0,\s*a0 -** ret -*/ DEF_SAT_U_TRUNC_FMT_4(uint32_t, uint64_t) /* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */ +/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */ diff --git a/gcc/testsuite/gcc.target/riscv/xtheadint-push-pop.c b/gcc/testsuite/gcc.target/riscv/xtheadint-push-pop.c index dc5609c..167fa15 100644 --- a/gcc/testsuite/gcc.target/riscv/xtheadint-push-pop.c +++ b/gcc/testsuite/gcc.target/riscv/xtheadint-push-pop.c @@ -20,12 +20,6 @@ void func_machine (void) /* { dg-final { scan-assembler-times {\mth\.ipop\M} 2 { target { rv32 } } } } */ -__attribute__ ((interrupt ("user"))) -void func_usr (void) -{ - f (); -} - __attribute__ ((interrupt ("supervisor"))) void func_supervisor (void) { diff --git a/gcc/testsuite/gcc.target/s390/asm-hard-reg-1.c b/gcc/testsuite/gcc.target/s390/asm-hard-reg-1.c new file mode 100644 index 0000000..671c0ed --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/asm-hard-reg-1.c @@ -0,0 +1,103 @@ +/* { dg-do compile { target { lp64 } } } */ +/* { dg-options "-O2 -march=z13 -mzarch" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ + +/* +** test_in_1: +** foo %r2 +** br %r14 +*/ + +int +test_in_1 (int x) +{ + asm ("foo %0" :: "{r2}" (x)); + return x; +} + +/* +** test_in_2: +** lgr (%r[0-9]+),%r2 +** lr %r2,%r3 +** foo %r2 +** lgr %r2,\1 +** br %r14 +*/ + +int +test_in_2 (int x, int y) +{ + asm ("foo %0" :: "{r2}" (y)); + return x; +} + +/* +** test_in_3: +** stmg %r12,%r15,96\(%r15\) +** lay %r15,-160\(%r15\) +** lgr (%r[0-9]+),%r2 +** ahi %r2,1 +** lgfr %r2,%r2 +** brasl %r14,foo@PLT +** lr %r3,%r2 +** lr %r2,\1 +** foo %r3,%r2 +** lgr %r2,\1 +** lmg %r12,%r15,256\(%r15\) +** br %r14 +*/ + +extern int foo (int); + +int +test_in_3 (int x) +{ + asm ("foo %0,%1\n" :: "{r3}" (foo (x + 1)), "{r2}" (x)); + return x; +} + +/* +** test_out_1: +** foo %r3 +** lgfr %r2,%r3 +** br %r14 +*/ + +int +test_out_1 (void) +{ + int x; + asm ("foo %0" : "={r3}" (x)); + return x; +} + +/* +** test_out_2: +** lgr (%r[0-9]+),%r2 +** foo %r2 +** ark (%r[0-9]+),\1,%r2 +** lgfr %r2,\2 +** br %r14 +*/ + +int +test_out_2 (int x) +{ + int y; + asm ("foo %0" : "={r2}" (y)); + return x + y; +} + +/* +** test_inout_1: +** foo %r2 +** lgfr %r2,%r2 +** br %r14 +*/ + +int +test_inout_1 (int x) +{ + asm ("foo %0" : "+{r2}" (x)); + return x; +} diff --git a/gcc/testsuite/gcc.target/s390/asm-hard-reg-2.c b/gcc/testsuite/gcc.target/s390/asm-hard-reg-2.c new file mode 100644 index 0000000..a892fe8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/asm-hard-reg-2.c @@ -0,0 +1,43 @@ +/* { dg-do compile { target { lp64 } } } */ +/* { dg-options "-O2 -march=z13 -mzarch" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ +/* { dg-final { scan-assembler {\.LC0:\n\t\.long\t1078523331\n} } } */ + + +/* +** test_float_into_gpr: +** lrl %r4,.LC0 +** foo %r4 +** br %r14 +*/ + +void +test_float_into_gpr (void) +{ + // This is the counterpart to + // register float x asm ("r4") = 3.14f; + // asm ("foo %0" :: "r" (x)); + // where the bit-pattern of 3.14f is loaded into GPR. + asm ("foo %0" :: "{r4}" (3.14f)); +} + +/* +** test_float: +** ( +** ldr %f4,%f0 +** ldr %f5,%f2 +** | +** ldr %f5,%f2 +** ldr %f4,%f0 +** ) +** aebr %f5,%f4 +** ldr %f0,%f5 +** br %r14 +*/ + +float +test_float (float x, float y) +{ + asm ("aebr %0,%1" : "+{f5}" (y) : "{f4}" (x)); + return y; +} diff --git a/gcc/testsuite/gcc.target/s390/asm-hard-reg-3.c b/gcc/testsuite/gcc.target/s390/asm-hard-reg-3.c new file mode 100644 index 0000000..5df37b5 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/asm-hard-reg-3.c @@ -0,0 +1,42 @@ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O2 -march=z13 -mzarch" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ +/* { dg-final { scan-assembler {\.LC0:\n\t\.long\t1074339512\n\t\.long\t1374389535\n} } } */ + +/* +** test_double_into_gpr: +** lgrl %r4,.LC0 +** foo %r4 +** br %r14 +*/ + +void +test_double_into_gpr (void) +{ + // This is the counterpart to + // register double x asm ("r4") = 3.14; + // asm ("foo %0" :: "r" (x)); + // where the bit-pattern of 3.14 is loaded into GPR. + asm ("foo %0" :: "{r4}" (3.14)); +} + +/* +** test_double: +** ( +** ldr %f4,%f0 +** ldr %f5,%f2 +** | +** ldr %f5,%f2 +** ldr %f4,%f0 +** ) +** adbr %f5,%f4 +** ldr %f0,%f5 +** br %r14 +*/ + +double +test_double (double x, double y) +{ + asm ("adbr %0,%1" : "+{f5}" (y) : "{f4}" (x)); + return y; +} diff --git a/gcc/testsuite/gcc.target/s390/asm-hard-reg-4.c b/gcc/testsuite/gcc.target/s390/asm-hard-reg-4.c new file mode 100644 index 0000000..29927ce --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/asm-hard-reg-4.c @@ -0,0 +1,6 @@ +/* { dg-do run { target lp64 } } */ +/* { dg-options "-O2 -march=z13 -mzarch" } */ + +/* Test TARGET_MD_ASM_ADJUST for z13 and long double. */ + +#include "asm-hard-reg-longdouble.h" diff --git a/gcc/testsuite/gcc.target/s390/asm-hard-reg-5.c b/gcc/testsuite/gcc.target/s390/asm-hard-reg-5.c new file mode 100644 index 0000000..eaf34d9 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/asm-hard-reg-5.c @@ -0,0 +1,6 @@ +/* { dg-do run { target lp64 } } */ +/* { dg-options "-O2 -march=z14 -mzarch" } */ + +/* Test TARGET_MD_ASM_ADJUST for z14 and long double. */ + +#include "asm-hard-reg-longdouble.h" diff --git a/gcc/testsuite/gcc.target/s390/asm-hard-reg-6.c b/gcc/testsuite/gcc.target/s390/asm-hard-reg-6.c new file mode 100644 index 0000000..d012966 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/asm-hard-reg-6.c @@ -0,0 +1,152 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +void +test (void) +{ + // GPRs + { + int a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p; + __asm__ __volatile__ ("%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14" + : "=r" (a), + "=r" (b), + "=r" (c), + "=r" (d), + "=r" (e), + "=r" (f), + "=r" (g), + "=r" (h), + "=r" (i), + "=r" (j), + "=r" (k), + "=r" (l), + "=r" (m), + "=r" (n), + "=r" (o)); + __asm__ __volatile__ ("%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14" + : "={r0}" (a), + "={r1}" (b), + "={r2}" (c), + "={r3}" (d), + "={r4}" (e), + "={r5}" (f), + "={r6}" (g), + "={r7}" (h), + "={r8}" (i), + "={r9}" (j), + "={r10}" (k), + "={r11}" (l), + "={r12}" (m), + "={r13}" (n), + "={r14}" (o)); + __asm__ __volatile__ ("%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15" /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + : "=r" (a), + "=r" (b), + "=r" (c), + "=r" (d), + "=r" (e), + "=r" (f), + "=r" (g), + "=r" (h), + "=r" (i), + "=r" (j), + "=r" (k), + "=r" (l), + "=r" (m), + "=r" (n), + "=r" (o), + "=r" (p)); + __asm__ __volatile__ ("%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15" /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + : "=r" (a), + "=r" (b), + "=r" (c), + "=r" (d), + "=r" (e), + "=r" (f), + "=r" (g), + "=r" (h), + "=r" (i), + "=r" (j), + "=r" (k), + "=r" (l), + "=r" (m), + "=r" (n), + "=r" (o), + "={r4}" (p)); + } + + // FPRs + { + float a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, q; + __asm__ __volatile__ ("%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15" + : "=f" (a), + "=f" (b), + "=f" (c), + "=f" (d), + "=f" (e), + "=f" (f), + "=f" (g), + "=f" (h), + "=f" (i), + "=f" (j), + "=f" (k), + "=f" (l), + "=f" (m), + "=f" (n), + "=f" (o), + "=f" (p)); + __asm__ __volatile__ ("%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15" + : "={f0}" (a), + "={f1}" (b), + "={f2}" (c), + "={f3}" (d), + "={f4}" (e), + "={f5}" (f), + "={f6}" (g), + "={f7}" (h), + "={f8}" (i), + "={f9}" (j), + "={f10}" (k), + "={f11}" (l), + "={f12}" (m), + "={f13}" (n), + "={f14}" (o), + "={f15}" (p)); + __asm__ __volatile__ ("%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15 %16" /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + : "=f" (a), + "=f" (b), + "=f" (c), + "=f" (d), + "=f" (e), + "=f" (f), + "=f" (g), + "=f" (h), + "=f" (i), + "=f" (j), + "=f" (k), + "=f" (l), + "=f" (m), + "=f" (n), + "=f" (o), + "=f" (p), + "=f" (q)); + __asm__ __volatile__ ("%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15 %16" /* { dg-error "'asm' operand has impossible constraints or there are not enough registers" } */ + : "=f" (a), + "=f" (b), + "=f" (c), + "=f" (d), + "=f" (e), + "=f" (f), + "=f" (g), + "=f" (h), + "=f" (i), + "=f" (j), + "=f" (k), + "=f" (l), + "=f" (m), + "=f" (n), + "=f" (o), + "=f" (p), + "={f4}" (q)); + } +} diff --git a/gcc/testsuite/gcc.target/s390/asm-hard-reg-7.c b/gcc/testsuite/gcc.target/s390/asm-hard-reg-7.c new file mode 100644 index 0000000..923c9d2 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/asm-hard-reg-7.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-march=z13" } */ + +/* Test register pairs. */ + +void +test (void) +{ + register double f0 __asm__ ("f0"); + register double f2 __asm__ ("f2"); + register long double f0f2 __asm__ ("f0"); + double x; + long double y; + + /* Outputs */ + __asm__ __volatile__ ("" : "=r" (f0), "=r" (f0f2)); + __asm__ __volatile__ ("" : "=r" (f0f2), "={f0}" (y)); /* { dg-error "multiple outputs to hard register: %f0" } */ + __asm__ __volatile__ ("" : "={f0}" (x), "=r" (f0f2)); /* { dg-error "multiple outputs to hard register: %f0" } */ + + __asm__ __volatile__ ("" : "=r" (f2), "=r" (f0f2)); + __asm__ __volatile__ ("" : "={f2}" (x), "={f0}" (y)); /* { dg-error "multiple outputs to hard register: %f2" } */ + __asm__ __volatile__ ("" : "=r" (f2), "={f0}" (y)); /* { dg-error "multiple outputs to hard register: %f2" } */ + __asm__ __volatile__ ("" : "={f2}" (x), "=r" (f0f2)); /* { dg-error "multiple outputs to hard register: %f2" } */ + + /* Inputs */ + __asm__ __volatile__ ("" :: "r" (f0), "r" (f0f2)); + __asm__ __volatile__ ("" :: "r" (f0f2), "{f0}" (y)); /* { dg-error "multiple inputs to hard register: %f0" } */ + __asm__ __volatile__ ("" :: "{f0}" (x), "r" (f0f2)); /* { dg-error "multiple inputs to hard register: %f0" } */ + + __asm__ __volatile__ ("" :: "r" (f2), "r" (f0f2)); + __asm__ __volatile__ ("" :: "{f2}" (x), "{f0}" (y)); /* { dg-error "multiple inputs to hard register: %f2" } */ + __asm__ __volatile__ ("" :: "r" (f2), "{f0}" (y)); /* { dg-error "multiple inputs to hard register: %f2" } */ + __asm__ __volatile__ ("" :: "{f2}" (x), "r" (f0f2)); /* { dg-error "multiple inputs to hard register: %f2" } */ +} diff --git a/gcc/testsuite/gcc.target/s390/asm-hard-reg-longdouble.h b/gcc/testsuite/gcc.target/s390/asm-hard-reg-longdouble.h new file mode 100644 index 0000000..9f4adad --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/asm-hard-reg-longdouble.h @@ -0,0 +1,18 @@ +__attribute__ ((noipa)) +long double +test_longdouble (long double x) +{ + long double y; + asm ("sqxbr\t%0,%1" : "={f4}" (y) : "{f5}" (x)); + return y; +} + +int +main (void) +{ + long double x = test_longdouble (42.L); + long double y = 6.48074069840786023096596743608799656681773277430814773408787249757445105002862106857719481922686100006103515625L; + if (x != y) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/s390/isfinite-isinf-isnormal-signbit-2.c b/gcc/testsuite/gcc.target/s390/isfinite-isinf-isnormal-signbit-2.c index 2ff5a37..e1c7806 100644 --- a/gcc/testsuite/gcc.target/s390/isfinite-isinf-isnormal-signbit-2.c +++ b/gcc/testsuite/gcc.target/s390/isfinite-isinf-isnormal-signbit-2.c @@ -3,8 +3,10 @@ #include "isfinite-isinf-isnormal-signbit.h" -/* { dg-final { scan-assembler-times {tcxb\t%f[0-9]+,1365} 1 } } SIGNBIT long double */ -/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 1 } } SIGNBIT _Decimal128 */ +/* { dg-final { scan-assembler-times {tcxb\t%f[0-9]+,1365} 0 { target lp64 } } } SIGNBIT long double */ +/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 0 { target lp64 } } } SIGNBIT _Decimal128 */ +/* { dg-final { scan-assembler-times {tcxb\t%f[0-9]+,1365} 1 { target { ! lp64 } } } } SIGNBIT long double */ +/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 1 { target { ! lp64 } } } } SIGNBIT _Decimal128 */ /* { dg-final { scan-assembler-times {tcxb\t%f[0-9]+,4032} 1 } } ISFINITE long double */ /* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,4032} 1 } } ISFINITE _Decimal128 */ /* { dg-final { scan-assembler-times {tcxb\t%f[0-9]+,48} 1 } } ISINF long double */ diff --git a/gcc/testsuite/gcc.target/s390/isfinite-isinf-isnormal-signbit-3.c b/gcc/testsuite/gcc.target/s390/isfinite-isinf-isnormal-signbit-3.c index 8f67553..5c9986d 100644 --- a/gcc/testsuite/gcc.target/s390/isfinite-isinf-isnormal-signbit-3.c +++ b/gcc/testsuite/gcc.target/s390/isfinite-isinf-isnormal-signbit-3.c @@ -3,8 +3,10 @@ #include "isfinite-isinf-isnormal-signbit.h" -/* { dg-final { scan-assembler-times {wftcixb\t%v[0-9]+,%v[0-9]+,1365} 1 } } */ -/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 1 } } */ +/* { dg-final { scan-assembler-times {wftcixb\t%v[0-9]+,%v[0-9]+,1365} 0 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 0 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {wftcixb\t%v[0-9]+,%v[0-9]+,1365} 1 { target { ! lp64 } } } } */ +/* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,1365} 1 { target { ! lp64 } } } } */ /* { dg-final { scan-assembler-times {wftcixb\t%v[0-9]+,%v[0-9]+,4032} 1 } } */ /* { dg-final { scan-assembler-times {tdcxt\t%f[0-9]+,4032} 1 } } */ /* { dg-final { scan-assembler-times {wftcixb\t%v[0-9]+,%v[0-9]+,48} 1 } } */ diff --git a/gcc/testsuite/gcc.target/s390/signbit-1.c b/gcc/testsuite/gcc.target/s390/signbit-1.c new file mode 100644 index 0000000..45f608a --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/signbit-1.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -march=z900 -save-temps" } */ +/* { dg-final { scan-assembler-times {\ttceb\t} 2 } } */ +/* { dg-final { scan-assembler-times {\ttcdb\t} 2 } } */ +/* { dg-final { scan-assembler-times {\ttcxb\t} 2 } } */ + +/* Binary Floating-Point */ + +__attribute__ ((noipa)) +int signbit_float_reg (float x) { return __builtin_signbit (x); } +__attribute__ ((noipa)) +int signbit_float_mem (float *x) { return __builtin_signbit (*x); } +__attribute__ ((noipa)) +int signbit_double_reg (double x) { return __builtin_signbit (x); } +__attribute__ ((noipa)) +int signbit_double_mem (double *x) { return __builtin_signbit (*x); } + +__attribute__ ((noipa)) +int +signbit_longdouble_reg (long double x) +{ + __asm__ ("" : "+f" (x)); + return __builtin_signbit (x); +} + +__attribute__ ((noipa)) +int signbit_longdouble_mem (long double *x) { return __builtin_signbit (*x); } + +#include "signbit.h" +TEST (float, float, __builtin_inff(), __builtin_nanf("42"), 0.f, 42.f) +TEST (double, double, __builtin_inf(), __builtin_nan("42"), 0., 42.) +TEST (longdouble, long double, __builtin_infl(), __builtin_nanl("42"), 0.L, 42.L) + +int +main (void) +{ + test_float (); + test_double (); + test_longdouble (); +} diff --git a/gcc/testsuite/gcc.target/s390/signbit-2.c b/gcc/testsuite/gcc.target/s390/signbit-2.c new file mode 100644 index 0000000..488c477 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/signbit-2.c @@ -0,0 +1,40 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -march=z9-ec -mzarch -save-temps" } */ +/* { dg-final { scan-assembler-times {\ttdcet\t} 2 } } */ +/* { dg-final { scan-assembler-times {\ttdcdt\t} 2 } } */ +/* { dg-final { scan-assembler-times {\ttdcxt\t} 2 } } */ + +/* Decimal Floating-Point */ + +__attribute__ ((noipa)) +int signbit_dec32_reg (_Decimal32 x) { return __builtin_signbit (x); } +__attribute__ ((noipa)) +int signbit_dec32_mem (_Decimal32 *x) { return __builtin_signbit (*x); } +__attribute__ ((noipa)) +int signbit_dec64_reg (_Decimal64 x) { return __builtin_signbit (x); } +__attribute__ ((noipa)) +int signbit_dec64_mem (_Decimal64 *x) { return __builtin_signbit (*x); } + +__attribute__ ((noipa)) +int +signbit_dec128_reg (_Decimal128 x) +{ + __asm__ ("" : "+f" (x)); + return __builtin_signbit (x); +} + +__attribute__ ((noipa)) +int signbit_dec128_mem (_Decimal128 *x) { return __builtin_signbit (*x); } + +#include "signbit.h" +TEST (dec32, _Decimal32, __builtin_infd32(), __builtin_nand32("42"), 0.df, 42.df) +TEST (dec64, _Decimal64, __builtin_infd64(), __builtin_nand64("42"), 0.dd, 42.dd) +TEST (dec128, _Decimal128, __builtin_infd128(), __builtin_nand128("42"), 0.dl, 42.dl) + +int +main (void) +{ + test_dec32 (); + test_dec64 (); + test_dec128 (); +} diff --git a/gcc/testsuite/gcc.target/s390/signbit-3.c b/gcc/testsuite/gcc.target/s390/signbit-3.c new file mode 100644 index 0000000..2fad58b --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/signbit-3.c @@ -0,0 +1,152 @@ +/* { dg-do run { target lp64 } } */ +/* { dg-options "-O2 -march=z10 -save-temps" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ + +/* Binary Floating-Point */ + +/* +** signbit_float_reg: +** lgdr (%r[0-9]+),%f0 +** srlg (%r[0-9]+),\1,63 +** lgfr %r2,\2 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_float_reg (float x) { return __builtin_signbit (x); } + +/* +** signbit_float_mem: +** l (%r[0-9]+),0\(%r2\) +** srl \1,31 +** lgfr %r2,\1 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_float_mem (float *x) { return __builtin_signbit (*x); } + +/* +** signbit_double_reg: +** lgdr (%r[0-9]+),%f0 +** srlg %r2,\1,63 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_double_reg (double x) { return __builtin_signbit (x); } + +/* +** signbit_double_mem: +** lg (%r[0-9]+),0\(%r2\) +** srlg %r2,\1,63 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_double_mem (double *x) { return __builtin_signbit (*x); } + +/* +** signbit_longdouble_reg: +** ld %f0,0\(%r2\) +** ld %f2,8\(%r2\) +** lgdr (%r[0-9]+),%f0 +** srlg %r2,\1,63 +** br %r14 +*/ +__attribute__ ((noipa)) +int +signbit_longdouble_reg (long double x) +{ + __asm__ ("" : "+f" (x)); + return __builtin_signbit (x); +} + +/* +** signbit_longdouble_mem: +** lg (%r[0-9]+),0\(%r2\) +** srlg %r2,\1,63 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_longdouble_mem (long double *x) { return __builtin_signbit (*x); } + +/* Decimal Floating-Point */ + +/* +** signbit_dec32_reg: +** lgdr (%r[0-9]+),%f0 +** srlg (%r[0-9]+),\1,63 +** lgfr %r2,\2 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_dec32_reg (_Decimal32 x) { return __builtin_signbit (x); } + +/* +** signbit_dec32_mem: +** l (%r[0-9]+),0\(%r2\) +** srl \1,31 +** lgfr %r2,\1 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_dec32_mem (_Decimal32 *x) { return __builtin_signbit (*x); } + +/* +** signbit_dec64_reg: +** lgdr (%r[0-9]+),%f0 +** srlg %r2,\1,63 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_dec64_reg (_Decimal64 x) { return __builtin_signbit (x); } + +/* +** signbit_dec64_mem: +** lg (%r[0-9]+),0\(%r2\) +** srlg %r2,\1,63 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_dec64_mem (_Decimal64 *x) { return __builtin_signbit (*x); } + +/* +** signbit_dec128_reg: +** ld %f0,0\(%r2\) +** ld %f2,8\(%r2\) +** lgdr (%r[0-9]+),%f0 +** srlg %r2,\1,63 +** br %r14 +*/ +__attribute__ ((noipa)) +int +signbit_dec128_reg (_Decimal128 x) +{ + __asm__ ("" : "+f" (x)); + return __builtin_signbit (x); +} + +/* +** signbit_dec128_mem: +** lg (%r[0-9]+),0\(%r2\) +** srlg %r2,\1,63 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_dec128_mem (_Decimal128 *x) { return __builtin_signbit (*x); } + +#include "signbit.h" +TEST (float, float, __builtin_inff(), __builtin_nanf("42"), 0.f, 42.f) +TEST (double, double, __builtin_inf(), __builtin_nan("42"), 0., 42.) +TEST (longdouble, long double, __builtin_infl(), __builtin_nanl("42"), 0.L, 42.L) +TEST (dec32, _Decimal32, __builtin_infd32(), __builtin_nand32("42"), 0.df, 42.df) +TEST (dec64, _Decimal64, __builtin_infd64(), __builtin_nand64("42"), 0.dd, 42.dd) +TEST (dec128, _Decimal128, __builtin_infd128(), __builtin_nand128("42"), 0.dl, 42.dl) + +int +main (void) +{ + test_float (); + test_double (); + test_longdouble (); + test_dec32 (); + test_dec64 (); + test_dec128 (); +} diff --git a/gcc/testsuite/gcc.target/s390/signbit-4.c b/gcc/testsuite/gcc.target/s390/signbit-4.c new file mode 100644 index 0000000..2cb743e --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/signbit-4.c @@ -0,0 +1,55 @@ +/* { dg-do run { target lp64 } } */ +/* { dg-require-effective-target s390_vx } */ +/* { dg-options "-O2 -march=z13 -save-temps" } */ +/* { dg-final { check-function-bodies "**" "" "" } } */ + +/* Binary Floating-Point */ + +/* +** signbit_float_reg: +** vlgvf (%r[0-9]+),%v0,0 +** risbgn %r2,\1,64-1,128\+63,32\+1 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_float_reg (float x) { return __builtin_signbit (x); } + +/* +** signbit_float_mem: +** l (%r[0-9]+),0\(%r2\) +** risbgn %r2,\1,64-1,128\+63,32\+1 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_float_mem (float *x) { return __builtin_signbit (*x); } + +/* Decimal Floating-Point */ + +/* +** signbit_dec32_reg: +** vlgvf (%r[0-9]+),%v0,0 +** risbgn %r2,\1,64-1,128\+63,32\+1 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_dec32_reg (_Decimal32 x) { return __builtin_signbit (x); } + +/* +** signbit_dec32_mem: +** l (%r[0-9]+),0\(%r2\) +** risbgn %r2,\1,64-1,128\+63,32\+1 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_dec32_mem (_Decimal32 *x) { return __builtin_signbit (*x); } + +#include "signbit.h" +TEST (float, float, __builtin_inff(), __builtin_nanf("42"), 0.f, 42.f) +TEST (dec32, _Decimal32, __builtin_infd32(), __builtin_nand32("42"), 0.df, 42.df) + +int +main (void) +{ + test_float (); + test_dec32 (); +} diff --git a/gcc/testsuite/gcc.target/s390/signbit-5.c b/gcc/testsuite/gcc.target/s390/signbit-5.c new file mode 100644 index 0000000..6840327 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/signbit-5.c @@ -0,0 +1,35 @@ +/* { dg-do run { target lp64 } } */ +/* { dg-options "-O2 -march=z14 -save-temps" } */ + +/* +** signbit_longdouble_reg: +** ld %f0,0(%r2);ld %f2,8+0(%r2) +** lgdr (%r[0-9]+),%f0 +** srlg %r2,\1,63 +** br %r14 +*/ +__attribute__ ((noipa)) +int +signbit_longdouble_reg (long double x) +{ + __asm__ ("" : "+f" (x)); + return __builtin_signbit (x); +} + +/* +** signbit_longdouble_mem: +** lg (%r[0-9]+),0\(%r2\) +** srlg %r2,\1,63 +** br %r14 +*/ +__attribute__ ((noipa)) +int signbit_longdouble_mem (long double *x) { return __builtin_signbit (*x); } + +#include "signbit.h" +TEST (longdouble, long double, __builtin_infl(), __builtin_nanl("42"), 0.L, 42.L) + +int +main (void) +{ + test_longdouble (); +} diff --git a/gcc/testsuite/gcc.target/s390/signbit.h b/gcc/testsuite/gcc.target/s390/signbit.h new file mode 100644 index 0000000..730e387 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/signbit.h @@ -0,0 +1,36 @@ +#define TEST(T, U, I, N, C0, C42) \ + void test_##T (void) \ + { \ + U tmp; \ + int x; \ + \ + x = signbit_##T##_reg(C42); \ + x += signbit_##T##_reg(C0); \ + x += signbit_##T##_reg(I); \ + x += signbit_##T##_reg(N); \ + tmp = C42; \ + x += signbit_##T##_mem(&tmp); \ + tmp = C0; \ + x += signbit_##T##_mem(&tmp); \ + tmp = I; \ + x += signbit_##T##_mem(&tmp); \ + tmp = N; \ + x += signbit_##T##_mem(&tmp); \ + if (x != 0) \ + __builtin_abort(); \ + \ + x = signbit_##T##_reg(-C42); \ + x += signbit_##T##_reg(-C0); \ + x += signbit_##T##_reg(-I); \ + x += signbit_##T##_reg(-N); \ + tmp = -C42; \ + x += signbit_##T##_mem(&tmp); \ + tmp = -C0; \ + x += signbit_##T##_mem(&tmp); \ + tmp = -I; \ + x += signbit_##T##_mem(&tmp); \ + tmp = -N; \ + x += signbit_##T##_mem(&tmp); \ + if (x != 8) \ + __builtin_abort(); \ + } diff --git a/gcc/testsuite/gcc.target/s390/spaceship-fp-1.c b/gcc/testsuite/gcc.target/s390/spaceship-fp-1.c new file mode 100644 index 0000000..56c3d77 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/spaceship-fp-1.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O2 -mzarch -march=z13 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, 2\)} 3 optimized } } */ +/* { dg-final { scan-assembler-times {\tk[edx]br\t} 3 } } */ +/* { dg-final { scan-assembler-not {\tbrc} } } */ +/* { dg-final { scan-assembler-not {\tc[edx]br\t} } } */ + +#define TEST(T, U) \ + int test_##U (T x, T y) \ + { \ + if (x == y) \ + return 0; \ + else if (x < y) \ + return -1; \ + else if (x > y) \ + return 1; \ + else \ + return 2; \ + } + +TEST (float, float) +TEST (double, double) +TEST (long double, longdouble) diff --git a/gcc/testsuite/gcc.target/s390/spaceship-fp-2.c b/gcc/testsuite/gcc.target/s390/spaceship-fp-2.c new file mode 100644 index 0000000..0c6e6b6 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/spaceship-fp-2.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O2 -mzarch -march=z13 -ffinite-math-only -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, 2\)} 3 optimized } } */ +/* { dg-final { scan-assembler-times {\tc[edx]br\t} 3 } } */ +/* { dg-final { scan-assembler-not {\tbrc} } } */ +/* { dg-final { scan-assembler-not {\tk[edx]br\t} } } */ + +#define TEST(T, U) \ + int test_##U (T x, T y) \ + { \ + if (x == y) \ + return 0; \ + else if (x < y) \ + return -1; \ + else if (x > y) \ + return 1; \ + else \ + return 2; \ + } + +TEST (float, float) +TEST (double, double) +TEST (long double, longdouble) diff --git a/gcc/testsuite/gcc.target/s390/spaceship-fp-3.c b/gcc/testsuite/gcc.target/s390/spaceship-fp-3.c new file mode 100644 index 0000000..2f567d1 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/spaceship-fp-3.c @@ -0,0 +1,23 @@ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O2 -mzarch -march=z13 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, 42\)} 3 optimized } } */ +/* { dg-final { scan-assembler-times {\tk[edx]br\t} 3 } } */ +/* { dg-final { scan-assembler-not {\tbrc} } } */ +/* { dg-final { scan-assembler-not {\tc[edx]br\t} } } */ + +#define TEST(T, U) \ + int test_##U (T x, T y) \ + { \ + if (x == y) \ + return 0; \ + else if (x < y) \ + return -1; \ + else if (x > y) \ + return 1; \ + else \ + return 42; \ + } + +TEST (float, float) +TEST (double, double) +TEST (long double, longdouble) diff --git a/gcc/testsuite/gcc.target/s390/spaceship-fp-4.c b/gcc/testsuite/gcc.target/s390/spaceship-fp-4.c new file mode 100644 index 0000000..4531ecb --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/spaceship-fp-4.c @@ -0,0 +1,53 @@ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O2 -mzarch -march=z13 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, 0\)} 3 optimized } } */ +/* { dg-final { scan-assembler-times {\tk[edx]br\t} 3 } } */ +/* { dg-final { scan-assembler-not {\tloc} } } */ +/* { dg-final { scan-assembler-not {\tbrc} } } */ +/* { dg-final { scan-assembler-not {\tc[edx]br\t} } } */ + +/* By time of writing this we emit + + kebr %f0,%f2 + jo .L2 + je .L3 + jnh .L10 + jg f3@PLT +.L10: + jg f2@PLT +.L3: + jg f1@PLT +.L2: + jg f4@PLT + + which is not optimal. Instead we could fold the conditional branch with the + unconditional into something along the lines + + kebr %f0,%f2 + jo f4@PLT + je f1@PLT + jnh f2@PLT + jg f3@PLT +*/ + +void f1 (void); +void f2 (void); +void f3 (void); +void f4 (void); + +#define TEST(T, U) \ + void test_##U (T x, T y) \ + { \ + if (x == y) \ + f1 (); \ + else if (x < y) \ + f2 (); \ + else if (x > y) \ + f3 (); \ + else \ + f4 (); \ + } + +TEST (float, float) +TEST (double, double) +TEST (long double, longdouble) diff --git a/gcc/testsuite/gcc.target/s390/spaceship-int-1.c b/gcc/testsuite/gcc.target/s390/spaceship-int-1.c new file mode 100644 index 0000000..8ca2677 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/spaceship-int-1.c @@ -0,0 +1,30 @@ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O2 -mzarch -march=z13 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, -1\)} 4 optimized } } */ +/* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, 1\)} 5 optimized } } */ +/* { dg-final { scan-assembler-times {\tlhi} 9 } } */ +/* { dg-final { scan-assembler-times {\tloc} 18 } } */ + +#define TEST(T, U) \ + int test_##U (T x, T y) \ + { \ + if (x == y) \ + return 0; \ + else if (x < y) \ + return -1; \ + else \ + return 1; \ + } + +TEST(signed char, schar) +TEST(unsigned char, uchar) +TEST(char, char) + +TEST(short, sshort) +TEST(unsigned short, ushort) + +TEST(int, sint) +TEST(unsigned int, uint) + +TEST(long, slong) +TEST(unsigned long, ulong) diff --git a/gcc/testsuite/gcc.target/s390/spaceship-int-2.c b/gcc/testsuite/gcc.target/s390/spaceship-int-2.c new file mode 100644 index 0000000..5f7975c --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/spaceship-int-2.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2 -mzarch -march=z13 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, -1\)} 1 optimized } } */ +/* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, 1\)} 1 optimized } } */ +/* { dg-final { scan-assembler-times {\tvecg} 1 } } */ +/* { dg-final { scan-assembler-times {\tveclg} 1 } } */ +/* { dg-final { scan-assembler-times {\tvchlgs} 2 } } */ +/* { dg-final { scan-assembler-times {\tvceqgs} 2 } } */ +/* { dg-final { scan-assembler-times {\tlhi} 2 } } */ +/* { dg-final { scan-assembler-times {\tloc} 4 } } */ + +#define TEST(T, U) \ + int test_##U (T x, T y) \ + { \ + if (x == y) \ + return 0; \ + else if (x < y) \ + return -1; \ + else \ + return 1; \ + } + +TEST(__int128, sint128) +TEST(unsigned __int128, uint128) diff --git a/gcc/testsuite/gcc.target/s390/spaceship-int-3.c b/gcc/testsuite/gcc.target/s390/spaceship-int-3.c new file mode 100644 index 0000000..46b0e4a --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/spaceship-int-3.c @@ -0,0 +1,21 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2 -march=z17 -fdump-tree-optimized" } */ +/* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, -1\)} 1 optimized } } */ +/* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, 1\)} 1 optimized } } */ +/* { dg-final { scan-assembler-times {\tvecq\t} 1 } } */ +/* { dg-final { scan-assembler-times {\tveclq\t} 1 } } */ +/* { dg-final { scan-assembler-times {\tloc} 4 } } */ + +#define TEST(T, U) \ + int test_##U (T x, T y) \ + { \ + if (x == y) \ + return 0; \ + else if (x < y) \ + return -1; \ + else \ + return 1; \ + } + +TEST(__int128, sint128) +TEST(unsigned __int128, uint128) diff --git a/gcc/testsuite/gcc.target/s390/vector/reduc-binops-1.c b/gcc/testsuite/gcc.target/s390/vector/reduc-binops-1.c new file mode 100644 index 0000000..efd3294 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/reduc-binops-1.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=z13 -ftree-vectorize -fdump-tree-optimized" } */ + +#define T(X,N) \ + unsigned X \ + reduce_and_##X (unsigned X *in) \ + { \ + unsigned X acc = (unsigned X)-1; \ + for (int i = 0; i < N; i++) \ + acc &= in[i]; \ + return acc; \ + } \ + unsigned X \ + reduce_ior_##X (unsigned X *in) \ + { \ + unsigned X acc = 0; \ + for (int i = 0; i < N; i++) \ + acc |= in[i]; \ + return acc; \ + } \ + unsigned X \ + redue_xor_##X (unsigned X *in) \ + { \ + unsigned X acc = 0; \ + for (int i = 0; i < N; i++) \ + acc ^= in[i]; \ + return acc; \ + } + +T(char,16) + +T(short, 8) + +T(int,4) + +T(long,4) + +/* { dg-final { scan-tree-dump-times "\.REDUC_AND" 4 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\.REDUC_IOR" 4 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\.REDUC_XOR" 4 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/reduc-minmax-1.c b/gcc/testsuite/gcc.target/s390/vector/reduc-minmax-1.c new file mode 100644 index 0000000..5295250 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/reduc-minmax-1.c @@ -0,0 +1,234 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=z14 -ftree-vectorize -fdump-tree-optimized" } */ + +#define MAX(a, b) ((a) > (b) ? (a) : (b)) +#define MIN(a, b) ((a) > (b) ? (b) : (a)) + +/* unsigned integers */ + +unsigned char +reduce_umax_char (unsigned char *p) +{ + unsigned char res = p[0]; + for (int i = 0; i < 16; i++) + res = MAX (res, p[i]); + return res; +} + +unsigned char +reduce_umin_char (unsigned char *p) +{ + unsigned char res = p[0]; + for (int i = 0; i < 16; i++) + res = MIN (res, p[i]); + return res; +} + +unsigned short +reduce_umax_short (unsigned short *p) +{ + unsigned short res = p[0]; + for (int i = 0; i < 8; i++) + res = MAX (res, p[i]); + return res; +} + +unsigned short +reduce_umin_short (unsigned short *p) +{ + unsigned short res = p[0]; + for (int i = 0; i < 8; i++) + res = MIN (res, p[i]); + return res; +} + +unsigned int +reduce_umax_int (unsigned int* p) +{ + unsigned int res = p[0]; + for (int i = 0; i != 4; i++) + res = MAX (res, p[i]); + return res; +} + +unsigned int +reduce_umin_int (unsigned int* p) +{ + unsigned int res = p[0]; + for (int i = 0; i != 4; i++) + res = MIN(res, p[i]); + return res; +} + +unsigned long +reduce_umax_long (unsigned long* p) +{ + unsigned long res = p[0]; + for (int i = 0; i != 4; i++) + res = MAX (res, p[i]); + return res; +} + +unsigned long +reduce_umin_long (unsigned long* p) +{ + unsigned long res = p[0]; + for (int i = 0; i != 4; i++) + res = MIN(res, p[i]); + return res; +} + +/* signed integers */ + +signed char +reduce_smax_char (signed char *p) +{ + signed char res = p[0]; + for (int i = 0; i < 16; i++) + res = MAX (res, p[i]); + return res; +} + +signed char +reduce_smin_char (signed char *p) +{ + signed char res = p[0]; + for (int i = 0; i < 16; i++) + res = MIN (res, p[i]); + return res; +} + +signed short +reduce_smax_short (signed short *p) +{ + signed short res = p[0]; + for (int i = 0; i < 8; i++) + res = MAX (res, p[i]); + return res; +} + +signed short +reduce_smin_short (signed short *p) +{ + signed short res = p[0]; + for (int i = 0; i < 8; i++) + res = MIN (res, p[i]); + return res; +} + +signed int +reduce_smax_int (signed int* p) +{ + signed int res = p[0]; + for (int i = 0; i != 4; i++) + res = MAX (res, p[i]); + return res; +} + +signed int +reduce_smin_int (signed int* p) +{ + signed int res = p[0]; + for (int i = 0; i != 4; i++) + res = MIN(res, p[i]); + return res; +} + +signed long +reduce_smax_long (signed long* p) +{ + signed long res = p[0]; + for (int i = 0; i != 4; i++) + res = MAX (res, p[i]); + return res; +} + +signed long +reduce_smin_long (signed long* p) +{ + signed long res = p[0]; + for (int i = 0; i != 4; i++) + res = MIN(res, p[i]); + return res; +} + +float +__attribute__((optimize("Ofast"))) +reduce_smax_float (float* p) +{ + float res = p[0]; + for (int i = 0; i != 4; i++) + res = MAX (res, p[i]); + return res; +} + +float +__attribute__((optimize("Ofast"))) +reduce_smin_float (float* p) +{ + float res = p[0]; + for (int i = 0; i != 4; i++) + res = MIN (res, p[i]); + return res; +} + +double +__attribute__((optimize("Ofast"))) +reduce_smax_double (double* p) +{ + double res = p[0]; + for (int i = 0; i != 4; i++) + res = MAX (res, p[i]); + return res; +} + +double +__attribute__((optimize("Ofast"))) +reduce_smin_double (double* p) +{ + double res = p[0]; + for (int i = 0; i != 4; i++) + res = MIN (res, p[i]); + return res; +} + +float +reduce_fmax_float (float* p) +{ + float res = p[0]; + for (int i = 0; i != 4; i++) + res = __builtin_fmaxf (res, p[i]); + return res; +} + +float +reduce_fmin_float (float* p) +{ + float res = p[0]; + for (int i = 0; i != 4; i++) + res = __builtin_fminf (res, p[i]); + return res; +} + +double +reduce_fmax_double (double* p) +{ + double res = p[0]; + for (int i = 0; i != 4; i++) + res = __builtin_fmax (res, p[i]); + return res; +} + +double +reduce_fmin_double (double* p) +{ + double res = p[0]; + for (int i = 0; i != 4; i++) + res = __builtin_fmin (res, p[i]); + return res; +} + +/* { dg-final { scan-tree-dump-times "\.REDUC_MAX" 10 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\.REDUC_MIN" 10 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\.REDUC_FMAX" 2 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\.REDUC_FMIN" 2 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/reduc-plus-1.c b/gcc/testsuite/gcc.target/s390/vector/reduc-plus-1.c new file mode 100644 index 0000000..12cdd5f --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/reduc-plus-1.c @@ -0,0 +1,152 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mzarch -march=z14 -ftree-vectorize -fdump-tree-optimized" } */ +/* { dg-do run { target { s390_z14_hw } } } */ + +/* signed integers */ + +signed char +__attribute__((noipa, optimize("Ofast"))) +reduce_add_char (signed char* p) +{ + signed char sum = 0; + for (int i = 0; i != 16; i++) + sum += p[i]; + return sum; +} + +short +__attribute__((noipa, optimize("Ofast"))) +reduce_add_short (short* p) +{ + short sum = 0; + for (int i = 0; i != 16; i++) + sum += p[i]; + return sum; +} + +int +__attribute__((noipa, optimize("Ofast"))) +reduce_add_int (int* p) +{ + int sum = 0; + for (int i = 0; i != 16; i++) + sum += p[i]; + return sum; +} + +long +__attribute__((noipa, optimize("Ofast"))) +reduce_add_long (long* p) +{ + long sum = 0; + for (int i = 0; i != 16; i++) + sum += p[i]; + return sum; +} + +/* unsigned integers */ + +unsigned char +__attribute__((noipa, optimize("Ofast"))) +reduce_add_uchar (unsigned char* p) +{ + unsigned char sum = 0; + for (int i = 0; i != 16; i++) + sum += p[i]; + return sum; +} + +unsigned short +__attribute__((noipa, optimize("Ofast"))) +reduce_add_ushort (unsigned short* p) +{ + unsigned short sum = 0; + for (int i = 0; i != 16; i++) + sum += p[i]; + return sum; +} + +unsigned int +__attribute__((noipa, optimize("Ofast"))) +reduce_add_uint (unsigned int* p) +{ + unsigned int sum = 0; + for (int i = 0; i != 16; i++) + sum += p[i]; + return sum; +} + +unsigned long +__attribute__((noipa, optimize("Ofast"))) +reduce_add_ulong (unsigned long* p) +{ + unsigned long sum = 0; + for (int i = 0; i != 16; i++) + sum += p[i]; + return sum; +} + +/* floating point */ + +float +__attribute__((noipa, optimize("Ofast"))) +reduce_add_float (float* p) +{ + float sum = 0; + for (int i = 0; i != 16; i++) + sum += p[i]; + return sum; +} + +double +__attribute__((noipa, optimize("Ofast"))) +reduce_add_double (double* p) +{ + double sum = 0; + for (int i = 0; i != 16; i++) + sum += p[i]; + return sum; +} + +int +main() +{ + signed char chararr[] = {-1,-2,-3,-4,-5,-6,-7,-8,-9,-10,-11,-12,-13,-14,-15,-16}; + signed short shortarr[] = {-1,-2,-3,-4,-5,-6,-7,-8,-9,-10,-11,-12,-13,-14,-15,-16}; + signed int intarr[] = {-1,-2,-3,-4,-5,-6,-7,-8,-9,-10,-11,-12,-13,-14,-15,-16}; + signed long longarr[] = {-1,-2,-3,-4,-5,-6,-7,-8,-9,-10,-11,-12,-13,-14,-15,-16}; + + unsigned char uchararr[] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}; + unsigned short ushortarr[] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}; + unsigned int uintarr[] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}; + unsigned long ulongarr[] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}; + + float floatarr[] = {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}; + double doublearr[] = {-1,-2,-3,-4,-5,-6,-7,-8,-9,-10,-11,-12,-13,-14,-15,-16}; + + if (reduce_add_char (chararr) != (-136 & 0xff)) + __builtin_abort(); + if (reduce_add_short (shortarr) != -136) + __builtin_abort(); + if (reduce_add_int (intarr) != -136) + __builtin_abort(); + if (reduce_add_long (longarr) != -136) + __builtin_abort(); + + if (reduce_add_uchar (uchararr) != 136) + __builtin_abort(); + if (reduce_add_ushort (ushortarr) != 136) + __builtin_abort(); + if (reduce_add_uint (uintarr) != 136) + __builtin_abort(); + if (reduce_add_ulong (ulongarr) != 136) + __builtin_abort(); + + if (reduce_add_float (floatarr) != 136) + __builtin_abort(); + if (reduce_add_double (doublearr) != -136) + __builtin_abort(); + return 0; +} + +/* { dg-final { scan-tree-dump-times "\.REDUC_PLUS" 10 "optimized" } } */ diff --git a/gcc/testsuite/gcc.target/s390/vector/vlgv-zero-extend-1.c b/gcc/testsuite/gcc.target/s390/vector/vlgv-zero-extend-1.c new file mode 100644 index 0000000..11df6c1 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/vlgv-zero-extend-1.c @@ -0,0 +1,71 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target s390_vx } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { scan-assembler-not {\tllg?[fhc]r\t} } } */ + +typedef unsigned char __attribute__ ((vector_size (1))) V1QI; +typedef unsigned char __attribute__ ((vector_size (2))) V2QI; +typedef unsigned char __attribute__ ((vector_size (4))) V4QI; +typedef unsigned char __attribute__ ((vector_size (8))) V8QI; +typedef unsigned char __attribute__ ((vector_size (16))) V16QI; + +typedef unsigned short __attribute__ ((vector_size (2))) V1HI; +typedef unsigned short __attribute__ ((vector_size (4))) V2HI; +typedef unsigned short __attribute__ ((vector_size (8))) V4HI; +typedef unsigned short __attribute__ ((vector_size (16))) V8HI; + +typedef unsigned int __attribute__ ((vector_size (4))) V1SI; +typedef unsigned int __attribute__ ((vector_size (8))) V2SI; +typedef unsigned int __attribute__ ((vector_size (16))) V4SI; + +unsigned short ushort; +unsigned int uint; + +#define TEST(T, U, I) \ + unsigned T test_ ## I ## _ ## U (U x) { return x[I]; } \ + void test_ ## I ## _ ## U ## _ushort (U x) { ushort = x[I]; } \ + void test_ ## I ## _ ## U ## _uint (U x) { uint = x[I]; } + +#define TEST1(T, U) \ + TEST(T, U, 0) + +#define TEST2(T, U) \ + TEST1 (T, U) \ + TEST(T, U, 1) + +#define TEST4(T, U) \ + TEST2 (T, U) \ + TEST(T, U, 2) \ + TEST(T, U, 3) + +#define TEST8(T, U) \ + TEST4 (T, U) \ + TEST(T, U, 4) \ + TEST(T, U, 5) \ + TEST(T, U, 6) \ + TEST(T, U, 7) + +#define TEST16(T, U) \ + TEST8 (T, U) \ + TEST(T, U, 9) \ + TEST(T, U, 10) \ + TEST(T, U, 11) \ + TEST(T, U, 12) \ + TEST(T, U, 13) \ + TEST(T, U, 14) \ + TEST(T, U, 15) + +TEST1 (char, V1QI) +TEST2 (char, V2QI) +TEST4 (char, V4QI) +TEST8 (char, V8QI) +TEST16 (char, V16QI) + +TEST1 (short, V1HI) +TEST2 (short, V2HI) +TEST4 (short, V4HI) +TEST8 (short, V8HI) + +TEST1 (int, V1SI) +TEST2 (int, V2SI) +TEST4 (int, V4SI) diff --git a/gcc/testsuite/gfortran.dg/array_constructor_58.f90 b/gcc/testsuite/gfortran.dg/array_constructor_58.f90 new file mode 100644 index 0000000..1473be0 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/array_constructor_58.f90 @@ -0,0 +1,17 @@ +!{ dg-do run } + +! Contributed by Federico Perini <federico.perini@gmail.com> +! Check that PR fortran/119106 is fixed. + +program char_param_array +implicit none +character, parameter :: p(5) = ['1','2','3','4','5'] +character, save :: n(5) = ['1','2','3','4','5'] +integer :: i(10), j + +i = 4 +if (any([(n(i(j)),j=1,10)] /= '4')) stop 1 ! OK +if (any([(p(i(j)),j=1,10)] /= '4')) stop 2 ! used to runtime out-of-bounds error + +end program char_param_array + diff --git a/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90 b/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90 index 45eafac..a0c5507 100644 --- a/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90 +++ b/gcc/testsuite/gfortran.dg/asan/array_constructor_1.f90 @@ -9,6 +9,8 @@ program grow_type_array type(container), allocatable :: list(:) + allocate(list(0)) + list = [list, new_elem(5)] deallocate(list) diff --git a/gcc/testsuite/gfortran.dg/assign_13.f90 b/gcc/testsuite/gfortran.dg/assign_13.f90 new file mode 100644 index 0000000..262ade0 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/assign_13.f90 @@ -0,0 +1,25 @@ +! { dg-do run } +! +! PR fortran/121185 +! The assignment to Y%X in CHECK_T was using a polymorphic array access on the +! left hand side, using the virtual table of Y. + +program p + implicit none + type t + complex, allocatable :: x(:) + end type t + real :: trace = 2. + type(t) :: z + z%x = [1,2] * trace + call check_t (z) +contains + subroutine check_t (y) + class(t) :: y + ! print *, y% x + if (any(y%x /= [2., 4.])) error stop 11 + y%x = y%x / trace + ! print *, y% x + if (any(y%x /= [1., 2.])) error stop 12 + end subroutine +end diff --git a/gcc/testsuite/gfortran.dg/assign_14.f90 b/gcc/testsuite/gfortran.dg/assign_14.f90 new file mode 100644 index 0000000..33b46b9 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/assign_14.f90 @@ -0,0 +1,24 @@ +! { dg-do compile } +! { dg-additional-options {-fdump-tree-original} } +! +! PR fortran/121185 +! Check that an intermediary variable is used to reference component a. +! { dg-final { scan-tree-dump-not {->b->a} original } } + +program p + implicit none + type t + integer, allocatable :: a(:) + end type t + type u + type(t), allocatable :: b + end type u + type v + type(u), allocatable :: c + end type v + type(v) :: z + z%c = u() + z%c%b = t() + z%c%b%a = [1,2] + z%c%b%a = z%c%b%a * 2 +end diff --git a/gcc/testsuite/gfortran.dg/associate_75.f90 b/gcc/testsuite/gfortran.dg/associate_75.f90 new file mode 100644 index 0000000..c7c461a --- /dev/null +++ b/gcc/testsuite/gfortran.dg/associate_75.f90 @@ -0,0 +1,50 @@ +! { dg-do run } +! +! Test fix for PR121060. +! +! Contributed by Damian Rouson <damian@archaeologic.codes> +! +module subdomain_m + implicit none + + type subdomain_t + real :: s_ = 99. + contains + generic :: operator(.laplacian.) => laplacian + procedure laplacian + end type + +contains + + function laplacian(rhs) + class(subdomain_t), intent(in) :: rhs + type(subdomain_t) laplacian + laplacian%s_ = rhs%s_ + 42 + end function + +end module + + use subdomain_m + implicit none + + type operands_t + real :: s_ + end type + + type(subdomain_t) phi + type(operands_t) operands + + associate(laplacian_phi => .laplacian. phi) ! ICE because specific not found. + operands = approximates(laplacian_phi%s_) + end associate + + if (int (operands%s_) /= 42) stop 1 +contains + + function approximates(actual) + real actual + type(operands_t) approximates + approximates%s_ = actual - 99 + end function + +end diff --git a/gcc/testsuite/gfortran.dg/class_elemental_1.f90 b/gcc/testsuite/gfortran.dg/class_elemental_1.f90 new file mode 100644 index 0000000..547ae98 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/class_elemental_1.f90 @@ -0,0 +1,35 @@ +! { dg-do run } +! +! PR fortran/121342 +! The polymorphic function result as actual argument used to force the loop +! bounds around the elemental call, altering access to the other arrays. + +program p + implicit none + type :: t + integer :: i + end type + type :: u + integer :: i, a + end type + type(u) :: accum(5) + integer :: a(3:7), k + a = [ (k*k, k=1,5) ] + call s(accum, f(), a) + ! print *, accum%i + ! print *, accum%a + if (any(accum%i /= accum%a)) error stop 1 +contains + elemental subroutine s(l, c, a) + type(u) , intent(out) :: l + class(t) , intent(in) :: c + integer , intent(in) :: a + l%i = c%i + l%a = a + end subroutine + function f() + class(t), allocatable :: f(:) + allocate(f(-1:3)) + f%i = [ (k*k, k=1,5) ] + end function +end program diff --git a/gcc/testsuite/gfortran.dg/function_charlen_4.f90 b/gcc/testsuite/gfortran.dg/function_charlen_4.f90 new file mode 100644 index 0000000..ed39aca --- /dev/null +++ b/gcc/testsuite/gfortran.dg/function_charlen_4.f90 @@ -0,0 +1,34 @@ +! { dg-do run } +! { dg-options "-O2 -std=legacy -fdump-tree-optimized" } +! +! PR fortran/121203 - fix passing of character length of function to procedure + +program p + character(10), external :: f + call eval (f,"abc") + call eval2(f,"abc") +contains + subroutine eval2(func,c_arg) + character(*) c_arg + character(*) func + external func + ! These tests should get optimized: + if (len (c_arg) /= 3) stop 1 + if (len (func(c_arg)) /= 10) stop 2 + end subroutine +end + +character(10) function f(arg) + character(*) arg + f=arg +end + +subroutine eval(func,c_arg) + character(*) c_arg + character(*) func + external func + if (len (c_arg) /= 3) error stop 3 + if (len (func(c_arg)) /= 10) error stop 4 +end subroutine + +! { dg-final { scan-tree-dump-not "_gfortran_stop_numeric" "optimized" } } diff --git a/gcc/testsuite/gfortran.dg/goacc/parameter-3.f90 b/gcc/testsuite/gfortran.dg/goacc/parameter-3.f90 new file mode 100644 index 0000000..2c8aa61 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc/parameter-3.f90 @@ -0,0 +1,16 @@ +! { dg-do compile } + +subroutine x + integer :: var + integer, parameter :: ilog = 0 + integer, parameter :: array(*) = [11,22,33] + !$ACC DECLARE COPYIN(ilog, array, var, array) ! { dg-error "Symbol 'array' present on multiple clauses" } +end subroutine x + +integer :: a +integer, parameter :: b = 4 +integer, parameter :: c(*) = [1,2,3] + +!$acc parallel copy(a,c,b,c) ! { dg-error "Symbol 'c' present on multiple clauses" } +!$acc end parallel +end diff --git a/gcc/testsuite/gfortran.dg/goacc/parameter-4.f90 b/gcc/testsuite/gfortran.dg/goacc/parameter-4.f90 new file mode 100644 index 0000000..aadd7cf --- /dev/null +++ b/gcc/testsuite/gfortran.dg/goacc/parameter-4.f90 @@ -0,0 +1,26 @@ +! { dg-do compile } +! { dg-additional-options "-fdump-tree-original" } + +subroutine x + integer :: var + integer, parameter :: ilog = 0 + integer, parameter :: array(*) = [11,22,33] + !$ACC DECLARE COPYIN(ilog, array, var) +end subroutine x + +integer :: a +integer, parameter :: b = 4 +integer, parameter :: c(*) = [1,2,3] + +!$acc parallel copy(a,c,b) + a = c(2) + b +!$acc end parallel + +!$acc parallel firstprivate(a,c,b) + a = c(2) + b +!$acc end parallel +end + +! { dg-final { scan-tree-dump-times "#pragma acc data map\\(to:var\\)" 1 "original" } } +! { dg-final { scan-tree-dump-times "#pragma acc parallel map\\(tofrom:a\\)" 1 "original" } } +! { dg-final { scan-tree-dump-times "#pragma acc parallel firstprivate\\(a\\)" 1 "original" } } diff --git a/gcc/testsuite/gfortran.dg/goacc/parameter.f95 b/gcc/testsuite/gfortran.dg/goacc/parameter.f95 index b581338..a9bde4a 100644 --- a/gcc/testsuite/gfortran.dg/goacc/parameter.f95 +++ b/gcc/testsuite/gfortran.dg/goacc/parameter.f95 @@ -1,4 +1,5 @@ ! { dg-do compile } +! { dg-additional-options "-Wsurprising" } module test contains @@ -6,37 +7,37 @@ contains implicit none integer :: i integer, parameter :: a = 1 - !$acc declare device_resident (a) ! { dg-error "is not a variable" } - !$acc data copy (a) ! { dg-error "not a variable" } + !$acc declare device_resident (a) ! (no warning here - for semi-good reasons) + !$acc data copy (a) ! { dg-warning "Clause for object 'a' at .1. is ignored as parameters need not be copied \\\[-Wsurprising\\\]" } !$acc end data - !$acc data deviceptr (a) ! { dg-error "not a variable" } + !$acc data deviceptr (a) ! { dg-warning "Clause for object 'a' at .1. is ignored as parameters need not be copied \\\[-Wsurprising\\\]" } !$acc end data - !$acc parallel private (a) ! { dg-error "not a variable" } + !$acc parallel private (a) ! { dg-warning "Clause for object 'a' at .1. is ignored as it is a parameter \\\[-Wsurprising\\\]" } !$acc end parallel - !$acc serial private (a) ! { dg-error "not a variable" } + !$acc serial private (a) ! { dg-warning "Clause for object 'a' at .1. is ignored as it is a parameter \\\[-Wsurprising\\\]" } !$acc end serial - !$acc host_data use_device (a) ! { dg-error "not a variable" } + !$acc host_data use_device (a) ! { dg-warning "Clause for object 'a' at .1. is ignored as it is a parameter \\\[-Wsurprising\\\]" } !$acc end host_data - !$acc parallel loop reduction(+:a) ! { dg-error "not a variable" } + !$acc parallel loop reduction(+:a) ! { dg-warning "Clause for object 'a' at .1. is ignored as it is a parameter \\\[-Wsurprising\\\]" } do i = 1,5 enddo !$acc end parallel loop - !$acc serial loop reduction(+:a) ! { dg-error "not a variable" } + !$acc serial loop reduction(+:a) ! { dg-warning "Clause for object 'a' at .1. is ignored as it is a parameter \\\[-Wsurprising\\\]" } do i = 1,5 enddo !$acc end serial loop !$acc parallel loop do i = 1,5 - !$acc cache (a) ! { dg-error "not a variable" } + !$acc cache (a) ! { dg-warning "Clause for object 'a' at .1. is ignored as it is a parameter \\\[-Wsurprising\\\]" } enddo !$acc end parallel loop !$acc serial loop do i = 1,5 - !$acc cache (a) ! { dg-error "not a variable" } + !$acc cache (a) ! { dg-warning "Clause for object 'a' at .1. is ignored as it is a parameter \\\[-Wsurprising\\\]" } enddo !$acc end serial loop - !$acc update device (a) ! { dg-error "not a variable" } - !$acc update host (a) ! { dg-error "not a variable" } - !$acc update self (a) ! { dg-error "not a variable" } + !$acc update device (a) ! { dg-warning "Clause for object 'a' at .1. is ignored as parameters need not be copied \\\[-Wsurprising\\\]" } + !$acc update host (a) ! { dg-warning "Clause for object 'a' at .1. is ignored as parameters need not be copied \\\[-Wsurprising\\\]" } + !$acc update self (a) ! { dg-warning "Clause for object 'a' at .1. is ignored as parameters need not be copied \\\[-Wsurprising\\\]" } end subroutine oacc1 end module test diff --git a/gcc/testsuite/gfortran.dg/gomp/pr104428.f90 b/gcc/testsuite/gfortran.dg/gomp/pr104428.f90 new file mode 100644 index 0000000..639b331 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/gomp/pr104428.f90 @@ -0,0 +1,15 @@ +! { dg-do compile } + +program p + interface + subroutine x + end subroutine x + end interface +contains + subroutine foo + !$omp declare variant(x) match(construct={do}) + end + subroutine bar + !$omp declare variant(y) match(construct={do}) ! { dg-error "Cannot find symbol 'y'" } + end +end diff --git a/gcc/testsuite/gfortran.dg/import12.f90 b/gcc/testsuite/gfortran.dg/import12.f90 new file mode 100644 index 0000000..df1aae6 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/import12.f90 @@ -0,0 +1,302 @@ +! { dg-do compile } +! +! Tests the variants of IMPORT introduced in F2018 +! +! Contributed by Paul Thomas <pault@gcc.gnu.org> +! +MODULE M + import, none ! { dg-error "F2018: C897 IMPORT statement" } + IMPLICIT NONE + integer :: z +end module + +MODULE N + IMPLICIT NONE + integer :: z +end module + +! Taken from gfortran.dg/pr103312.f90. These F2008-style invocations should +! be accepted. +module example + type, abstract :: foo + integer :: i + contains + procedure(foo_size), deferred :: size + procedure(foo_func), deferred :: func + end type + abstract interface + pure integer function foo_size (this) + import :: foo + class(foo), intent(in) :: this + end function + function foo_func (this) result (string) + import :: foo + class(foo) :: this + character(this%size()) :: string + end function + end interface +end module + +block data blk + import, all ! { dg-error "F2018: C897 IMPORT statement" } + integer a(2) + common /my_common/a + data a/1,2/ +end + +subroutine extern_sub1 + import ! { dg-error "F2018: C897 IMPORT statement" } +end + +subroutine extern_sub2 (arg1, arg2, arg3) + implicit none + integer :: arg1, arg2, arg3 + arg1 = int_fcn () +contains + integer function int_fcn () + import, only : arg2, arg3 + int_fcn = arg2 * arg3 + end +end + +program p + import, all ! { dg-error "F2018: C897 IMPORT statement" } + implicit none + integer :: x, y + type :: t + integer :: i + end type + type(t) :: progtype + type, extends(t) :: s + integer :: j + end type + class(t), allocatable :: progclass +contains + +! OK because arg is just that and x is declared in scope of sub1. + subroutine sub1 (arg) + import, none + implicit none + real :: arg, x + end + +! IMPORT, ALL must be the only IMPORT statement in the scope. + subroutine sub2 (arg) + import, none + import, all ! { dg-error "F2018: C8100 IMPORT statement" } + implicit none + real :: arg, x + end + +! Error message says it all. + subroutine sub3 (arg) + import, none + implicit none + integer :: arg + print *, arg + x = 1 ! { dg-error "F2018: C8102" } + end + +! Error messages say it all. + subroutine sub4 (arg) + import, only : y + implicit none + integer :: arg + print *, arg + x = 1 ! { dg-error "F2018: C8102" } + y = 2 + print *, x ! { dg-error "F2018: C8102" } + end + +! IMPORT eos and IMPORT, ALL must be unique in the scope. + subroutine sub5a (arg) + import, all + import ! { dg-error "F2018: C8100" } + implicit none + real :: arg + real :: x ! { dg-error "F2018: C8102" } + end + + subroutine sub5b (arg) + import, only : x + implicit none + real :: arg + real :: x ! { dg-error "F2018: C8102" } + end + +! Error message says it all. + integer function func1 () + import, only : x + func1 = x * y ! { dg-error "F2018: C8102" } + end + +! Error messages say it all. + subroutine sub6 (arg) + import, only : func1 + import, only : func2 + import, only : foobar ! { dg-error "has no IMPLICIT type" } + implicit none + integer :: arg + arg = func1 () * func2 () * func3 () ! { dg-error "F2018: C8102" } + end + +! Error message says it all. + integer function func2 () + use N + import, none + implicit none + func2 = y ! { dg-error "F2018: C8102" } + end + +! OK + integer function func3 () + func3 = 42 + end + + subroutine sub7 (arg) + implicit none + integer :: arg +! OK + block + import, only : arg, func1, func2, func3 + arg = func1 () * func2 () * func3 () + end block + block + arg = func1 () + import, only : arg, func1 ! { dg-error "Unexpected IMPORT statement" } + end block + end + +! Error messages say it all. + subroutine sub8 (arg) + implicit none + integer :: arg + block + import, only : func1 + import, only : func2 + import, only : foobar ! { dg-error "has no IMPLICIT type" } + arg = func1 () * func2 () * func3 () ! { dg-error "F2018: C8102" } + end block + end + +! ASSOCIATE does not have a specification part so IMPORT cannot appear. + subroutine sub9 (arg) + implicit none + integer :: arg + associate (f3 => func3 ()) ! { dg-error "F2018: C8102" } + import, only : arg, func1 ! { dg-error "Unexpected IMPORT statement" } + arg = func1 () * func2 () * f3 ! { dg-error "F2018: C8102" } + end associate + end + +! OK + subroutine sub10 (arg) + import, only : t + implicit none + type(t) :: arg, mytype + mytype%i = 1 + arg = mytype + end + +! TYPE t does not appear in the IMPORT list + subroutine sub11 (arg) + import, only : progtype + implicit none + type(t) :: arg + progtype%i = 1 ! { dg-error "F2018: C8102" } + arg = progtype ! { dg-error "F2018: C8102" } + end + +! TYPE t is excluded by IMPORT, NONE + subroutine sub12 (arg) + import, none + implicit none + type(t) :: arg, mytype + mytype%i = 1 ! { dg-error "F2018: C8102" } + arg = mytype ! { dg-error "F2018: C8102" } + end + +! TYPE t does not appear in the IMPORT list + subroutine sub13 (arg) + import, only : progclass + implicit none + class(t) :: arg + type(t) :: ca(2) = [t(1), t(2)] ! { dg-error "F2018: C8102" } + progclass%i = t(1) ! { dg-error "F2018: C8102" } + arg = progclass ! { dg-error "F2018: C8102" } + ca = [t(1), t(2)] ! { dg-error "has no IMPLICIT type|F2018: C8102" } + arg = ca(2) ! Note: The preceeding line catches 'ca' having no implicit type. + end + +! TYPE t is excluded by IMPORT, NONE + subroutine sub14 (arg) + import, none + implicit none + class(t) :: arg + class(t), allocatable :: myclass + myclass%i = t(1) ! { dg-error "F2018: C8102" } + arg%i = myclass%i ! { dg-error "F2018: C8102" } + select type (arg) ! { dg-error "F2018: C8102" } + type is (t) + arg%i = arg%i + 1 + type is (s) + arg%j = -1 + end select + end + +! TYPE s does not appear in the IMPORT, ONLY list + subroutine sub15 (arg) + import, only : t + implicit none + class(t) :: arg + class(t), allocatable :: myclass + myclass = t(1) + arg%i = myclass%i + select type (arg) ! { dg-error "F2018: C8102" } + type is (t) + arg%i = arg%i + 1 + type is (s) + arg%j = -1 ! s is caught at the SELECT TYPE statement + end select + end + +! This is OK + subroutine sub16 (arg) + import, only : t, s + implicit none + class(t) :: arg + class(t), allocatable :: myclass + myclass = t(1) + arg%i = myclass%i + select type (arg) + type is (t) + arg%i = arg%i + 1 + type is (s) + arg%j = -1 + end select + end + + subroutine sub17 (arg) + import, only : t + implicit none + class(t) :: arg + call sub16 (arg) ! { dg-error "F2018: C8102" } + end + +! Make sure that recursive procedures do not require the procedure itself to be imported. + recursive subroutine sub18 (arg) + import, none + implicit none + integer :: arg + if (arg <= 0) call sub18 (arg) + arg = 1 + end + + recursive integer function func4 (arg) result (res) + import, none + implicit none + integer :: arg + if (arg <= 0) arg = func4 (arg) + res = 1 + end +end diff --git a/gcc/testsuite/gfortran.dg/import13.f90 b/gcc/testsuite/gfortran.dg/import13.f90 new file mode 100644 index 0000000..3bcfec3 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/import13.f90 @@ -0,0 +1,21 @@ +! { dg-do compile } +! +! Contributed by Steve Kargl <sgk@troutmask.apl.washington.edu> +! +program foo + implicit none + integer i + i = 42 + if (i /= 42) stop 1 + call bah + contains + subroutine bah ! { dg-error "is already defined at" } + i = 43 + if (i /= 43) stop 2 + end subroutine bah + subroutine bah ! { dg-error "is already defined at" } + ! import statement missing a comma + import none ! { dg-error "Unexpected IMPORT statement" } + i = 44 ! { dg-error "Unexpected assignment" } + end subroutine bah ! { dg-error "Expecting END PROGRAM" } +end program foo diff --git a/gcc/testsuite/gfortran.dg/import3.f90 b/gcc/testsuite/gfortran.dg/import3.f90 index 74cd527..9288c6b 100644 --- a/gcc/testsuite/gfortran.dg/import3.f90 +++ b/gcc/testsuite/gfortran.dg/import3.f90 @@ -1,6 +1,8 @@ ! { dg-do compile } +! { dg-options "-std=f2008" } ! { dg-shouldfail "Invalid use of IMPORT" } ! Test invalid uses of import +! Wording of some error messages change for -std>=F2018 but all are caught. ! PR fortran/29601 subroutine test() diff --git a/gcc/testsuite/gfortran.dg/pointer_check_15.f90 b/gcc/testsuite/gfortran.dg/pointer_check_15.f90 new file mode 100644 index 0000000..13c6820 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/pointer_check_15.f90 @@ -0,0 +1,46 @@ +! { dg-do run } +! { dg-additional-options "-O -fcheck=pointer -fdump-tree-original" } +! +! PR fortran/121145 +! Erroneous runtime error: Proc-pointer actual argument 'ptr' is not associated +! +! Contributed by Federico Perini. + +module m + implicit none + + abstract interface + subroutine fun(x) + real, intent(in) :: x + end subroutine fun + end interface + +contains + + subroutine with_fun(sub) + procedure(fun), optional :: sub + if (present(sub)) stop 1 + end subroutine + + subroutine with_non_optional(sub) + procedure(fun) :: sub + end subroutine + +end module m + +program p + use m + implicit none + + procedure(fun), pointer :: ptr1 => null() + procedure(fun), pointer :: ptr2 => null() + + call with_fun() + call with_fun(sub=ptr1) ! no runtime check here + + if (associated (ptr2)) then + call with_non_optional(sub=ptr2) ! runtime check here + end if +end + +! { dg-final { scan-tree-dump-times "Proc-pointer actual argument .'ptr2.'" 1 "original" } } diff --git a/gcc/testsuite/gfortran.dg/split_1.f90 b/gcc/testsuite/gfortran.dg/split_1.f90 new file mode 100644 index 0000000..21659b0 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/split_1.f90 @@ -0,0 +1,28 @@ +! { dg-do run } +program b + character(len=:), allocatable :: input + character(len=2) :: set = ', ' + integer :: p + input = " one,last example," + p = 0 + + call split(input, set, p) + if (p /= 1) STOP 1 + call split(input, set, p) + if (p /= 5) STOP 2 + call split(input, set, p) + if (p /= 10) STOP 3 + call split(input, set, p) + if (p /= 18) STOP 4 + call split(input, set, p) + if (p /= 19) STOP 5 + + call split(input, set, p, .true.) + if (p /= 18) STOP 6 + call split(input, set, p, .true.) + if (p /= 10) STOP 7 + call split(input, set, p, .true.) + if (p /= 5) STOP 8 + call split(input, set, p, .true.) + if (p /= 1) STOP 9 +end program b diff --git a/gcc/testsuite/gfortran.dg/split_2.f90 b/gcc/testsuite/gfortran.dg/split_2.f90 new file mode 100644 index 0000000..9afb30b --- /dev/null +++ b/gcc/testsuite/gfortran.dg/split_2.f90 @@ -0,0 +1,22 @@ +! { dg-do run } +program b + integer, parameter :: ucs4 = selected_char_kind('ISO_10646') + character(kind=ucs4, len=:), allocatable :: input, set + integer :: p = 0 + + input = char(int(z'4f60'), ucs4) // char(int(z'597d'), ucs4) // char(int(z'4f60'), ucs4) // char(int(z'4e16'), ucs4) + set = char(int(z'597d'), ucs4) // char(int(z'4e16'), ucs4) + + call split(input, set, p) + if (p /= 2) stop 1 + call split(input, set, p) + if (p /= 4) stop 2 + call split(input, set, p) + if (p /= 5) stop 3 + call split(input, set, p, .true.) + if (p /= 4) stop 4 + call split(input, set, p, .true.) + if (p /= 2) stop 5 + call split(input, set, p, .true.) + if (p /= 0) stop 6 +end program b diff --git a/gcc/testsuite/gfortran.dg/split_3.f90 b/gcc/testsuite/gfortran.dg/split_3.f90 new file mode 100644 index 0000000..bec3fdc --- /dev/null +++ b/gcc/testsuite/gfortran.dg/split_3.f90 @@ -0,0 +1,11 @@ +! { dg-do run } +! { dg-shouldfail "Fortran runtime error" } + +program b + character(len=:), allocatable :: input + character(len=2) :: set = ', ' + integer :: p + input = " one,last example," + p = -1 + call split(input, set, p) +end program b diff --git a/gcc/testsuite/gfortran.dg/split_4.f90 b/gcc/testsuite/gfortran.dg/split_4.f90 new file mode 100644 index 0000000..a3c27bb --- /dev/null +++ b/gcc/testsuite/gfortran.dg/split_4.f90 @@ -0,0 +1,11 @@ +! { dg-do run } +! { dg-shouldfail "Fortran runtime error" } + +program b + character(len=:), allocatable :: input + character(len=2) :: set = ', ' + integer :: p + input = " one,last example," + p = 0 + call split(input, set, p, .true.) +end program b diff --git a/gcc/testsuite/gm2/errors/fail/badindrtype.mod b/gcc/testsuite/gm2/errors/fail/badindrtype.mod new file mode 100644 index 0000000..b393027 --- /dev/null +++ b/gcc/testsuite/gm2/errors/fail/badindrtype.mod @@ -0,0 +1,16 @@ +MODULE badindrtype ; + + +PROCEDURE init (VAR ch: CHAR) ; +VAR + c: CARDINAL ; +BEGIN + ch := c +END init ; + + +VAR + ch: CHAR ; +BEGIN + init (ch) +END badindrtype. diff --git a/gcc/testsuite/gm2/errors/fail/badindrtype2.mod b/gcc/testsuite/gm2/errors/fail/badindrtype2.mod new file mode 100644 index 0000000..a31303b --- /dev/null +++ b/gcc/testsuite/gm2/errors/fail/badindrtype2.mod @@ -0,0 +1,16 @@ +MODULE badindrtype2 ; + + +PROCEDURE init (VAR ch: CHAR) ; +VAR + c: CARDINAL ; +BEGIN + c := ch +END init ; + + +VAR + ch: CHAR ; +BEGIN + init (ch) +END badindrtype2. diff --git a/gcc/testsuite/gm2/switches/pedantic-params/fail/arrayofchar.def b/gcc/testsuite/gm2/switches/pedantic-params/fail/arrayofchar.def new file mode 100644 index 0000000..a24f7d3 --- /dev/null +++ b/gcc/testsuite/gm2/switches/pedantic-params/fail/arrayofchar.def @@ -0,0 +1,12 @@ +DEFINITION MODULE arrayofchar ; + +FROM FIO IMPORT File ; + +(* + Description: provides write procedures for ARRAY OF CHAR. +*) + +PROCEDURE Write (f: File; str: ARRAY OF CHAR) ; +PROCEDURE WriteLn (f: File) ; + +END arrayofchar. diff --git a/gcc/testsuite/gm2/switches/pedantic-params/fail/arrayofchar.mod b/gcc/testsuite/gm2/switches/pedantic-params/fail/arrayofchar.mod new file mode 100644 index 0000000..4e630a9 --- /dev/null +++ b/gcc/testsuite/gm2/switches/pedantic-params/fail/arrayofchar.mod @@ -0,0 +1,30 @@ +IMPLEMENTATION MODULE arrayofchar ; + +FROM FIO IMPORT WriteChar, WriteLine ; +IMPORT StrLib ; + + +(* + Write - writes a string to file f. +*) + +PROCEDURE Write (f: File; a: ARRAY OF CHAR) ; +VAR + len, i: CARDINAL ; +BEGIN + len := StrLib.StrLen (a) ; + i := 0 ; + WHILE i < len DO + WriteChar (f, a[i]) ; + INC (i) + END +END Write ; + + +PROCEDURE WriteLn (f: File) ; +BEGIN + WriteLine (f) +END WriteLn ; + + +END arrayofchar. diff --git a/gcc/testsuite/gm2/warnings/style/fail/badvarname.mod b/gcc/testsuite/gm2/warnings/style/fail/badvarname.mod new file mode 100644 index 0000000..e589b0d --- /dev/null +++ b/gcc/testsuite/gm2/warnings/style/fail/badvarname.mod @@ -0,0 +1,14 @@ +MODULE badvarname ; + + +PROCEDURE Foo ; +VAR + end: CARDINAL ; +BEGIN + end := 1 +END Foo ; + + +BEGIN + Foo +END badvarname. diff --git a/gcc/testsuite/gm2/warnings/style/fail/warnings-style-fail.exp b/gcc/testsuite/gm2/warnings/style/fail/warnings-style-fail.exp new file mode 100644 index 0000000..f44ed80 --- /dev/null +++ b/gcc/testsuite/gm2/warnings/style/fail/warnings-style-fail.exp @@ -0,0 +1,44 @@ +# Expect driver script for GCC Regression Tests +# Copyright (C) 2025 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +# This file was written by Gaius Mulley (gaius.mulley@southwales.ac.uk) +# for GNU Modula-2. + +if $tracelevel then { + strace $tracelevel +} + +# load support procs +load_lib gm2-torture.exp + +gm2_init_pim "${srcdir}/gm2/warnings/style/fail" + +global TORTURE_OPTIONS + +set old_options $TORTURE_OPTIONS +set TORTURE_OPTIONS { { -O0 -g -Werror=style } } + +foreach testcase [lsort [glob -nocomplain $srcdir/$subdir/*.mod]] { + # If we're only testing specific files and this isn't one of them, skip it. + if ![runtest_file_p $runtests $testcase] then { + continue + } + + gm2-torture-fail $testcase +} + +set TORTURE_OPTIONS $old_options diff --git a/gcc/testsuite/gnat.dg/deref4.adb b/gcc/testsuite/gnat.dg/deref4.adb new file mode 100644 index 0000000..586a6186 --- /dev/null +++ b/gcc/testsuite/gnat.dg/deref4.adb @@ -0,0 +1,9 @@ +-- { dg-do compile } +-- { dg-options "-gnatX" } + +with Deref4_Pkg; use Deref4_Pkg; + +procedure Deref4 is +begin + Obj.Proc (null); +end; diff --git a/gcc/testsuite/gnat.dg/deref4_pkg.ads b/gcc/testsuite/gnat.dg/deref4_pkg.ads new file mode 100644 index 0000000..9410d0d --- /dev/null +++ b/gcc/testsuite/gnat.dg/deref4_pkg.ads @@ -0,0 +1,8 @@ +package Deref4_Pkg is + + type A is tagged null record; + type A_Ptr is access A; + procedure Proc (This : in out A'Class; Some_Parameter : A_Ptr) is null; + Obj : A_Ptr; + +end Deref4_Pkg; diff --git a/gcc/testsuite/lib/gcc-defs.exp b/gcc/testsuite/lib/gcc-defs.exp index 2f8b7d4..d66c833 100644 --- a/gcc/testsuite/lib/gcc-defs.exp +++ b/gcc/testsuite/lib/gcc-defs.exp @@ -599,15 +599,16 @@ proc aarch64-arch-dg-options { args } { set add_arch 1 set add_tune 1 + set add_override 1 set checks_output [string equal [lindex $do_what 0] "compile"] set options [lindex $args 1] foreach option [split $options] { switch -glob -- $option { -march=* { set add_arch 0 } - -mcpu=* { set add_arch 0; set add_tune 0 } - -mtune=* { set add_tune 0 } - -moverride=* { set add_tune 0 } + -mcpu=* { set add_arch 0; set add_tune 0; set add_override 0} + -mtune=* { set add_tune 0; set add_override 0 } + -moverride=* { set add_override 0 } -save-temps { set checks_output 1 } --save-temps { set checks_output 1 } -fdump* { set checks_output 1 } @@ -619,9 +620,14 @@ proc aarch64-arch-dg-options { args } { append options " $aarch64_default_testing_arch" } - if { $add_tune && $checks_output } { + if { $checks_output } { # Turn off any default tuning and codegen tweaks. - append options " -mtune=generic -moverride=tune=none" + if { $add_tune } { + append options " -mtune=generic" + } + if { $add_override } { + append options " -moverride=tune=none" + } } uplevel 1 aarch64-old-dg-options [lreplace $args 1 1 $options] diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp index 312c4b8..859a943 100644 --- a/gcc/testsuite/lib/gcc-dg.exp +++ b/gcc/testsuite/lib/gcc-dg.exp @@ -1338,8 +1338,8 @@ proc dg-missed { args } { } # Look for messages with 'note: ' prefixes. -# In addition to standard compiler diagnostics ('DK_NOTE', 'inform' functions, -# "for additional details on an error message"), +# In addition to standard compiler diagnostics (diagnostics::kind::note, +# 'inform' functions, "for additional details on an error message"), # this also includes output from '-fopt-info' for 'MSG_NOTE': # a general optimization info. # By default, any *excess* notes are pruned, meaning their appearance doesn't diff --git a/gcc/testsuite/lib/profopt.exp b/gcc/testsuite/lib/profopt.exp index b4d244b..81d86c6 100644 --- a/gcc/testsuite/lib/profopt.exp +++ b/gcc/testsuite/lib/profopt.exp @@ -382,6 +382,7 @@ proc profopt-execute { src } { unsupported "$testcase" unset testname_with_flags verbose "$src not supported on this target, skipping it" 3 + cleanup-after-saved-dg-test return } @@ -458,6 +459,7 @@ proc profopt-execute { src } { unsupported "$testcase -fauto-profile: cannot run create_gcov" unset testname_with_flags set status "fail" + cleanup-after-saved-dg-test return } set status [remote_wait "" 300] diff --git a/gcc/testsuite/lib/sarif.py b/gcc/testsuite/lib/sarif.py index 384de2f..d75a87e 100644 --- a/gcc/testsuite/lib/sarif.py +++ b/gcc/testsuite/lib/sarif.py @@ -29,10 +29,24 @@ def get_result_by_index(sarif, idx): results = run['results'] return results[idx] -def get_xml_state(events, event_idx): - xml_src = events[event_idx]['properties']['gcc/diagnostic_event/xml_state'] +def get_state_graph(events, event_idx): + graph = events[event_idx]['properties']['gcc/diagnostics/paths/event/state_graph'] if 0: - print(xml_src) - xml = ET.fromstring(xml_src) - assert xml.tag == 'state-diagram' - return xml + print(graph) + assert graph is not None + return graph + +def get_state_node_attr(obj, attr_name): + return obj['properties']['gcc/diagnostic_state_node/%s' % attr_name] + +def get_state_node_kind(obj): + return get_state_node_attr(obj, 'kind') + +def get_state_node_name(obj): + return get_state_node_attr(obj, 'name') + +def get_state_node_type(obj): + return get_state_node_attr(obj, 'type') + +def get_state_node_value(obj): + return get_state_node_attr(obj, 'value') diff --git a/gcc/testsuite/lib/scanasm.exp b/gcc/testsuite/lib/scanasm.exp index a2311de..51952a6 100644 --- a/gcc/testsuite/lib/scanasm.exp +++ b/gcc/testsuite/lib/scanasm.exp @@ -896,6 +896,10 @@ proc configure_check-function-bodies { config } { set up_config(fluff) {^\s*(?://)} } elseif { [istarget *-*-darwin*] } { set up_config(fluff) {^\s*(?:\.|//|@)|^L[0-9ABCESV]} + } elseif { [istarget s390*-*-*] } { + # Additionally to the defaults skip lines beginning with a # resulting + # from inline asm. + set up_config(fluff) {^\s*(?:\.|//|@|$|#)} } else { # Skip lines beginning with labels ('.L[...]:') or other directives # ('.align', '.cfi_startproc', '.quad [...]', '.text', etc.), '//' or diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 9ab46a0..7435519 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -1017,6 +1017,18 @@ proc check_effective_target_label_values {} { return 1 } + +# Return 1 if builtin_trap expands not into a call but an instruction, +# 0 otherwise. +proc check_effective_target_trap { } { + return [check_no_messages_and_pattern trap "!\\(call" rtl-expand { + void foo () + { + return __builtin_trap (); + } + } "" ] +} + # Return 1 if builtin_return_address and builtin_frame_address are # supported, 0 otherwise. @@ -2428,7 +2440,7 @@ proc check_effective_target_riscv_v_misalign_ok { } { = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; asm ("vsetivli zero,7,e8,m1,ta,ma"); asm ("addi a7,%0,1" : : "r" (a) : "a7" ); - asm ("vle8.v v8,0(a7)" : : : "v8"); + asm ("vle16.v v8,0(a7)" : : : "v8"); return 0; } } "-march=${gcc_march}"] } { return 1 } @@ -2685,6 +2697,14 @@ proc remove_options_for_riscv_zvbb { flags } { return [add_options_for_riscv_z_ext zvbb $flags] } +proc add_options_for_riscv_zvfh { flags } { + return [add_options_for_riscv_z_ext zvfh $flags] +} + +proc remove_options_for_riscv_zvfh { flags } { + return [add_options_for_riscv_z_ext zvfh $flags] +} + # Return 1 if the target is ia32 or x86_64. proc check_effective_target_x86 { } { @@ -5800,6 +5820,13 @@ proc add_options_for_aarch64_sve { flags } { return "$flags -march=armv8.2-a+sve" } +proc add_options_for_aarch64_sme { flags } { + if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sme] } { + return "$flags" + } + return "$flags -march=armv9-a+sme" +} + # Return 1 if this is an ARM target supporting the FP16 alternative # format. Some multilibs may be incompatible with the options needed. Also # set et_arm_fp16_alternative_flags to the best options to add. @@ -6539,6 +6566,22 @@ foreach N { 128 256 512 1024 2048 } { }] } +# Return true if this is an AArch64 target that can run SME code. + +proc check_effective_target_aarch64_sme_hw { } { + if { ![istarget aarch64*-*-*] } { + return 0 + } + return [check_runtime aarch64_sme_hw_available { + int + main (void) + { + asm volatile ("rdsvl x0, #1"); + return 0; + } + } [add_options_for_aarch64_sme ""]] +} + proc check_effective_target_arm_neonv2_hw { } { return [check_runtime arm_neon_hwv2_available { #include "arm_neon.h" @@ -9961,7 +10004,8 @@ proc check_effective_target_vect_logical_reduc { } { || [istarget amdgcn-*-*] || [check_effective_target_riscv_v] || [check_effective_target_loongarch_sx] - || [check_effective_target_x86]}] + || [check_effective_target_x86] + || [check_effective_target_s390_vx]}] } # Return 1 if the target supports the fold_extract_last optab. @@ -12478,10 +12522,16 @@ proc check_effective_target_aarch64_gas_has_build_attributes { } { # various architecture extensions via the .arch_extension pseudo-op. set exts { - "bf16" "cmpbr" "crc" "crypto" "dotprod" "f32mm" "f64mm" "fp" "fp8" - "fp8dot2" "fp8dot4" "fp8fma" "i8mm" "ls64" "lse" "lut" "sb" "simd" - "sme-b16b16" "sme-f16f16" "sme-i16i64" "sme" "sme2" "sme2p1" "ssve-fp8dot2" - "ssve-fp8dot4" "ssve-fp8fma" "sve-b16b16" "sve" "sve2" + "bf16" "cmpbr" "crc" "crypto" "dotprod" "f32mm" "f64mm" "faminmax" + "fp" "fp8" "fp8dot2" "fp8dot4" "fp8fma" "i8mm" "ls64" "lse" "lut" + "sb" "simd" "sve-b16b16" "sve" "sve2" +} + +# We don't support SME without SVE2, so we'll use armv9 as the base +# archiecture for SME and the features that require it. +set exts_sve2 { + "sme-b16b16" "sme-f16f16" "sme-i16i64" "sme" "sme2" "sme2p1" + "ssve-fp8dot2" "ssve-fp8dot4" "ssve-fp8fma" } foreach { aarch64_ext } $exts { @@ -12498,6 +12548,20 @@ foreach { aarch64_ext } $exts { }] } +foreach { aarch64_ext } $exts_sve2 { + eval [string map [list FUNC $aarch64_ext] { + proc check_effective_target_aarch64_asm_FUNC_ok { } { + if { [istarget aarch64*-*-*] } { + return [check_no_compiler_messages aarch64_FUNC_assembler object { + __asm__ (".arch_extension FUNC"); + } "-march=armv9-a+FUNC"] + } else { + return 0 + } + } + }] +} + proc check_effective_target_aarch64_asm_sve2p1_ok { } { if { [istarget aarch64*-*-*] } { return [check_no_compiler_messages aarch64_sve2p1_assembler object { @@ -14528,3 +14592,51 @@ proc check_effective_target_foldable_pi_based_trigonometry { } { } }] } +# +# Return 1 if the x86-64 target enables -mfentry by default, 0 +# otherwise. Cache the result. + +proc check_effective_target_fentry { } { + global tool + global GCC_UNDER_TEST + + if { ![check_effective_target_x86] } { + return 0 + } + + # Need auto-host.h to check linker support. + if { ![file exists ../../auto-host.h ] } { + return 0 + } + + return [check_cached_effective_target fentry { + # Set up and compile to see if ENABLE_X86_64_MFENTRY is + # non-zero. Include the current process ID in the file + # names to prevent conflicts with invocations for multiple + # testsuites. + + set src pie[pid].c + set obj pie[pid].o + + set f [open $src "w"] + puts $f "#include \"../../auto-host.h\"" + puts $f "#if ENABLE_X86_64_MFENTRY == 0 || !defined __x86_64__" + puts $f "# error -mfentry is not enabled by default." + puts $f "#endif" + close $f + + verbose "check_effective_target_fentry compiling testfile $src" 2 + set lines [${tool}_target_compile $src $obj object ""] + + file delete $src + file delete $obj + + if [string match "" $lines] then { + verbose "check_effective_target_fentry testfile compilation passed" 2 + return 1 + } else { + verbose "check_effective_target_fentry testfile compilation failed" 2 + return 0 + } + }] +} diff --git a/gcc/testsuite/libgdiagnostics.dg/sarif.py b/gcc/testsuite/libgdiagnostics.dg/sarif.py deleted file mode 100644 index 7daf35b..0000000 --- a/gcc/testsuite/libgdiagnostics.dg/sarif.py +++ /dev/null @@ -1,23 +0,0 @@ -import json -import os - -def sarif_from_env(): - # return parsed JSON content a SARIF_PATH file - json_filename = os.environ['SARIF_PATH'] - json_filename += '.sarif' - print('json_filename: %r' % json_filename) - with open(json_filename) as f: - json_data = f.read() - return json.loads(json_data) - -def get_location_artifact_uri(location): - return location['physicalLocation']['artifactLocation']['uri'] - -def get_location_physical_region(location): - return location['physicalLocation']['region'] - -def get_location_snippet_text(location): - return location['physicalLocation']['contextRegion']['snippet']['text'] - -def get_location_relationships(location): - return location['relationships'] diff --git a/gcc/testsuite/libgdiagnostics.dg/test-message-buffer-c.py b/gcc/testsuite/libgdiagnostics.dg/test-message-buffer-c.py new file mode 100644 index 0000000..9d14b9a --- /dev/null +++ b/gcc/testsuite/libgdiagnostics.dg/test-message-buffer-c.py @@ -0,0 +1,12 @@ +from sarif import * + +import pytest + +@pytest.fixture(scope='function', autouse=True) +def sarif(): + return sarif_from_env() + +def test_message_in_generated_sarif(sarif): + result = get_result_by_index(sarif, 0) + assert result['level'] == 'error' + assert result['message']['text'] == "this is a string; foo; int: 42 str: mostly harmless; [this is a link](https://example.com/) 'this is quoted' highlight A highlight B (1)." diff --git a/gcc/testsuite/libgdiagnostics.dg/test-message-buffer.c b/gcc/testsuite/libgdiagnostics.dg/test-message-buffer.c new file mode 100644 index 0000000..a958fc5 --- /dev/null +++ b/gcc/testsuite/libgdiagnostics.dg/test-message-buffer.c @@ -0,0 +1,80 @@ +/* Example of using a message buffer to build the text of a diagnostic + in pieces before emitting it. */ + +#include "libgdiagnostics.h" +#include "test-helpers.h" + +int +main () +{ + begin_test ("test-message-buffer.c.exe", + "test-message-buffer.c.sarif", + __FILE__, "c"); + + diagnostic_event_id event_id = 0; + + /* begin quoted source */ + diagnostic *d = diagnostic_begin (diag_mgr, + DIAGNOSTIC_LEVEL_ERROR); + + diagnostic_message_buffer *msg_buf = diagnostic_message_buffer_new (); + + /* Add a null-terminated string. */ + diagnostic_message_buffer_append_str (msg_buf, "this is a string; "); + + /* Add a length-specified string. */ + diagnostic_message_buffer_append_text (msg_buf, "foobar", 3); + + /* "printf"-formatting. */ + diagnostic_message_buffer_append_printf (msg_buf, + "; int: %i str: %s; ", + 42, "mostly harmless"); + + /* Adding a URL. */ + diagnostic_message_buffer_begin_url (msg_buf, "https://example.com/"); + diagnostic_message_buffer_append_str (msg_buf, "this is a link"); + diagnostic_message_buffer_end_url (msg_buf); + + diagnostic_message_buffer_append_str (msg_buf, " "); + + /* Add quoted text. */ + diagnostic_message_buffer_begin_quote (msg_buf); + diagnostic_message_buffer_append_str (msg_buf, "this is quoted"); + diagnostic_message_buffer_end_quote (msg_buf); + + diagnostic_message_buffer_append_str (msg_buf, " "); + + /* Add colorized text. */ + diagnostic_message_buffer_begin_color (msg_buf, "highlight-a"); + diagnostic_message_buffer_append_str (msg_buf, "highlight A"); + diagnostic_message_buffer_end_color (msg_buf); + + diagnostic_message_buffer_append_str (msg_buf, " "); + + diagnostic_message_buffer_begin_color (msg_buf, "highlight-b"); + diagnostic_message_buffer_append_str (msg_buf, "highlight B"); + diagnostic_message_buffer_end_color (msg_buf); + + diagnostic_message_buffer_append_str (msg_buf, " "); + + /* Add an event ID. This will be printed as "(1)". */ + diagnostic_message_buffer_append_event_id (msg_buf, event_id); + + /* Add an ASCII char. */ + diagnostic_message_buffer_append_byte (msg_buf, '.'); + + diagnostic_finish_via_msg_buf (d, msg_buf); + /* end quoted source */ + + return end_test (); +}; + +/* Verify the output from the text sink. + { dg-regexp "test-message-buffer.c.exe: error: this is a string; foo; int: 42 str: mostly harmless; this is a link 'this is quoted' highlight A highlight B \\(1\\)." } */ + +/* Verify that some JSON was written to a file with the expected name: + { dg-final { verify-sarif-file } } */ + +/* Use a Python script to verify various properties about the generated + .sarif file: + { dg-final { run-sarif-pytest test-message-buffer.c "test-message-buffer-c.py" } } */ diff --git a/gcc/testsuite/libgdiagnostics.dg/test-warning-with-path-c.py b/gcc/testsuite/libgdiagnostics.dg/test-warning-with-path-c.py index af1e7b9..61ccb93 100644 --- a/gcc/testsuite/libgdiagnostics.dg/test-warning-with-path-c.py +++ b/gcc/testsuite/libgdiagnostics.dg/test-warning-with-path-c.py @@ -101,7 +101,7 @@ def test_sarif_output_for_warning_with_path(sarif): == ' PyList_Append(list, item);\n' assert tfl_2_loc['logicalLocations'] == location['logicalLocations'] assert tfl_2_loc['message']['text'] \ - == "when calling 'PyList_Append', passing NULL from (1) as argument 1" + == "when calling 'PyList_Append', passing NULL from [(1)](sarif:/runs/0/results/0/codeFlows/0/threadFlows/0/locations/0) as argument 1" assert tfl_2['nestingLevel'] == 0 assert tfl_2['executionOrder'] == 3 diff --git a/gcc/testsuite/sarif-replay.dg/2.1.0-invalid/3.40.2-duplicate-node-id.sarif b/gcc/testsuite/sarif-replay.dg/2.1.0-invalid/3.40.2-duplicate-node-id.sarif new file mode 100644 index 0000000..a4eb9d4 --- /dev/null +++ b/gcc/testsuite/sarif-replay.dg/2.1.0-invalid/3.40.2-duplicate-node-id.sarif @@ -0,0 +1,23 @@ +{"$schema": "https://docs.oasis-open.org/sarif/sarif/v2.1.0/errata01/os/schemas/sarif-schema-2.1.0.json", + "version": "2.1.0", + "runs": [{"tool": { "driver": { "name": "example" } }, + "results": [], + "graphs": [{"nodes": [{"id": "a", /* { dg-message "'a' already used as node id within graph here" } */ + "children": [{"id": "a"}]}], /* { dg-error "duplicate node id 'a' within graph \\\[SARIF v2.1.0 §3.40.2\\\]" } */ + "edges": []}]}]} + +/* { dg-begin-multiline-output "" } +In JSON property '/runs/0/graphs/0/nodes/0/children/0/id': + { dg-end-multiline-output "" } */ +/* { dg-begin-multiline-output "" } + 6 | "children": [{"id": "a"}]}], + | ^~~ + { dg-end-multiline-output "" } */ + +/* { dg-begin-multiline-output "" } +In JSON property '/runs/0/graphs/0/nodes/0/id': + { dg-end-multiline-output "" } */ +/* { dg-begin-multiline-output "" } + 5 | "graphs": [{"nodes": [{"id": "a", + | ^~~ + { dg-end-multiline-output "" } */ diff --git a/gcc/testsuite/sarif-replay.dg/2.1.0-invalid/3.41.4-unrecognized-node-id.sarif b/gcc/testsuite/sarif-replay.dg/2.1.0-invalid/3.41.4-unrecognized-node-id.sarif new file mode 100644 index 0000000..b483346 --- /dev/null +++ b/gcc/testsuite/sarif-replay.dg/2.1.0-invalid/3.41.4-unrecognized-node-id.sarif @@ -0,0 +1,16 @@ +{"$schema": "https://docs.oasis-open.org/sarif/sarif/v2.1.0/errata01/os/schemas/sarif-schema-2.1.0.json", + "version": "2.1.0", + "runs": [{"tool": { "driver": { "name": "example" } }, + "results": [], + "graphs": [{"nodes": [], + "edges": [{"id": "edge0", + "sourceNodeId": "this-does-not-exist", /* { dg-error "no node with id 'this-does-not-exist' in graph \\\[SARIF v2.1.0 §3.41.4\\\]" } */ + "targetNodeId": "neither-does-this"}]}]}]} + +/* { dg-begin-multiline-output "" } +In JSON property '/runs/0/graphs/0/edges/0/sourceNodeId': + { dg-end-multiline-output "" } */ +/* { dg-begin-multiline-output "" } + 7 | "sourceNodeId": "this-does-not-exist", + | ^~~~~~~~~~~~~~~~~~~~~ + { dg-end-multiline-output "" } */ diff --git a/gcc/testsuite/sarif-replay.dg/2.1.0-valid/3.11.6-embedded-links.sarif b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/3.11.6-embedded-links.sarif index bc64521..cd7b822 100644 --- a/gcc/testsuite/sarif-replay.dg/2.1.0-valid/3.11.6-embedded-links.sarif +++ b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/3.11.6-embedded-links.sarif @@ -1,3 +1,6 @@ +/* { dg-additional-options "-fdiagnostics-add-output=experimental-html:file=3.11.6-embedded-links.sarif.html,javascript=no" } */ +/* { dg-additional-options "-fdiagnostics-add-output=sarif:file=3.11.6-embedded-links.sarif.roundtrip.sarif" } */ + {"$schema": "https://docs.oasis-open.org/sarif/sarif/v2.1.0/errata01/os/schemas/sarif-schema-2.1.0.json", "version": "2.1.0", "runs": [{"tool": {"driver": {"name": "hand-written"}}, @@ -16,10 +19,24 @@ hand-written: warning: 002: Prohibited term used in [para\[0\]\\spans\[2\](1). /* With the fix from https://github.com/oasis-tcs/sarif-spec/issues/656 */ {"message": {"text": "003: Prohibited term used in [para\\[0\\]\\\\spans\\[2\\]](1)."}, - "locations": []} + "locations": []}, /* { dg-begin-multiline-output "" } hand-written: warning: 003: Prohibited term used in para[0]\spans[2]. { dg-end-multiline-output "" } */ + {"message": {"text": "004: This is a [link](http://www.example.com)."}, + "locations": []} +/* { dg-begin-multiline-output "" } +hand-written: warning: 004: This is a link. + { dg-end-multiline-output "" } */ + ]}]} +/* Use a Python script to verify various properties about the generated + .html file: + { dg-final { run-html-pytest 3.11.6-embedded-links.sarif "2.1.0-valid/embedded-links-check-html.py" } } */ + +/* Use a Python script to verify various properties about the *generated* + .sarif file: + { dg-final { run-sarif-pytest 3.11.6-embedded-links.sarif.roundtrip "2.1.0-valid/embedded-links-check-sarif-roundtrip.py" } } */ + diff --git a/gcc/testsuite/sarif-replay.dg/2.1.0-valid/embedded-links-check-html.py b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/embedded-links-check-html.py new file mode 100644 index 0000000..ff1c2f2 --- /dev/null +++ b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/embedded-links-check-html.py @@ -0,0 +1,28 @@ +from htmltest import * + +import pytest + +@pytest.fixture(scope='function', autouse=True) +def html_tree(): + return html_tree_from_env() + +def test_generated_html(html_tree): + root = html_tree.getroot () + assert root.tag == make_tag('html') + + head = root.find('xhtml:head', ns) + assert head is not None + + # Get "warning: 004: This is a link." + diag = get_diag_by_index(html_tree, 3) + + msg = get_message_within_diag(diag) + assert msg is not None + + assert_tag(msg[0], 'strong') + assert msg[0].text == 'warning: ' + assert msg[0].tail == ' 004: This is a ' + assert_tag(msg[1], 'a') + assert msg[1].text == 'link' + assert msg[1].get('href') == 'http://www.example.com' + assert msg[1].tail == '. ' diff --git a/gcc/testsuite/sarif-replay.dg/2.1.0-valid/embedded-links-check-sarif-roundtrip.py b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/embedded-links-check-sarif-roundtrip.py new file mode 100644 index 0000000..171339e --- /dev/null +++ b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/embedded-links-check-sarif-roundtrip.py @@ -0,0 +1,13 @@ +from sarif import * + +import pytest + +@pytest.fixture(scope='function', autouse=True) +def sarif(): + return sarif_from_env() + +def test_roundtrip_of_url_in_generated_sarif(sarif): + # Get "warning: 004: This is a link." + result = get_result_by_index(sarif, 3) + assert result['level'] == 'warning' + assert result['message']['text'] == "004: This is a [link](http://www.example.com)." diff --git a/gcc/testsuite/sarif-replay.dg/2.1.0-valid/graphs-check-html.py b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/graphs-check-html.py new file mode 100644 index 0000000..63b80c9 --- /dev/null +++ b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/graphs-check-html.py @@ -0,0 +1,46 @@ +from htmltest import * + +import pytest + +@pytest.fixture(scope='function', autouse=True) +def html_tree(): + return html_tree_from_env() + +def test_result_graph(html_tree): + root = html_tree.getroot () + assert root.tag == make_tag('html') + + body = root.find('xhtml:body', ns) + assert body is not None + + diag_list = body.find('xhtml:div', ns) + assert diag_list is not None + assert diag_list.attrib['class'] == 'gcc-diagnostic-list' + + diag = diag_list.find('xhtml:div', ns) + assert diag is not None + + message = diag.find("./xhtml:div[@class='gcc-message']", ns) + assert message.attrib['id'] == 'gcc-diag-0-message' + + assert message[0].tag == make_tag('strong') + assert message[0].tail == ' this is a placeholder error, with graphs ' + + graph = diag.find("./xhtml:div[@class='gcc-directed-graph']", ns) + assert graph is not None + + header = graph.find("./xhtml:h2", ns) + assert header.text == 'foo' + +def test_run_graph(html_tree): + root = html_tree.getroot () + assert root.tag == make_tag('html') + + body = root.find('xhtml:body', ns) + assert body is not None + + graph = body.find("./xhtml:div[@class='gcc-directed-graph']", ns) + assert graph is not None + + header = graph.find("./xhtml:h2", ns) + assert header.text == 'Optimization Passes' diff --git a/gcc/testsuite/sarif-replay.dg/2.1.0-valid/graphs-check-sarif-roundtrip.py b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/graphs-check-sarif-roundtrip.py new file mode 100644 index 0000000..4bb7535 --- /dev/null +++ b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/graphs-check-sarif-roundtrip.py @@ -0,0 +1,55 @@ +from sarif import * + +import pytest + +@pytest.fixture(scope='function', autouse=True) +def sarif(): + return sarif_from_env() + +def test_basics(sarif): + schema = sarif['$schema'] + assert schema == "https://docs.oasis-open.org/sarif/sarif/v2.1.0/errata01/os/schemas/sarif-schema-2.1.0.json" + + version = sarif['version'] + assert version == "2.1.0" + +def test_result_graph(sarif): + runs = sarif['runs'] + run = runs[0] + results = run['results'] + + assert len(results) == 1 + + result = results[0] + assert result['level'] == 'error' + assert result['message']['text'] == "this is a placeholder error, with graphs" + + assert len(result['graphs']) == 2 + + assert result['graphs'][0]['description']['text'] == 'foo' + + assert len(result['graphs'][0]['nodes']) == 2 + assert result['graphs'][0]['nodes'][0]['id'] == 'a' + assert result['graphs'][0]['nodes'][1]['id'] == 'b' + assert result['graphs'][0]['nodes'][1]['properties']['/placeholder-prefix/color'] == 'red' + assert len(result['graphs'][0]['nodes'][1]['children']) == 1 + assert result['graphs'][0]['nodes'][1]['children'][0]['id'] == 'c' + assert result['graphs'][0]['nodes'][1]['children'][0]['label']['text'] == 'I am a node label' + + assert len(result['graphs'][0]['edges']) == 1 + result['graphs'][0]['edges'][0]['id'] == 'my-edge' + assert result['graphs'][0]['edges'][0]['label']['text'] == 'I am an edge label' + assert result['graphs'][0]['edges'][0]['sourceNodeId'] == 'a' + assert result['graphs'][0]['edges'][0]['targetNodeId'] == 'c' + + assert result['graphs'][1]['description']['text'] == 'bar' + +def test_run_graph(sarif): + runs = sarif['runs'] + run = runs[0] + + assert len(run['graphs']) == 1 + + assert run['graphs'][0]['description']['text'] == 'Optimization Passes' + assert run['graphs'][0]['nodes'][0]['id'] == 'all_lowering_passes' + assert run['graphs'][0]['edges'][0]['id'] == 'edge0' diff --git a/gcc/testsuite/sarif-replay.dg/2.1.0-valid/graphs.sarif b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/graphs.sarif new file mode 100644 index 0000000..da236ba --- /dev/null +++ b/gcc/testsuite/sarif-replay.dg/2.1.0-valid/graphs.sarif @@ -0,0 +1,2445 @@ +/* Test a replay of a .sarif file generated from GCC testsuite. + + The dg directives were stripped out from the generated .sarif + to avoid confusing DejaGnu for this test. */ +/* { dg-additional-options "-fdiagnostics-add-output=experimental-html:file=graphs.sarif.html,javascript=no" } */ +/* { dg-additional-options "-fdiagnostics-add-output=sarif:file=graphs.roundtrip.sarif" } */ + +{"$schema": "https://docs.oasis-open.org/sarif/sarif/v2.1.0/errata01/os/schemas/sarif-schema-2.1.0.json", + "version": "2.1.0", + "runs": [{"tool": {"driver": {"name": "GNU C23", + "fullName": "GNU C23 (GCC) version 16.0.0 20250702 (experimental) (x86_64-pc-linux-gnu)", + "version": "16.0.0 20250702 (experimental)", + "informationUri": "https://gcc.gnu.org/gcc-16/", + "rules": []}, + "extensions": [{"name": "diagnostic_plugin_test_graphs", + "fullName": "./diagnostic_plugin_test_graphs.so"}]}, + "invocations": [{"arguments": ["/home/david/gcc-newgit-gcc16/build/gcc/cc1", + "-quiet", + "-iprefix", + "/usr/local/lib/gcc/x86_64-pc-linux-gnu/16.0.0/", + "-isystem", + "/home/david/gcc-newgit-gcc16/build/gcc/include", + "-isystem", + "/home/david/gcc-newgit-gcc16/build/gcc/include-fixed", + "-iplugindir=/home/david/gcc-newgit-gcc16/build/gcc/plugin", + "/home/david/gcc-newgit-gcc16/src/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-sarif.c", + "-iplugindir=/home/david/gcc-newgit-gcc16/build/gcc/plugin", + "-quiet", + "-dumpbase", + "diagnostic-test-graphs-sarif.c", + "-dumpbase-ext", + ".c", + "-mtune=generic", + "-march=x86-64", + "-fdiagnostics-color=never", + "-fdiagnostics-urls=never", + "-fno-diagnostics-show-caret", + "-fno-diagnostics-show-line-numbers", + "-fdiagnostics-path-format=separate-events", + "-fdiagnostics-text-art-charset=none", + "-fno-diagnostics-show-event-links", + "-fplugin=./diagnostic_plugin_test_graphs.so", + "-fdiagnostics-add-output=sarif", + "-o", + "diagnostic-test-graphs-sarif.s"], + "workingDirectory": {"uri": "/home/david/gcc-newgit-gcc16/build/gcc/testsuite/gcc"}, + "startTimeUtc": "2025-07-09T22:43:31Z", + "executionSuccessful": false, + "toolExecutionNotifications": [], + "endTimeUtc": "2025-07-09T22:43:31Z"}], + "artifacts": [{"location": {"uri": "/home/david/gcc-newgit-gcc16/src/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-sarif.c"}, + "sourceLanguage": "c", + "roles": ["analysisTarget"]}], + "results": [{"ruleId": "error", + "level": "error", + "message": {"text": "this is a placeholder error, with graphs"}, + "locations": [{"physicalLocation": {"artifactLocation": {"uri": "/home/david/gcc-newgit-gcc16/src/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-sarif.c"}, + "region": {"startLine": 8, + "startColumn": 3, + "endColumn": 10}, + "contextRegion": {"startLine": 8, + "snippet": {"text": " here ();"}}}, + "logicalLocations": [{"index": 0, + "fullyQualifiedName": "test_graphs"}]}], + "graphs": [{"description": {"text": "foo"}, + "nodes": [{"id": "a"}, + {"id": "b", + "properties": {"/placeholder-prefix/color": "red"}, + "children": [{"id": "c", + "label": {"text": "I am a node label"}}]}], + "edges": [{"id": "my-edge", + "label": {"text": "I am an edge label"}, + "sourceNodeId": "a", + "targetNodeId": "c"}]}, + {"description": {"text": "bar"}, + "nodes": [{"id": "a"}, + {"id": "b", + "properties": {"/placeholder-prefix/color": "red"}, + "children": [{"id": "c", + "label": {"text": "I am a node label"}}]}], + "edges": [{"id": "my-edge", + "label": {"text": "I am an edge label"}, + "sourceNodeId": "a", + "targetNodeId": "c"}]}]}], + "logicalLocations": [{"name": "test_graphs", + "fullyQualifiedName": "test_graphs", + "decoratedName": "test_graphs", + "kind": "function", + "index": 0}], + "graphs": [{"description": {"text": "Optimization Passes"}, + "nodes": [{"id": "all_lowering_passes", + "label": {"text": "all_lowering_passes"}, + "children": [{"id": "*warn_unused_result_0x101ef3d0", + "label": {"text": "*warn_unused_result"}}, + {"id": "*diagnose_omp_blocks_0x101ef430", + "label": {"text": "*diagnose_omp_blocks"}}, + {"id": "*diagnose_tm_blocks_0x101ef490", + "label": {"text": "*diagnose_tm_blocks"}}, + {"id": "13_omp_oacc_kernels_decompose", + "label": {"text": "13_omp_oacc_kernels_decompose"}}, + {"id": "14_omplower", + "label": {"text": "14_omplower"}}, + {"id": "15_lower", + "label": {"text": "15_lower"}}, + {"id": "16_tmlower", + "label": {"text": "16_tmlower"}}, + {"id": "17_ehopt", + "label": {"text": "17_ehopt"}}, + {"id": "18_eh", + "label": {"text": "18_eh"}}, + {"id": "19_coro-lower-builtins", + "label": {"text": "19_coro-lower-builtins"}}, + {"id": "20_cfg", + "label": {"text": "20_cfg"}}, + {"id": "*warn_function_return_0x101ef7f0", + "label": {"text": "*warn_function_return"}}, + {"id": "21_coro-early-expand-ifns", + "label": {"text": "21_coro-early-expand-ifns"}}, + {"id": "22_ompexp", + "label": {"text": "22_ompexp"}}, + {"id": "*build_cgraph_edges_0x101ef910", + "label": {"text": "*build_cgraph_edges"}}]}, + {"id": "all_small_ipa_passes", + "label": {"text": "all_small_ipa_passes"}, + "children": [{"id": "23_afdo_offline", + "label": {"text": "23_afdo_offline"}}, + {"id": "*free_lang_data_0x101ef9d0", + "label": {"text": "*free_lang_data"}}, + {"id": "24_visibility", + "label": {"text": "24_visibility"}}, + {"id": "25_strubm", + "label": {"text": "25_strubm"}}, + {"id": "26_build_ssa_passes", + "label": {"text": "26_build_ssa_passes"}}, + {"id": "27_fixup_cfg", + "label": {"text": "27_fixup_cfg"}}, + {"id": "28_ssa", + "label": {"text": "28_ssa"}}, + {"id": "376_test_graph_emission", + "label": {"text": "376_test_graph_emission"}}, + {"id": "29_walloca", + "label": {"text": "29_walloca"}}, + {"id": "30_warn-printf", + "label": {"text": "30_warn-printf"}}, + {"id": "*nonnullcmp_0x101efce0", + "label": {"text": "*nonnullcmp"}}, + {"id": "31_early_uninit", + "label": {"text": "31_early_uninit"}}, + {"id": "32_waccess", + "label": {"text": "32_waccess"}}, + {"id": "33_ubsan", + "label": {"text": "33_ubsan"}}, + {"id": "34_nothrow", + "label": {"text": "34_nothrow"}}, + {"id": "*rebuild_cgraph_edges_0x101f0020", + "label": {"text": "*rebuild_cgraph_edges"}}, + {"id": "35_opt_local_passes", + "label": {"text": "35_opt_local_passes"}}, + {"id": "36_fixup_cfg", + "label": {"text": "36_fixup_cfg"}}, + {"id": "*rebuild_cgraph_edges_0x101f0140", + "label": {"text": "*rebuild_cgraph_edges"}}, + {"id": "37_local-fnsummary", + "label": {"text": "37_local-fnsummary"}}, + {"id": "38_einline", + "label": {"text": "38_einline"}}, + {"id": "*infinite-recursion_0x101f0260", + "label": {"text": "*infinite-recursion"}}, + {"id": "39_early_optimizations", + "label": {"text": "39_early_optimizations"}}, + {"id": "*remove_cgraph_callee_edges_0x101f0340", + "label": {"text": "*remove_cgraph_callee_edges"}}, + {"id": "40_early_objsz", + "label": {"text": "40_early_objsz"}}, + {"id": "41_ccp", + "label": {"text": "41_ccp"}}, + {"id": "42_forwprop", + "label": {"text": "42_forwprop"}}, + {"id": "43_ethread", + "label": {"text": "43_ethread"}}, + {"id": "44_esra", + "label": {"text": "44_esra"}}, + {"id": "45_ealias", + "label": {"text": "45_ealias"}}, + {"id": "46_phiprop", + "label": {"text": "46_phiprop"}}, + {"id": "47_fre", + "label": {"text": "47_fre"}}, + {"id": "48_evrp", + "label": {"text": "48_evrp"}}, + {"id": "49_mergephi", + "label": {"text": "49_mergephi"}}, + {"id": "50_dse", + "label": {"text": "50_dse"}}, + {"id": "51_cddce", + "label": {"text": "51_cddce"}}, + {"id": "52_phiopt", + "label": {"text": "52_phiopt"}}, + {"id": "53_tailr", + "label": {"text": "53_tailr"}}, + {"id": "54_iftoswitch", + "label": {"text": "54_iftoswitch"}}, + {"id": "55_switchconv", + "label": {"text": "55_switchconv"}}, + {"id": "56_ehcleanup", + "label": {"text": "56_ehcleanup"}}, + {"id": "57_sccopy", + "label": {"text": "57_sccopy"}}, + {"id": "58_profile_estimate", + "label": {"text": "58_profile_estimate"}}, + {"id": "59_local-pure-const", + "label": {"text": "59_local-pure-const"}}, + {"id": "60_modref", + "label": {"text": "60_modref"}}, + {"id": "61_fnsplit", + "label": {"text": "61_fnsplit"}}, + {"id": "*strip_predict_hints_0x101f0c60", + "label": {"text": "*strip_predict_hints"}}, + {"id": "62_release_ssa", + "label": {"text": "62_release_ssa"}}, + {"id": "*rebuild_cgraph_edges_0x101f0d30", + "label": {"text": "*rebuild_cgraph_edges"}}, + {"id": "63_local-fnsummary", + "label": {"text": "63_local-fnsummary"}}, + {"id": "64_remove_symbols", + "label": {"text": "64_remove_symbols"}}, + {"id": "65_strub", + "label": {"text": "65_strub"}}, + {"id": "66_ipa_oacc", + "label": {"text": "66_ipa_oacc"}}, + {"id": "67_pta", + "label": {"text": "67_pta"}}, + {"id": "68_ipa_oacc_kernels", + "label": {"text": "68_ipa_oacc_kernels"}}, + {"id": "69_oacc_kernels", + "label": {"text": "69_oacc_kernels"}}, + {"id": "70_ch", + "label": {"text": "70_ch"}}, + {"id": "71_fre", + "label": {"text": "71_fre"}}, + {"id": "72_lim", + "label": {"text": "72_lim"}}, + {"id": "73_dom", + "label": {"text": "73_dom"}}, + {"id": "74_dce", + "label": {"text": "74_dce"}}, + {"id": "75_parloops", + "label": {"text": "75_parloops"}}, + {"id": "76_ompexpssa", + "label": {"text": "76_ompexpssa"}}, + {"id": "*rebuild_cgraph_edges_0x101f1310", + "label": {"text": "*rebuild_cgraph_edges"}}, + {"id": "77_targetclone", + "label": {"text": "77_targetclone"}}, + {"id": "78_afdo", + "label": {"text": "78_afdo"}}, + {"id": "79_feedback_fnsplit", + "label": {"text": "79_feedback_fnsplit"}}, + {"id": "80_profile", + "label": {"text": "80_profile"}}, + {"id": "81_feedback_fnsplit", + "label": {"text": "81_feedback_fnsplit"}}, + {"id": "82_free-fnsummary", + "label": {"text": "82_free-fnsummary"}}, + {"id": "83_increase_alignment", + "label": {"text": "83_increase_alignment"}}, + {"id": "84_tmipa", + "label": {"text": "84_tmipa"}}, + {"id": "85_emutls", + "label": {"text": "85_emutls"}}]}, + {"id": "all_regular_ipa_passes", + "label": {"text": "all_regular_ipa_passes"}, + "children": [{"id": "86_analyzer", + "label": {"text": "86_analyzer"}}, + {"id": "87_odr", + "label": {"text": "87_odr"}}, + {"id": "88_whole-program", + "label": {"text": "88_whole-program"}}, + {"id": "89_profile_estimate", + "label": {"text": "89_profile_estimate"}}, + {"id": "90_icf", + "label": {"text": "90_icf"}}, + {"id": "91_devirt", + "label": {"text": "91_devirt"}}, + {"id": "92_cdtor", + "label": {"text": "92_cdtor"}}, + {"id": "93_cp", + "label": {"text": "93_cp"}}, + {"id": "94_sra", + "label": {"text": "94_sra"}}, + {"id": "95_fnsummary", + "label": {"text": "95_fnsummary"}}, + {"id": "96_inline", + "label": {"text": "96_inline"}}, + {"id": "97_locality-clone", + "label": {"text": "97_locality-clone"}}, + {"id": "98_pure-const", + "label": {"text": "98_pure-const"}}, + {"id": "99_modref", + "label": {"text": "99_modref"}}, + {"id": "100_free-fnsummary", + "label": {"text": "100_free-fnsummary"}}, + {"id": "101_static-var", + "label": {"text": "101_static-var"}}, + {"id": "102_single-use", + "label": {"text": "102_single-use"}}, + {"id": "103_comdats", + "label": {"text": "103_comdats"}}]}, + {"id": "all_late_ipa_passes", + "label": {"text": "all_late_ipa_passes"}, + "children": [{"id": "104_pta", + "label": {"text": "104_pta"}}, + {"id": "105_simdclone", + "label": {"text": "105_simdclone"}}]}, + {"id": "all_passes", + "label": {"text": "all_passes"}, + "children": [{"id": "106_fixup_cfg", + "label": {"text": "106_fixup_cfg"}}, + {"id": "107_ehdisp", + "label": {"text": "107_ehdisp"}}, + {"id": "108_oaccloops", + "label": {"text": "108_oaccloops"}}, + {"id": "109_omp_oacc_neuter_broadcast", + "label": {"text": "109_omp_oacc_neuter_broadcast"}}, + {"id": "110_oaccdevlow", + "label": {"text": "110_oaccdevlow"}}, + {"id": "111_ompdevlow", + "label": {"text": "111_ompdevlow"}}, + {"id": "112_omptargetlink", + "label": {"text": "112_omptargetlink"}}, + {"id": "113_adjust_alignment", + "label": {"text": "113_adjust_alignment"}}, + {"id": "114_hardcfr", + "label": {"text": "114_hardcfr"}}, + {"id": "*all_optimizations_0x101f2720", + "label": {"text": "*all_optimizations"}}, + {"id": "*remove_cgraph_callee_edges_0x101f2780", + "label": {"text": "*remove_cgraph_callee_edges"}}, + {"id": "*strip_predict_hints_0x101f27e0", + "label": {"text": "*strip_predict_hints"}}, + {"id": "115_ccp", + "label": {"text": "115_ccp"}}, + {"id": "116_objsz", + "label": {"text": "116_objsz"}}, + {"id": "117_post_ipa_warn", + "label": {"text": "117_post_ipa_warn"}}, + {"id": "118_waccess", + "label": {"text": "118_waccess"}}, + {"id": "119_rebuild_frequencies", + "label": {"text": "119_rebuild_frequencies"}}, + {"id": "120_cunrolli", + "label": {"text": "120_cunrolli"}}, + {"id": "121_backprop", + "label": {"text": "121_backprop"}}, + {"id": "122_phiprop", + "label": {"text": "122_phiprop"}}, + {"id": "123_forwprop", + "label": {"text": "123_forwprop"}}, + {"id": "124_alias", + "label": {"text": "124_alias"}}, + {"id": "125_retslot", + "label": {"text": "125_retslot"}}, + {"id": "126_fre", + "label": {"text": "126_fre"}}, + {"id": "127_mergephi", + "label": {"text": "127_mergephi"}}, + {"id": "128_threadfull", + "label": {"text": "128_threadfull"}}, + {"id": "129_vrp", + "label": {"text": "129_vrp"}}, + {"id": "130_bounds", + "label": {"text": "130_bounds"}}, + {"id": "131_dse", + "label": {"text": "131_dse"}}, + {"id": "132_dce", + "label": {"text": "132_dce"}}, + {"id": "133_stdarg", + "label": {"text": "133_stdarg"}}, + {"id": "134_cdce", + "label": {"text": "134_cdce"}}, + {"id": "135_cselim", + "label": {"text": "135_cselim"}}, + {"id": "136_copyprop", + "label": {"text": "136_copyprop"}}, + {"id": "137_ifcombine", + "label": {"text": "137_ifcombine"}}, + {"id": "138_mergephi", + "label": {"text": "138_mergephi"}}, + {"id": "139_phiopt", + "label": {"text": "139_phiopt"}}, + {"id": "140_tailr", + "label": {"text": "140_tailr"}}, + {"id": "141_ch", + "label": {"text": "141_ch"}}, + {"id": "142_cplxlower", + "label": {"text": "142_cplxlower"}}, + {"id": "143_bitintlower", + "label": {"text": "143_bitintlower"}}, + {"id": "144_sra", + "label": {"text": "144_sra"}}, + {"id": "145_thread", + "label": {"text": "145_thread"}}, + {"id": "146_dom", + "label": {"text": "146_dom"}}, + {"id": "147_copyprop", + "label": {"text": "147_copyprop"}}, + {"id": "148_isolate-paths", + "label": {"text": "148_isolate-paths"}}, + {"id": "149_reassoc", + "label": {"text": "149_reassoc"}}, + {"id": "150_dce", + "label": {"text": "150_dce"}}, + {"id": "151_forwprop", + "label": {"text": "151_forwprop"}}, + {"id": "152_phiopt", + "label": {"text": "152_phiopt"}}, + {"id": "153_ccp", + "label": {"text": "153_ccp"}}, + {"id": "154_pow", + "label": {"text": "154_pow"}}, + {"id": "155_bswap", + "label": {"text": "155_bswap"}}, + {"id": "156_laddress", + "label": {"text": "156_laddress"}}, + {"id": "157_lim", + "label": {"text": "157_lim"}}, + {"id": "158_walloca", + "label": {"text": "158_walloca"}}, + {"id": "159_pre", + "label": {"text": "159_pre"}}, + {"id": "160_sink", + "label": {"text": "160_sink"}}, + {"id": "161_sancov", + "label": {"text": "161_sancov"}}, + {"id": "162_asan", + "label": {"text": "162_asan"}}, + {"id": "163_tsan", + "label": {"text": "163_tsan"}}, + {"id": "164_dse", + "label": {"text": "164_dse"}}, + {"id": "165_dce", + "label": {"text": "165_dce"}}, + {"id": "166_fix_loops", + "label": {"text": "166_fix_loops"}}, + {"id": "167_loop", + "label": {"text": "167_loop"}}, + {"id": "168_loopinit", + "label": {"text": "168_loopinit"}}, + {"id": "169_unswitch", + "label": {"text": "169_unswitch"}}, + {"id": "170_lsplit", + "label": {"text": "170_lsplit"}}, + {"id": "171_sccp", + "label": {"text": "171_sccp"}}, + {"id": "172_lversion", + "label": {"text": "172_lversion"}}, + {"id": "173_unrolljam", + "label": {"text": "173_unrolljam"}}, + {"id": "174_cddce", + "label": {"text": "174_cddce"}}, + {"id": "175_ivcanon", + "label": {"text": "175_ivcanon"}}, + {"id": "176_ldist", + "label": {"text": "176_ldist"}}, + {"id": "177_crc", + "label": {"text": "177_crc"}}, + {"id": "178_linterchange", + "label": {"text": "178_linterchange"}}, + {"id": "179_copyprop", + "label": {"text": "179_copyprop"}}, + {"id": "180_graphite0", + "label": {"text": "180_graphite0"}}, + {"id": "181_graphite", + "label": {"text": "181_graphite"}}, + {"id": "182_lim", + "label": {"text": "182_lim"}}, + {"id": "183_copyprop", + "label": {"text": "183_copyprop"}}, + {"id": "184_dce", + "label": {"text": "184_dce"}}, + {"id": "185_parloops", + "label": {"text": "185_parloops"}}, + {"id": "186_ompexpssa", + "label": {"text": "186_ompexpssa"}}, + {"id": "187_ch_vect", + "label": {"text": "187_ch_vect"}}, + {"id": "188_ifcvt", + "label": {"text": "188_ifcvt"}}, + {"id": "189_vect", + "label": {"text": "189_vect"}}, + {"id": "190_dce", + "label": {"text": "190_dce"}}, + {"id": "191_pcom", + "label": {"text": "191_pcom"}}, + {"id": "192_cunroll", + "label": {"text": "192_cunroll"}}, + {"id": "*pre_slp_scalar_cleanup_0x101f4880", + "label": {"text": "*pre_slp_scalar_cleanup"}}, + {"id": "193_fre", + "label": {"text": "193_fre"}}, + {"id": "194_dse", + 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"113_adjust_alignment"}, + {"id": "edge381", + "label": {"text": "next"}, + "sourceNodeId": "111_ompdevlow", + "targetNodeId": "112_omptargetlink"}, + {"id": "edge382", + "label": {"text": "next"}, + "sourceNodeId": "110_oaccdevlow", + "targetNodeId": "111_ompdevlow"}, + {"id": "edge383", + "label": {"text": "next"}, + "sourceNodeId": "109_omp_oacc_neuter_broadcast", + "targetNodeId": "110_oaccdevlow"}, + {"id": "edge384", + "label": {"text": "next"}, + "sourceNodeId": "108_oaccloops", + "targetNodeId": "109_omp_oacc_neuter_broadcast"}, + {"id": "edge385", + "label": {"text": "next"}, + "sourceNodeId": "107_ehdisp", + "targetNodeId": "108_oaccloops"}, + {"id": "edge386", + "label": {"text": "next"}, + "sourceNodeId": "106_fixup_cfg", + "targetNodeId": "107_ehdisp"}]}]}]} + +/* { dg-begin-multiline-output "" } +In function 'test_graphs': +/home/david/gcc-newgit-gcc16/src/gcc/testsuite/gcc.dg/plugin/diagnostic-test-graphs-sarif.c:8:3: error: this is a placeholder error, with graphs + { dg-end-multiline-output "" } */ + +/* Use a Python script to verify various properties about the generated + .html file: + { dg-final { run-html-pytest graphs.sarif "2.1.0-valid/graphs-check-html.py" } } */ + +/* Use a Python script to verify various properties about the *generated* + .sarif file: + { dg-final { run-sarif-pytest graphs.roundtrip "2.1.0-valid/graphs-check-sarif-roundtrip.py" } } */ |