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-rw-r--r--gcc/testsuite/lib/gcc-defs.exp16
-rw-r--r--gcc/testsuite/lib/gcc-dg.exp4
-rw-r--r--gcc/testsuite/lib/profopt.exp2
-rw-r--r--gcc/testsuite/lib/sarif.py2
-rw-r--r--gcc/testsuite/lib/scanasm.exp4
-rw-r--r--gcc/testsuite/lib/target-supports.exp73
6 files changed, 88 insertions, 13 deletions
diff --git a/gcc/testsuite/lib/gcc-defs.exp b/gcc/testsuite/lib/gcc-defs.exp
index 2f8b7d4..d66c833 100644
--- a/gcc/testsuite/lib/gcc-defs.exp
+++ b/gcc/testsuite/lib/gcc-defs.exp
@@ -599,15 +599,16 @@ proc aarch64-arch-dg-options { args } {
set add_arch 1
set add_tune 1
+ set add_override 1
set checks_output [string equal [lindex $do_what 0] "compile"]
set options [lindex $args 1]
foreach option [split $options] {
switch -glob -- $option {
-march=* { set add_arch 0 }
- -mcpu=* { set add_arch 0; set add_tune 0 }
- -mtune=* { set add_tune 0 }
- -moverride=* { set add_tune 0 }
+ -mcpu=* { set add_arch 0; set add_tune 0; set add_override 0}
+ -mtune=* { set add_tune 0; set add_override 0 }
+ -moverride=* { set add_override 0 }
-save-temps { set checks_output 1 }
--save-temps { set checks_output 1 }
-fdump* { set checks_output 1 }
@@ -619,9 +620,14 @@ proc aarch64-arch-dg-options { args } {
append options " $aarch64_default_testing_arch"
}
- if { $add_tune && $checks_output } {
+ if { $checks_output } {
# Turn off any default tuning and codegen tweaks.
- append options " -mtune=generic -moverride=tune=none"
+ if { $add_tune } {
+ append options " -mtune=generic"
+ }
+ if { $add_override } {
+ append options " -moverride=tune=none"
+ }
}
uplevel 1 aarch64-old-dg-options [lreplace $args 1 1 $options]
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index 312c4b8..859a943 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -1338,8 +1338,8 @@ proc dg-missed { args } {
}
# Look for messages with 'note: ' prefixes.
-# In addition to standard compiler diagnostics ('DK_NOTE', 'inform' functions,
-# "for additional details on an error message"),
+# In addition to standard compiler diagnostics (diagnostics::kind::note,
+# 'inform' functions, "for additional details on an error message"),
# this also includes output from '-fopt-info' for 'MSG_NOTE':
# a general optimization info.
# By default, any *excess* notes are pruned, meaning their appearance doesn't
diff --git a/gcc/testsuite/lib/profopt.exp b/gcc/testsuite/lib/profopt.exp
index b4d244b..81d86c6 100644
--- a/gcc/testsuite/lib/profopt.exp
+++ b/gcc/testsuite/lib/profopt.exp
@@ -382,6 +382,7 @@ proc profopt-execute { src } {
unsupported "$testcase"
unset testname_with_flags
verbose "$src not supported on this target, skipping it" 3
+ cleanup-after-saved-dg-test
return
}
@@ -458,6 +459,7 @@ proc profopt-execute { src } {
unsupported "$testcase -fauto-profile: cannot run create_gcov"
unset testname_with_flags
set status "fail"
+ cleanup-after-saved-dg-test
return
}
set status [remote_wait "" 300]
diff --git a/gcc/testsuite/lib/sarif.py b/gcc/testsuite/lib/sarif.py
index 06d05c0..d75a87e 100644
--- a/gcc/testsuite/lib/sarif.py
+++ b/gcc/testsuite/lib/sarif.py
@@ -30,7 +30,7 @@ def get_result_by_index(sarif, idx):
return results[idx]
def get_state_graph(events, event_idx):
- graph = events[event_idx]['properties']['gcc/diagnostic_event/state_graph']
+ graph = events[event_idx]['properties']['gcc/diagnostics/paths/event/state_graph']
if 0:
print(graph)
assert graph is not None
diff --git a/gcc/testsuite/lib/scanasm.exp b/gcc/testsuite/lib/scanasm.exp
index a2311de..51952a6 100644
--- a/gcc/testsuite/lib/scanasm.exp
+++ b/gcc/testsuite/lib/scanasm.exp
@@ -896,6 +896,10 @@ proc configure_check-function-bodies { config } {
set up_config(fluff) {^\s*(?://)}
} elseif { [istarget *-*-darwin*] } {
set up_config(fluff) {^\s*(?:\.|//|@)|^L[0-9ABCESV]}
+ } elseif { [istarget s390*-*-*] } {
+ # Additionally to the defaults skip lines beginning with a # resulting
+ # from inline asm.
+ set up_config(fluff) {^\s*(?:\.|//|@|$|#)}
} else {
# Skip lines beginning with labels ('.L[...]:') or other directives
# ('.align', '.cfi_startproc', '.quad [...]', '.text', etc.), '//' or
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 4486a6a..7435519 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1017,6 +1017,18 @@ proc check_effective_target_label_values {} {
return 1
}
+
+# Return 1 if builtin_trap expands not into a call but an instruction,
+# 0 otherwise.
+proc check_effective_target_trap { } {
+ return [check_no_messages_and_pattern trap "!\\(call" rtl-expand {
+ void foo ()
+ {
+ return __builtin_trap ();
+ }
+ } "" ]
+}
+
# Return 1 if builtin_return_address and builtin_frame_address are
# supported, 0 otherwise.
@@ -2428,7 +2440,7 @@ proc check_effective_target_riscv_v_misalign_ok { } {
= {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
asm ("vsetivli zero,7,e8,m1,ta,ma");
asm ("addi a7,%0,1" : : "r" (a) : "a7" );
- asm ("vle8.v v8,0(a7)" : : : "v8");
+ asm ("vle16.v v8,0(a7)" : : : "v8");
return 0; } } "-march=${gcc_march}"] } {
return 1
}
@@ -2685,6 +2697,14 @@ proc remove_options_for_riscv_zvbb { flags } {
return [add_options_for_riscv_z_ext zvbb $flags]
}
+proc add_options_for_riscv_zvfh { flags } {
+ return [add_options_for_riscv_z_ext zvfh $flags]
+}
+
+proc remove_options_for_riscv_zvfh { flags } {
+ return [add_options_for_riscv_z_ext zvfh $flags]
+}
+
# Return 1 if the target is ia32 or x86_64.
proc check_effective_target_x86 { } {
@@ -5800,6 +5820,13 @@ proc add_options_for_aarch64_sve { flags } {
return "$flags -march=armv8.2-a+sve"
}
+proc add_options_for_aarch64_sme { flags } {
+ if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sme] } {
+ return "$flags"
+ }
+ return "$flags -march=armv9-a+sme"
+}
+
# Return 1 if this is an ARM target supporting the FP16 alternative
# format. Some multilibs may be incompatible with the options needed. Also
# set et_arm_fp16_alternative_flags to the best options to add.
@@ -6539,6 +6566,22 @@ foreach N { 128 256 512 1024 2048 } {
}]
}
+# Return true if this is an AArch64 target that can run SME code.
+
+proc check_effective_target_aarch64_sme_hw { } {
+ if { ![istarget aarch64*-*-*] } {
+ return 0
+ }
+ return [check_runtime aarch64_sme_hw_available {
+ int
+ main (void)
+ {
+ asm volatile ("rdsvl x0, #1");
+ return 0;
+ }
+ } [add_options_for_aarch64_sme ""]]
+}
+
proc check_effective_target_arm_neonv2_hw { } {
return [check_runtime arm_neon_hwv2_available {
#include "arm_neon.h"
@@ -12479,10 +12522,16 @@ proc check_effective_target_aarch64_gas_has_build_attributes { } {
# various architecture extensions via the .arch_extension pseudo-op.
set exts {
- "bf16" "cmpbr" "crc" "crypto" "dotprod" "f32mm" "f64mm" "fp" "fp8"
- "fp8dot2" "fp8dot4" "fp8fma" "i8mm" "ls64" "lse" "lut" "sb" "simd"
- "sme-b16b16" "sme-f16f16" "sme-i16i64" "sme" "sme2" "sme2p1" "ssve-fp8dot2"
- "ssve-fp8dot4" "ssve-fp8fma" "sve-b16b16" "sve" "sve2"
+ "bf16" "cmpbr" "crc" "crypto" "dotprod" "f32mm" "f64mm" "faminmax"
+ "fp" "fp8" "fp8dot2" "fp8dot4" "fp8fma" "i8mm" "ls64" "lse" "lut"
+ "sb" "simd" "sve-b16b16" "sve" "sve2"
+}
+
+# We don't support SME without SVE2, so we'll use armv9 as the base
+# archiecture for SME and the features that require it.
+set exts_sve2 {
+ "sme-b16b16" "sme-f16f16" "sme-i16i64" "sme" "sme2" "sme2p1"
+ "ssve-fp8dot2" "ssve-fp8dot4" "ssve-fp8fma"
}
foreach { aarch64_ext } $exts {
@@ -12499,6 +12548,20 @@ foreach { aarch64_ext } $exts {
}]
}
+foreach { aarch64_ext } $exts_sve2 {
+ eval [string map [list FUNC $aarch64_ext] {
+ proc check_effective_target_aarch64_asm_FUNC_ok { } {
+ if { [istarget aarch64*-*-*] } {
+ return [check_no_compiler_messages aarch64_FUNC_assembler object {
+ __asm__ (".arch_extension FUNC");
+ } "-march=armv9-a+FUNC"]
+ } else {
+ return 0
+ }
+ }
+ }]
+}
+
proc check_effective_target_aarch64_asm_sve2p1_ok { } {
if { [istarget aarch64*-*-*] } {
return [check_no_compiler_messages aarch64_sve2p1_assembler object {
generated by cgit v1.1 at 2025-08-02 07:47:41 +0000