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| author | Haochen Jiang <haochen.jiang@intel.com> | 2025-03-28 16:16:27 +0800 |
|---|---|---|
| committer | Haochen Jiang <haochen.jiang@intel.com> | 2025-04-08 10:29:55 +0800 |
| commit | 2b809d6f4fb62aeccf482a889bc2775e5d94ef80 (patch) | |
| tree | a35fccf60d3b5ecfe0f9ffbd682fc012407950b0 /gcc/rust/backend/rust-compile-expr.cc | |
| parent | 196b45caca0aae57a95bffcdd5c188994317de08 (diff) | |
| download | gcc-2b809d6f4fb62aeccf482a889bc2775e5d94ef80.zip gcc-2b809d6f4fb62aeccf482a889bc2775e5d94ef80.tar.gz gcc-2b809d6f4fb62aeccf482a889bc2775e5d94ef80.tar.bz2 | |
i386: Add PTA_AVX10_1_256 to PTA_DIAMONDRAPIDS
For -march= handling, PTA_AVX10_1 will not imply PTA_AVX10_1_256,
resulting in TARGET_AVX10_1 becoming true while TARGET_AVX10_1_256
false. Since we will check TARGET_AVX10_1_256 in GCC 15 for AVX512
feature enabling for AVX10, -march=diamondrapids will not enable
512 bit register and x/ymm16+.
Since AVX10 will get a further clean up in GCC 16 and will help
PTA_DIAMONDRAPIDS reusing PTA_GRANITERAPIDS_D, the imply would become
obvious again, I plan not to add the testcase but just to fix the issue
in GCC 15.
gcc/ChangeLog:
* config/i386/i386.h (PTA_DIAMONDRAPIDS): Add PTA_AVX10_1_256.
Diffstat (limited to 'gcc/rust/backend/rust-compile-expr.cc')
0 files changed, 0 insertions, 0 deletions