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authorJiawei <jiawei@iscas.ac.cn>2025-05-10 19:26:35 +0800
committerJiawei <jiawei@iscas.ac.cn>2025-05-11 11:45:56 +0800
commit66d17ba3cb47980455ee9d6b4123dce61aef2fa2 (patch)
treeb552dee84e624dc71f1de528153cfabc8d991821 /gcc/common
parent43b450e3f72a53c744e77f55393962f1d349373a (diff)
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RISC-V: Support RISC-V Profiles 23.
This patch introduces support for RISC-V Profiles RV23A and RV23B [1], enabling developers to utilize these profiles through the -march option. [1] https://github.com/riscv/riscv-profiles/releases/tag/rva23-rvb23-ratified Version log: Update the testcases, using lowercase letter. gcc/ChangeLog: * common/config/riscv/riscv-common.cc: New profile. gcc/testsuite/ChangeLog: * gcc.target/riscv/arch-53.c: New test. * gcc.target/riscv/arch-54.c: New test.
Diffstat (limited to 'gcc/common')
-rw-r--r--gcc/common/config/riscv/riscv-common.cc16
1 files changed, 16 insertions, 0 deletions
diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc
index 0fa2e21..e06cd5f 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -527,6 +527,22 @@ static const riscv_profiles riscv_profiles_table[] =
"_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
"_zicboz_zfhmin_zkt"},
+ /* RVA23 contains all mandatory base ISA for RVA22U64 and the new extension
+ 'v,zihintntl,zvfhmin,zvbb,zvkt,zicond,zimop,zcmop,zfa,zawrs' as mandatory
+ extensions. */
+ {"rva23u64", "rv64imafdcv_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt_zvfhmin_zvbb_zvkt_zihintntl_zicond_zimop_zcmop_zcb"
+ "_zfa_zawrs"},
+
+ /* RVB23 contains all mandatory base ISA for RVA22U64 and the new extension
+ 'zihintntl,zicond,zimop,zcmop,zfa,zawrs' as mandatory
+ extensions. */
+ {"rvb23u64", "rv64imafdc_zicsr_zicntr_zihpm_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt_zihintntl_zicond_zimop_zcmop_zcb"
+ "_zfa_zawrs"},
+
/* Currently we do not define S/M mode Profiles in gcc part. */
/* Terminate the list. */