diff options
Diffstat (limited to 'sim/riscv')
| -rw-r--r-- | sim/riscv/acinclude.m4 | 2 | ||||
| -rw-r--r-- | sim/riscv/interp.c | 2 | ||||
| -rw-r--r-- | sim/riscv/local.mk | 2 | ||||
| -rw-r--r-- | sim/riscv/machs.c | 2 | ||||
| -rw-r--r-- | sim/riscv/machs.h | 2 | ||||
| -rw-r--r-- | sim/riscv/riscv-sim.h | 2 | ||||
| -rw-r--r-- | sim/riscv/sim-main.c | 4 | ||||
| -rw-r--r-- | sim/riscv/sim-main.h | 2 |
8 files changed, 9 insertions, 9 deletions
diff --git a/sim/riscv/acinclude.m4 b/sim/riscv/acinclude.m4 index 0c6290c..9a10f35 100644 --- a/sim/riscv/acinclude.m4 +++ b/sim/riscv/acinclude.m4 @@ -1,4 +1,4 @@ -dnl Copyright (C) 2022-2024 Free Software Foundation, Inc. +dnl Copyright (C) 2022-2025 Free Software Foundation, Inc. dnl dnl This program is free software; you can redistribute it and/or modify dnl it under the terms of the GNU General Public License as published by diff --git a/sim/riscv/interp.c b/sim/riscv/interp.c index 15e6b17..c94cf9c 100644 --- a/sim/riscv/interp.c +++ b/sim/riscv/interp.c @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2024 Free Software Foundation, Inc. + Copyright (C) 2005-2025 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. diff --git a/sim/riscv/local.mk b/sim/riscv/local.mk index c9e3717..7de18ce 100644 --- a/sim/riscv/local.mk +++ b/sim/riscv/local.mk @@ -1,6 +1,6 @@ ## See sim/Makefile.am ## -## Copyright (C) 2005-2024 Free Software Foundation, Inc. +## Copyright (C) 2005-2025 Free Software Foundation, Inc. ## Written by Mike Frysinger. ## ## This program is free software; you can redistribute it and/or modify diff --git a/sim/riscv/machs.c b/sim/riscv/machs.c index 77ae000..c20a09e 100644 --- a/sim/riscv/machs.c +++ b/sim/riscv/machs.c @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2024 Free Software Foundation, Inc. + Copyright (C) 2005-2025 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. diff --git a/sim/riscv/machs.h b/sim/riscv/machs.h index 0a24c16..cd39c1d 100644 --- a/sim/riscv/machs.h +++ b/sim/riscv/machs.h @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2024 Free Software Foundation, Inc. + Copyright (C) 2005-2025 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. diff --git a/sim/riscv/riscv-sim.h b/sim/riscv/riscv-sim.h index 345e683..64caec7 100644 --- a/sim/riscv/riscv-sim.h +++ b/sim/riscv/riscv-sim.h @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2024 Free Software Foundation, Inc. + Copyright (C) 2005-2025 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of the GNU simulators. diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index 378e6f1..172c593 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2024 Free Software Foundation, Inc. + Copyright (C) 2005-2025 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. @@ -1302,7 +1302,7 @@ execute_one (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op) case INSN_CLASS_ZAAMO: case INSN_CLASS_ZALRSC: return execute_a (cpu, iw, op); - case INSN_CLASS_C: + case INSN_CLASS_ZCA: /* Check whether model with C extension is selected. */ if (riscv_cpu->csr.misa & 4) return execute_c (cpu, iw, op); diff --git a/sim/riscv/sim-main.h b/sim/riscv/sim-main.h index 053c0e8..61ccfbc 100644 --- a/sim/riscv/sim-main.h +++ b/sim/riscv/sim-main.h @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2024 Free Software Foundation, Inc. + Copyright (C) 2005-2025 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. |