rocket-tools/fsf-binutils-gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-10-04	RISC-V: Fix buffer overflow on print_insn_riscv	Tsukasa OI	1	-0/+2
2022-10-04	RISC-V: Renamed INSN_CLASS for floating point in integer extensions.	Nelson Chu	1	-7/+7
2022-10-04	RISC-V/gas: allow generating up to 176-bit instructions with .insn	Jan Beulich	1	-0/+3
2022-09-23	RISC-V: Add Zawrs ISA extension support	Christoph Müllner	1	-0/+1
2022-09-22	RISC-V: Add T-Head MemPair vendor extension	Christoph Müllner	1	-0/+1
2022-09-22	RISC-V: Add T-Head MemIdx vendor extension	Christoph Müllner	1	-0/+1
2022-09-22	RISC-V: Add T-Head FMemIdx vendor extension	Christoph Müllner	1	-0/+1
2022-09-22	RISC-V: Add T-Head MAC vendor extension	Christoph Müllner	1	-0/+1
2022-09-22	RISC-V: Add T-Head CondMov vendor extension	Christoph Müllner	1	-0/+1
2022-09-22	RISC-V: Add T-Head Bitmanip vendor extension	Christoph Müllner	1	-0/+3
2022-09-22	RISC-V: Add support for arbitrary immediate encoding formats	Christoph Müllner	1	-0/+17
2022-09-22	RISC-V: Add T-Head SYNC vendor extension	Christoph Müllner	1	-0/+1
2022-09-22	RISC-V: Add T-Head CMO vendor extension	Christoph Müllner	1	-0/+1
2022-08-30	RISC-V: Add 'Zmmul' extension in assembler.	Tsukasa OI	1	-0/+1
2022-07-07	RISC-V: Added Zfhmin and Zhinxmin.	Tsukasa OI	1	-3/+4
2022-06-22	RISC-V: Use single h extension to control hypervisor CSRs and instructions.	Nelson Chu	1	-0/+1
2022-05-30	RISC-V: Add zhinx extension supports.	jiawei	1	-2/+3
2022-05-17	RISC-V: Added half-precision floating-point v1.0 instructions.	Nelson Chu	1	-0/+5
2022-03-18	RISC-V: Cache management instructions	Tsukasa OI	1	-0/+2
2022-03-18	RISC-V: Prefetch hint instructions and operand set	Tsukasa OI	1	-0/+1
2022-01-02	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2021-12-16	RISC-V: Support svinval extension with frozen version 1.0.	Nelson Chu	1	-0/+1
2021-11-30	RISC-V: The vtype immediate with more than the defined 8 bits are preserved.	Nelson Chu	1	-2/+0
2021-11-18	RISC-V: Add instructions and operand set for z[fdq]inx	jiawei	1	-0/+3
2021-11-17	RISC-V: Support rvv extension with released version 1.0.	Nelson Chu	1	-0/+58
2021-11-16	RISC-V: Scalar crypto instructions and operand set.	jiawei	1	-0/+18
2021-10-07	RISC-V: Add support for Zbs instructions	Philipp Tomsich	1	-0/+1
2021-08-30	RISC-V: PR27916, Support mapping symbols.	Nelson Chu	1	-0/+7
2021-03-16	RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructions	Kuan-Lin Chen	1	-0/+3
2021-02-19	RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.	Nelson Chu	1	-64/+71
2021-02-18	RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling.	Nelson Chu	1	-69/+0
2021-02-05	RISC-V: PR27348, Remove the obsolete OP_*CUSTOM_IMM.	Nelson Chu	1	-2/+0
2021-02-04	RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instructions.	Nelson Chu	1	-4/+0
2021-01-15	RISC-V: Indent and GNU coding standards tidy, also aligned the code.	Nelson Chu	1	-44/+51
2021-01-15	RISC-V: Comments tidy and improvement.	Nelson Chu	1	-23/+9
2021-01-07	RISC-V: Add pause hint instruction.	Philipp Tomsich	1	-0/+1
2021-01-07	RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instructions (v0.93).	Claire Xenia Wolf	1	-1/+6
2021-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2020-12-10	RISC-V: Add sext.[bh] and zext.[bhw] pseudo instructions.	Nelson Chu	1	-0/+4
2020-12-10	RISC-V: Control fence.i and csr instructions by zifencei and zicsr.	Nelson Chu	1	-2/+4
2020-12-01	RISC-V: Support to add implicit extensions for G.	Nelson Chu	1	-0/+2
2020-12-01	RISC-V: Improve the version parsing for arch string.	Nelson Chu	1	-2/+2
2020-08-31	PR26493 UBSAN: elfnn-riscv.c left shift of negative value	Alan Modra	1	-4/+4
2020-06-30	RISC-V: Support debug and float CSR as the unprivileged ones.	Nelson Chu	1	-0/+1
2020-06-22	RISC-V: Report warning when linking the objects with different priv specs.	Nelson Chu	1	-4/+0
2020-06-12	RISC-V: Drop the privileged spec v1.9 support.	Nelson Chu	1	-1/+0
2020-06-03	RISC-V: Fix the error when building RISC-V linux native gdbserver.	Nelson Chu	1	-3/+2
2020-05-20	[PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...	Nelson Chu	1	-0/+76
2020-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2019-09-17	RISC-V: Gate opcode tables by enum rather than string.	Jim Wilson	1	-3/+20