aboutsummaryrefslogtreecommitdiff
path: root/include/opcode
diff options
context:
space:
mode:
authorLulu Cai <cailulu@loongson.cn>2025-12-13 15:33:15 +0800
committercailulu <cailulu@loongson.cn>2025-12-20 10:49:47 +0800
commit8bea934667cdf3046dd388e9d07ca055d4ff5277 (patch)
treed38204560559b41a9ce171b124d30107800c4807 /include/opcode
parent28e9d214f9649f8736462b59f18712fb358c5784 (diff)
downloadfsf-binutils-gdb-8bea934667cdf3046dd388e9d07ca055d4ff5277.tar.gz
fsf-binutils-gdb-8bea934667cdf3046dd388e9d07ca055d4ff5277.tar.bz2
fsf-binutils-gdb-8bea934667cdf3046dd388e9d07ca055d4ff5277.zip
LoongArch: Add disassembly support for ud ui5
ud ui5, also known as amswap.w rd,$r1,rj(rd==rj), is displayed as "ud ui5" by default during disassembly. Alternatively, the original instruction can be printed using the objdump -M no-aliases. To implement this support, a format specifier "ru0:5,ru5:5" for ud is applied exclusively during disassembly. This specifier indicates that registers should be printed using their corresponding numeric values, and when the instruction is identified as ud, only a single parameter is displayed. binutils/ * testsuite/binutils-all/loongarch64/dis-amswap-ud-noaliases.d: New test. * testsuite/binutils-all/loongarch64/dis-amswap-ud.d: New test. * testsuite/binutils-all/loongarch64/dis-amswap-ud.s: New test. gas/ * testsuite/gas/loongarch/macro_ud.d: Update test. include/ * opcode/loongarch.h: New macro. opcodes/ * loongarch-dis.c (get_loongarch_opcode_by_binfmt): Correct match `ud`. (dis_one_arg): Disassemble the `ud` parameter. * loongarch-opc.c: Add opcode for "ud" alias.
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/loongarch.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/opcode/loongarch.h b/include/opcode/loongarch.h
index fb6f8be68de..3e8a90a2b27 100644
--- a/include/opcode/loongarch.h
+++ b/include/opcode/loongarch.h
@@ -116,6 +116,7 @@ extern "C"
#define LARCH_RD_RJ_A0 0x084
#define LARCH_GET_RD(insn) (insn & 0x1f)
#define LARCH_GET_RJ(insn) ((insn >> 5) & 0x1f)
+ #define LARCH_GET_RK(insn) ((insn >> 10) & 0x1f)
typedef uint32_t insn_t;