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2023-07-03Merge pull request #66 from chipsalliance/dependabot/submodules/riscv-gnu-too...HEADmasterHongren (Zenithal) Zheng1-0/+0
2023-07-03Merge pull request #67 from chipsalliance/dependabot/submodules/riscv-pk-acbe166Hongren (Zenithal) Zheng1-0/+0
2023-07-03Merge pull request #68 from chipsalliance/dependabot/submodules/fsf-binutils-...Hongren (Zenithal) Zheng1-0/+0
2023-07-03Merge pull request #69 from chipsalliance/dependabot/submodules/riscv-isa-sim...Hongren (Zenithal) Zheng1-0/+0
2023-07-03Merge pull request #65 from chipsalliance/dependabot/submodules/riscv-tests-1...Hongren (Zenithal) Zheng1-0/+0
2023-07-01Bump riscv-isa-sim from `740e635` to `f45f726`dependabot[bot]1-0/+0
2023-07-01Bump fsf-binutils-gdb from `077a1f0` to `4ced24d`dependabot[bot]1-0/+0
2023-07-01Bump riscv-pk from `3ed18cf` to `acbe166`dependabot[bot]1-0/+0
2023-07-01Bump riscv-gnu-toolchain from `eb1ee1b` to `6da3855`dependabot[bot]1-0/+0
2023-07-01Bump riscv-tests from `7b52ba3` to `10a93cb`dependabot[bot]1-0/+0
2023-06-15Merge pull request #60 from chipsalliance/dependabot/submodules/riscv-gnu-too...Hongren (Zenithal) Zheng1-0/+0
2023-06-15Merge pull request #61 from chipsalliance/dependabot/submodules/riscv-tests-7...Hongren (Zenithal) Zheng1-0/+0
2023-06-15Merge pull request #62 from chipsalliance/dependabot/submodules/riscv-openocd...Hongren (Zenithal) Zheng1-0/+0
2023-06-15Merge pull request #63 from chipsalliance/dependabot/submodules/riscv-opcodes...Hongren (Zenithal) Zheng1-0/+0
2023-06-15Merge pull request #64 from chipsalliance/dependabot/submodules/riscv-isa-sim...Hongren (Zenithal) Zheng1-0/+0
2023-06-01Bump riscv-isa-sim from `929ff56` to `740e635`dependabot[bot]1-0/+0
2023-06-01Bump riscv-opcodes from `bb64568` to `3ca60c5`dependabot[bot]1-0/+0
2023-06-01Bump riscv-openocd from `fc52bfe` to `58b6a5e`dependabot[bot]1-0/+0
2023-06-01Bump riscv-tests from `394937e` to `7b52ba3`dependabot[bot]1-0/+0
2023-06-01Bump riscv-gnu-toolchain from `170a9a3` to `eb1ee1b`dependabot[bot]1-0/+0
2023-05-01Merge pull request #56 from chipsalliance/dependabot/submodules/riscv-openocd...2023.05.02Hongren (Zenithal) Zheng1-0/+0
2023-05-01Merge pull request #57 from chipsalliance/dependabot/submodules/riscv-tests-3...Hongren (Zenithal) Zheng1-0/+0
2023-05-01Merge pull request #58 from chipsalliance/dependabot/submodules/fsf-binutils-...Hongren (Zenithal) Zheng1-0/+0
2023-05-01Merge pull request #59 from chipsalliance/dependabot/submodules/riscv-pk-3ed18cfHongren (Zenithal) Zheng1-0/+0
2023-05-01Merge pull request #55 from chipsalliance/dependabot/submodules/riscv-opcodes...Hongren (Zenithal) Zheng1-0/+0
2023-05-01Bump riscv-pk from `573c858` to `3ed18cf`dependabot[bot]1-0/+0
2023-05-01Bump fsf-binutils-gdb from `a3424b7` to `077a1f0`dependabot[bot]1-0/+0
2023-05-01Bump riscv-tests from `a6ab6ae` to `394937e`dependabot[bot]1-0/+0
2023-05-01Bump riscv-openocd from `78231cd` to `fc52bfe`dependabot[bot]1-0/+0
2023-05-01Bump riscv-opcodes from `5adef50` to `bb64568`dependabot[bot]1-0/+0
2023-04-21Merge pull request #54 from chipsalliance/gdb-submodule-use-https2023.05.012023.04.272023.04.21Hongren (Zenithal) Zheng1-1/+1
2023-04-20Make gdb submodule url use httpsZenithal1-1/+1
2023-04-01Merge pull request #49 from chipsalliance/dependabot/submodules/riscv-openocd...2023.04.02Hongren (Zenithal) Zheng1-0/+0
2023-04-01Merge pull request #50 from chipsalliance/dependabot/submodules/riscv-opcodes...Hongren (Zenithal) Zheng1-0/+0
2023-04-01Merge pull request #51 from chipsalliance/dependabot/submodules/riscv-gnu-too...Hongren (Zenithal) Zheng1-0/+0
2023-04-01Merge pull request #52 from chipsalliance/dependabot/submodules/riscv-isa-sim...Hongren (Zenithal) Zheng1-0/+0
2023-04-01Merge pull request #48 from chipsalliance/dependabot/submodules/fsf-binutils-...Hongren (Zenithal) Zheng1-0/+0
2023-04-01Bump riscv-isa-sim from `d1ae27b` to `929ff56`dependabot[bot]1-0/+0
2023-04-01Bump riscv-gnu-toolchain from `f0b0094` to `170a9a3`dependabot[bot]1-0/+0
2023-04-01Bump riscv-opcodes from `ed68c21` to `5adef50`dependabot[bot]1-0/+0
2023-04-01Bump riscv-openocd from `9c3a4b4` to `78231cd`dependabot[bot]1-0/+0
2023-04-01Bump fsf-binutils-gdb from `3049589` to `a3424b7`dependabot[bot]1-0/+0
2023-03-27Merge pull request #47 from chipsalliance/dependabot/submodules/fsf-binutils-...2023.03.28Hongren (Zenithal) Zheng1-0/+0
2023-03-27Merge pull request #46 from chipsalliance/dependabot/submodules/riscv-pk-573c858Hongren (Zenithal) Zheng1-0/+0
2023-03-27Merge pull request #45 from chipsalliance/dependabot/submodules/riscv-opcodes...Hongren (Zenithal) Zheng1-0/+0
2023-03-27Merge pull request #44 from chipsalliance/dependabot/submodules/riscv-isa-sim...Hongren (Zenithal) Zheng1-0/+0
2023-03-27Merge pull request #43 from chipsalliance/dependabot/submodules/riscv-gnu-too...Hongren (Zenithal) Zheng1-0/+0
2023-03-01Bump fsf-binutils-gdb from `6cb7f6d` to `3049589`dependabot[bot]1-0/+0
2023-03-01Bump riscv-pk from `7e9b671` to `573c858`dependabot[bot]1-0/+0
2023-03-01Bump riscv-opcodes from `902fa8a` to `ed68c21`dependabot[bot]1-0/+0
generated by cgit v1.1 at 2024-09-22 03:45:42 +0000