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ucb-bar
testchipip
Commits
eda0018f
Unverified
Commit
eda0018f
authored
Feb 17, 2021
by
Jerry Zhao
Committed by
GitHub
Feb 17, 2021
Browse files
Merge pull request #118 from ucb-bar/simdram_timings
Pass memorybus clock frequency to SimDRAM, and initialize DRAMSim with correct freq
parents
70f17387
5c853afe
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