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testchipip
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serial-tl

bdca33ec · Remove TLBuffer unnecessary argument · Sep 17, 2020

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serial-clock-fix

a86c827c · Fix ClockedIO cloneType · Sep 12, 2020

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tsi-source-setter-beagle

a9adf2b3 · Adding monitor to keep D signals · Sep 11, 2020

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sbus-ring-membench

05588902 · fix DRAMSim2 write address handling · Sep 03, 2020

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rc-july2020

1e7373f6 · Better string concatenation · Aug 27, 2020

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fast-program-load

cf2e461b · serial writes directly to DRAM for fast program loading · Jul 11, 2020

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rc-retile

29eb87c9 · Bump Rocketchip to June 2020 · Jun 19, 2020

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RC-1.3-bump

5b3f2c96 · allow different buffer parameters to be set again · May 13, 2020

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spiflash_all_c

2b391c6b · WIP · May 06, 2020

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update-gitignore

ebad2d3d · Ignore vim swap files · May 05, 2020

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tsi_chipyard

6af91953 · WIP, start adding TSI traits · Apr 29, 2020

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clkgate

c0819852 · Use blocking assignment for ClockFlop · Apr 28, 2020

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iocell

c2fe16ec · CR feedback; Move the option logic into SerialAdapter methods · Mar 27, 2020

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generator_unification

a3da53e8 · Add CanHaveTraceIO trait · Feb 11, 2020

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better_configs

62cf2629 · Refactor traits as CanHave traits · Jan 16, 2020

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fast-serial-rebased

2f06d576 · Merge remote-tracking branch 'origin/master' into fast-serial-rebased · Nov 24, 2019

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chisel-update-aug-2019

dd2e94c8 · Updates for rocket-chip august-2019 · Oct 30, 2019

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ucb-jenkins

1c447f76 · Merge branch 'chisel3deprecatedgonefixup+GeneratorApplongName+exposureUpdates' into ucb-jenkins · Sep 17, 2019

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new_lbwif_config

dac925df · WIP; add case classes that parameterize LBWIF and de-diplomatize some of the module components · Aug 28, 2019

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membench

86d6417c · Merge branch 'dev' into membench · Aug 22, 2019

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