Commit 9cd88084 authored by Sergey Khabarov's avatar Sergey Khabarov
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[+] vhdl: interaction with zephyr via uart during RTL simulation was...

[+] vhdl: interaction with zephyr via uart during RTL simulation was implemented. Module uart_sim was added. Found exception 'unaligned store' on function unlock_irq(key) (fixing in progress).
parent 13c55272
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