1. Apr 19, 2024
  2. Apr 08, 2024
  3. Feb 10, 2024
  4. Dec 05, 2023
  5. Nov 18, 2023
  6. Nov 16, 2023
  7. Nov 05, 2023
  8. Oct 18, 2023
    • Xinlai Wan's avatar
      RISC-V Vector Extension Support · c90cf2e6
      Xinlai Wan authored
      This PR adds the following:
      
      General Framework and Configurations:
      
      * Introduced the V extension's general framework and configuration setting instructions.
      * Updated model/riscv_insts_vext_vset.sail and effect matching functions in riscv_vlen.sail.
      * Addressed code formatting issues and made revisions post the Nov 22 meeting.
      * Co-authored by Nicolas Brunie and Jessica Clarke.
      
      Vector Load/Store Instructions:
      
      * Integrated vector load and store instructions.
      * Enhanced the implementation of SEW, LMUL, VLEN and removed real numbers from the code.
      * Updated vstart settings and removed unnecessary assert statements.
      * Rectified bugs in vleff instructions and overhauled coding styles.
      * Incorporated guards for vector encdec clauses and optimized memory access post vector load/store failures.
      
      Vector Integer/Fixed-Point Instructions:
      
      * Added vector integer/fixed-point arithmetic and mask instructions.
      * Improved vector EEW and EMUL checking functions and introduced illegal instruction check functions.
      * Fine-tuned code formatting for vector instruction checks.
      
      Vector Floating-Point Instructions:
      
      * Rolled out vector floating-point instructions and updated their conversion counterparts.
      * Refreshed copyright headers specific to the vector extension code.
      
      Vector Reduction and Mask Instructions:
      
      * Integrated vector mask and reduction instructions.
      * Addressed register overlap checks for vector mask instructions.
      
      Miscellaneous Enhancements and Fixes:
      
      * Updated vector CSR vtype.vill settings and judgements.
      * Systematized patterns for vector illegal instruction checks.
      * Rectified issues in vector load/store and reduction operations.
      * Purged redundant elements from the V extension code and vector floating-point functions.
      * Cleaned up softfloat makefiles and renamed EXTZ and EXTS within the V extension code.
      * Addressed a clang-format check issue and NaN boxing anomalies. Provided annotations for pending RVV configurations.
      * Initialized default VLEN value and set vlenb CSR.
      * Set constraints for vector variable initialization and added mstatus.VS settings specific to the vector extension.
      c90cf2e6
  9. Oct 12, 2023
    • Tim Hutt's avatar
      Rename enable-fiom to enable-writable-fiom · c04cf29c
      Tim Hutt authored
      This is a much clearer name because the option allows code to enable FIOM, it doesn't enable FIOM itself.
      c04cf29c
    • Tim Hutt's avatar
      Implement menvcfg · 51a6c967
      Tim Hutt authored
      This implements the m/senvcfg(h) CSRs. This CSR is used to enable/disable extensions and behaviours for lower privilege modes. Currently the only implemented bit is FIOM which affects how fences work.
      
      It also affects how atomic memory accesses work in non-cacheable regions, but the model does not currently support PMAs so that can't easily be implemented.
      51a6c967
  10. Oct 11, 2023
    • Alasdair's avatar
      Fix lem build error · 532714a6
      Alasdair authored
      The speculate_conditional should be marked monadic. It would seem like
      the various _reservation functions should be also, but it seems like
      perhaps they are not implemented in lem right now.
      532714a6
  11. Oct 10, 2023
    • Paul A. Clarke's avatar
      Fix fmaxm.d definition · 38658363
      Paul A. Clarke authored
      Likely a cut-and-paste error, the definition for fmaxm.d uses the fmaxm.s
      mnemonic, which is already used earlier in the same file.
      38658363
  12. Sep 26, 2023
  13. Sep 21, 2023
  14. Sep 20, 2023
    • Alex Richardson's avatar
      Report the faulting virtual address in tval · c60091a6
      Alex Richardson authored
      In some cases we were reporting the translated value instead, but the
      privileged spec text requires the virtual address:
      ```
      If mtval is written with a nonzero value when a breakpoint,
      address-misaligned, access-fault, or page-fault exception occurs on an
      instruction fetch, load, or store, then mtval will contain the faulting
      virtual address.
      ```
      c60091a6
  15. Sep 13, 2023
    • Tim Hutt's avatar
      Remove effects · 4c77f626
      Tim Hutt authored
      Since Sail 0.15 (released Nov 2022), effects have had no effect. They now generate a deprecation warning. This commit removes all the effect annotations from the model, thus fixing the compiler warnings.
      4c77f626
    • Alasdair's avatar
      Remove non-existent function from overload · e2e942c1
      Alasdair authored
      e2e942c1
  16. Sep 12, 2023
  17. Aug 29, 2023
  18. Aug 28, 2023
    • Alex Richardson's avatar
      Avoid unnecessary empty lines when instruction tracing is on · ec6a6a96
      Alex Richardson authored
      These empty lines don't add to the readability of the trace and in fact
      when trace redirection is enabled they result in lots of empty lines being
      printed to stderr which makes it impossible to read the OS boot messages.
      ec6a6a96
    • Alex Richardson's avatar
      Fix --help output for options without a short flag · 34a32a2d
      Alex Richardson authored
      Previously --help printed the following:
      ```
               -V      --no-trace
               -�      --trace-output
               -l      --inst-limit
      ```
      With the new change it is:
      ```
               -V      --no-trace
                       --trace-output
               -l      --inst-limit
      ```
      34a32a2d
    • Alex Richardson's avatar
      csim: Allow redirecting trace output to a file using command line flag · 5725f3fe
      Alex Richardson authored
      This is useful when booting an operating system with tracing enabled
      as it allows showing the printed messages on the terminal and storing
      the trace log to a separate file. All categorized trace messages are
      now redirected to the --trace-output file when passed. If this option is
      not gived, the current behaviour of using stdout is retained.
      
      Example usage:
      `./c_emulator/riscv_sim_RV64 -b os-boot/rv64-64mb.dtb --trace-output /dev/stderr os-boot/linux-rv64-64mb.bbl --trace-output /tmp/linux.log`
      5725f3fe
  19. Aug 01, 2023
    • Alasdair's avatar
      Rename EXTZ and EXTS · 58cac61d
      Alasdair authored
      Rename EXTZ to zero_extend and EXTS to sign_extend. Two main reasons
      for doing this - it means that the source more closely follows the
      descriptions in the documentation with more readable names, and EXTS
      and EXTZ are visually very close to each other with just the S and Z.
      They are also following an odd convention where they are ALLCAPS rather
      than snake_case like other functions in the spec.
      
      I think this convention comes from early Power specs in Sail, which
      influenced Sail MIPS and CHERI-MIPS, but I don't think it's a very
      good convention we should be keeping in sail-riscv
      58cac61d
  20. Jul 05, 2023
  21. Jun 27, 2023
  22. Jun 19, 2023
    • Alex Richardson's avatar
      Add clang-format to the pre-commit hooks · 787ccfb4
      Alex Richardson authored
      This formats the code with clang-format 15 since the pre-commit hook for
      clang-format 16 would require a newer version of pre-commit.
      787ccfb4
    • Alex Richardson's avatar
      Update pre-commit-hooks version · 1c2dca98
      Alex Richardson authored
      The template that I used when adding it uses hooks from 2020. Update this
      to the latest version and add a minimum pre-commit version check to ensure
      we get sensible error messages rather than obscure failures.
      The minimum chosen here is 2.10 as that is the version shipping with
      Debian 11 and most other distributions have newer versions. If needed
      a newer version can always be installed using pip.
      1c2dca98
  23. Jun 15, 2023
    • Alex Richardson's avatar
      Run the pre-commit checks as part of CI · 989f4372
      Alex Richardson authored
      Do this before installing sail or building the model to avoid wasting CI
      time if these basic checks are failing.
      989f4372
    • Alex Richardson's avatar
      Run the pre-commit hook on all files · 2ede5ef2
      Alex Richardson authored
      This strips trailing whitespace and fixes line endings. I had to add the
      *.dump files to the exclude list to avoid excessive changes, but
      ideally these would not be part of the repository since they can just be
      generated by running objdump manually.
      2ede5ef2
    • Alex Richardson's avatar
      Add a basic pre-commit hook and update CONTRIBUTING.md · 33ef4a33
      Alex Richardson authored
      Recommend installation of this basic pre-commit hook that ensures that
      all files are free of trailing whitespace and have a final newline.
      It also checks that no large files are added and that YAML files are valid.
      33ef4a33
    • Alexander Richardson's avatar
      Add a clang-format configuration and reformat C code (#261) · 9b477812
      Alexander Richardson authored
      * Add a clang-format configuration and reformat C code
      
      From my testing it turns out the built-in WebKit style is the closest to
      the current style. I added a few config options to further reduce the
      diff and I think the current output looks reasonable.
      In the future it would be good to add a CI and pre-commit check to enforce
      that all C code is consistently formatted to reduce the need for reviewers
      to look for formatting issues.
      
      * Fix formatting of commented-out reservation debug code
      
      Use an empty-by-default macro instead of commented-out fprintf calls.
      This way clang-format can format the calls sensibly and it's easier
      to enable the debug prints.
      
      * Improve formatting of fprintf call in set_config_print()
      
      Clang-format does not like long string literals, so split this manually
      to format the call sensibly.
      
      * Fix formatting of function pointer typedef
      
      Clang-format gets this wrong `*` is part of the typedef.
      
      * Improve formatting of getopt_long call
      
      * Fix odd fprintf continuation by splitting long string literal
      9b477812
  24. Jun 13, 2023
  25. May 31, 2023