The spec allows it to be hardwired to 0, so don't rely on its value.

The code doesn't support interrupts, and it was relying on the reset
value of the mie register (which is undefined) to disable them.

so we can use the same object code on processors without the M extension

- give harts distinct stacks
- correct the address range used by coherence_torture

VM tests only support one core, so have the other cores hammer on the
memory system to attempt to catch simple coherence regressions.