- Sep 05, 2019
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Damien Le Moal authored
The Kendryte K210 UARTHS is compatible with SiFive UART. So use the sifive uart driver and remove the k210 uarths platform code. Signed-off-by:
Damien Le Moal <damien.lemoal@wdc.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- Aug 31, 2019
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Atish Patra authored
U-Boot readme for fu540 platform suggest that fdt_addr_r should be used as DT address after DT is copied via tftpboot. Update the OpenSBI docs to reflect that. Remove other stale informations as well. Signed-off-by:
Atish Patra <atish.patra@wdc.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Atish Patra authored
Currently, we upgrade to a full tlb flush only If a tlb flush request size is greater than the threshold. This is done as sfence in RISC-V can only flush 4KB at a time. Doing a large number of flushes page by page impacts the performance. It is better to do a full tlbflush if the request size is at least equal to the threshold size. Signed-off-by:
Atish Patra <atish.patra@wdc.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Atish Patra authored
If compiler supports riscv atomic instructions, we should use them instead of legacy gcc built-in macros __sync_lock_test_and_set in atomic exchange functions. Signed-off-by:
Atish Patra <atish.patra@wdc.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Atish Patra authored
To read 64bit time in 32 bit we have to read lower & upper half separately and 'or' them together. However, upper half time may have changed by the time we read lower half. Thus, the resultant 64 bit time may not be accurate. Consider lower half time value only if upper half time value has not changed. Signed-off-by:
Atish Patra <atish.patra@wdc.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Nylon Chen authored
This patch adds Andes AE350 to RV64 platform list in the binary archive script. Signed-off-by:
Nylon Chen <nylon7@andestech.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- Aug 23, 2019
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Nylon Chen authored
This commit provides basic support for the AE350 platform. Signed-off-by:
Zong Li <zongbox@gmail.com> Signed-off-by:
Nylon Chen <nylon7@andestech.com>
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- Aug 19, 2019
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Palmer Dabbelt authored
OpenSBI includes a version, but that is only updated when tagged. For users that are using the git releases we instead end up with an ambiguous version number, which makes it hard to figure out what everyone is using. This patch checks for a git directory and prints out the result of `git describe`, which is a mix of pretty and unambiguous. Signed-off-by:
Palmer Dabbelt <palmer@sifive.com> Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com>
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- Aug 16, 2019
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Atish Patra authored
OpenSBI manages outstanding TLB flush requests by queueing them in a fifo synchronously. An ipi sync which uses an atomic operation on MMIO address is no longer required. Remove the ipi sync method from platform header and all usage. Signed-off-by:
Atish Patra <atish.patra@wdc.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Atish Patra authored
Linux kernel expects tlb flush SBI call to be completely synchronous i.e. the SBI call should only return once corresponding *fence* instruction is executed. OpenSBI manages the outstanding TLB flush requests by keeping them in a per hart based fifo. However, there are few corner cases that may lead to race conditions while updating the fifo. Currently, the caller hart waits for IPI acknowledgement via clint address which is not a very good method as synchronization on MMIO may not be supported in every platform. Moreover, the waiter doesn't have any way of identifying if the IPI is received for specific tlb flush request or any other IPI. This may lead to unpredictable behavior in supervisor/user space. Fix this by waiting on individual fifo entries rather than MMIO address. Currently, a relaxed loop is being used because wfi again involves MMIO write which would be slower compared to relaxed loop. To avoid deadlock, fifo is processed every time a hart loops for fifo enqueue or fifo sync to consume the tlb flush requests sent by other harts. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Signed-off-by:
Atish Patra <atish.patra@wdc.com>
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Atish Patra authored
Signed-off-by:
Anup Patel <anup.patel@wdc.com> Signed-off-by:
Atish Patra <atish.patra@wdc.com>
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- Aug 13, 2019
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Anup Patel authored
We can get a page/access trap when doing unpriv load/store in get_insn() function because on a SMP system Linux swapper running on HART A can unmap pages from page table used by HART B. To tackle this we extend get_insn() implementation so that if we get trap in get_insn() then we redirect it to S-mode as fetch page/access fault. Signed-off-by:Anup Patel <anup.patel@wdc.com>
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Lukas Auer authored
When OpenSBI is started from an address not equal to the link address, it is first relocated to the link address. Hart 0 performs the relocation and notifies the other harts of its completion with the _boot_status variable. It uses the copy of the variable relative to the link address. This copy contains valid data only after relocation has finished. The waiting harts will therefore read invalid data until relocation has finished. This can cause them to continue execution too early. Fix this by using the _boot_status variable relative to the load address while OpenSBI has not finished relocation. Signed-off-by:
Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- Aug 12, 2019
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Jacob Garber authored
In order to prevent a possible null pointer dereference, return early if either one of 'in' or 'data' is null. Signed-off-by:
Jacob Garber <jgarber1@ualberta.ca> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Atish Patra <atish.patra@wdc.com>
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Jacob Garber authored
In the last argument to sbi_memset() we essentially have the following multiplication: size_t = u16 * u16 Due to C's integer semantics, both u16's are implicitly converted to int before the multiplication, which cannot hold all possible values of a u16 * u16. If the multiplication overflows, the intermediate result will be a negative number. On 64-bit platforms, this will be sign-extended to a huge integer in the conversion to a u64 (aka size_t). Being the size argument to sbi_memset(), this could potentially cause a large out-of-bounds write. The solution is to manually cast one of the u16 to a size_t, which will make it large enough to avoid the implicit conversion and any overflow. Signed-off-by:Jacob Garber <jgarber1@ualberta.ca> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Atish Patra <atish.patra@wdc.com>
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Jacob Garber authored
The error check 'plic_off < 0' does nothing, since plic_off is stored as a u32. Fix this by changing it to an int, which matches the return type of fdt_node_offset_by_compatible(). Signed-off-by:
Jacob Garber <jgarber1@ualberta.ca> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Atish Patra <atish.patra@wdc.com>
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Jacob Garber authored
!(mipval && MIP_MSIP) simplifies to !mipval, which checks if the entire variable is zero, not just a single bit. Fix this to use bitwise & instead. Signed-off-by:
Jacob Garber <jgarber1@ualberta.ca> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Atish Patra <atish.patra@wdc.com>
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- Aug 09, 2019
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Anup Patel authored
We should sbi_dprintf() instead of sbi_printf() for invalid CSRs because we are forwarding invalid CSR access back to S-mode. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Anup Patel authored
This patch introduces new sbi_dprintf() API for runtime debug prints. The sbi_dprintf() will print to console for a given HART only when SBI_SCRATCH_DEBUG_PRINTS option in enabled in sbi_scratch for this HART. We can now add debug prints using sbi_dprintf() at important places in OpenSBI sources. These debug prints will only show up when previous booting stage or compile time parameter sets the SBI_SCRATCH_DEBUG_PRINTS option in scratch space. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Bin Meng authored
The boot status is currently hard-coded. Define some macros for it. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Bin Meng authored
We should expand the FDT size before any patching, otherwise it's possible the "status" fix up might fail due to insufficient space. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- Aug 07, 2019
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Nylon Chen authored
If core-0 have finished _fdt_reloc_done but any of other cores has not yet left the loop in _wait_relocate_copy_done, they could never leave the loop because _boot_status is not equal to 1.
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- Jul 26, 2019
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Anup Patel authored
Currently, we mandate 'F' and 'D' extension in riscv_fp.h so that misaligned load/store emulation has access to FP registers. The above is too restrictive and we should certainly allow compilation for soft-FP toolchains and explicit PLATFORM_RISCV_ISA not having 'F' and 'D' extensions. This patch extends riscv_fp.h and misaligned load/store emulation to allow compiling OpenSBI without FP support. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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- Jul 25, 2019
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Bin Meng authored
There are several places in the source tree that have: 32bit, 32 bit, 64bit, 64 bit Fix by using the conventional names with a hyphen. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Lukas Auer <lukas.auer@aisec.fraunhofer.de> Acked-by:
Anup Patel <anup.patel@wdc.com>
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Bin Meng authored
At present the exact details of building 32-bit or 64-bit OpenSBI images are missing in the docs. This adds the missing part. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Lukas Auer <lukas.auer@aisec.fraunhofer.de> Acked-by:
Anup Patel <anup.patel@wdc.com>
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Georg Kotheimer authored
Although it does not make a functional difference, both cpu_to_fdt32() and fdt32_to_cpu() pass on to CPU_TO_FDT32, we should use cpu_to_fdt32() to be semantically correct. Signed-off-by:
Georg Kotheimer <georg.kotheimer@kernkonzept.com> Reviewed-by:
Atish Patra <atish.patra@wdc.com> Acked-by:
Anup Patel <anup.patel@wdc.com>
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- Jul 24, 2019
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Anup Patel authored
This patch changes FW_xyz_FDT_ADDR to RAM_START+128MB (i.e. 0x88000000) so that next stage bootloader (i.e. U-Boot) has enough space to unpack bigger kernel images. Reported-by:
David Abdurachmanov <david.abdurachmanov@sifive.com> Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
David Abdurachmanov <david.abdurachmanov@sifive.com> Tested-by:
David Abdurachmanov <david.abdurachmanov@sifive.com>
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- Jul 22, 2019
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Bin Meng authored
Per device tree spec, the standard value string for the "status" property of a cpu node is either "okay" or "disabled". "masked" was once used but it is unfortunately a spec violation. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Acked-by:
Anup Patel <anup.patel@wdc.com>
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- Jul 02, 2019
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Anup Patel authored
This patch updates OpenSBI version to 0.4 as part of release preparation. Signed-off-by:Anup Patel <anup.patel@wdc.com>
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Atish Patra authored
The Linux kernel will maintain the device tree (DT) for HiFive Unleashed from release v5.2-rc6. This DT is incompatible with previous DT present for Microsemi expansion board in OpenSBI. Since, OpenSBI will directly load the pre-built DTB from kernel now onwards, no need to keep the out-of-date DT in openSBI. Remove this DT and it's related documentation. Signed-off-by:
Atish Patra <atish.patra@wdc.com> Acked-by:
Anup Patel <anup.patel@wdc.com>
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- Jul 01, 2019
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Anup Patel authored
When relocation is not required (i.e. _load_start == _link_start), we can skip two stage wait for secondary HARTs. This means secondary HARTs can skip the _wait_relocate_copy_done() loop and directly jump to the _wait_for_boot_hart() loop when no relocation not required. Signed-off-by:Anup Patel <anup.patel@wdc.com>
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- Jun 30, 2019
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Anup Patel authored
This patch adds Ariane FPGA to RV64 platform list in the binary archive script. Signed-off-by:Anup Patel <anup.patel@wdc.com>
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Atish Patra authored
With 5.2-rc6 release, Linux kernel hosts the DT for Unleashed board which is incompatible with the default DT from FSBL. Update the document to use the DT from kernel. Signed-off-by:
Atish Patra <atish.patra@wdc.com> Acked-by:
Anup Patel <anup.patel@wdc.com>
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- Jun 29, 2019
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Abner Chang authored
Add firmware context field struct sbi_platform to carry firmware specific information. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Acked-by:
Anup Patel <anup.patel@wdc.com>
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Abner Chang authored
Add version control of sbi_platform structure - Add opensbi_version, this gives information of opensbi revision on which the sbi_platform table was created. - Add platform_version field in sbi_platform structure for platform level version control. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Acked-by:
Anup Patel <anup.patel@wdc.com>
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Abner Chang authored
Move platform opensbi functions to sbi_platform_operations structure. Both sbi_platform and sbi_platform_operations structures are maintained by platform vendors. Signed-off-by:
Abner Chang <abner.chang@hpe.com> Acked-by:
Anup Patel <anup.patel@wdc.com>
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Panagiotis Peristerakis authored
Signed-off-by:Panagiotis Peristerakis <perister@ics.forth.gr>
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Panagiotis Peristerakis authored
This patch adds support for Ariane platform. We needed to enable PLIC interrupts early(like on BBL) due to some issue of the design. Otherwise, Linux would not get any external interrupts. Signed-off-by:Panagiotis Peristerakis <perister@ics.forth.gr>
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Panagiotis Peristerakis authored
Signed-off-by:Panagiotis Peristerakis <perister@ics.forth.gr>
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- Jun 24, 2019
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Xiang W authored
The old code may corrupt the code of the waiting hart hence this patch keeps waiting HART within relocation code range at time of relocation. Signed-off-by:
Xiang W <wxjstz@126.com> Acked-by:
Anup Patel <anup.patel@wdc.com>
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