- May 19, 2021
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Daniel Schaefer authored
we want to use sbi_strncpy as strncpy in the OpenSBI implementation for libfdt. Just like 2845d2d2 Signed-off-by:
Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by:
Abner Chang <abner.chang@hpe.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Fabrice Fontaine authored
Though -nostdlib is passed in CFLAGS, -fno-stack-protector must also be passed to avoid linking errors related to undefined references to '__stack_chk_guard' and '__stack_chk_fail' if toolchain enforces -fstack-protector. Fixes: - https://gitlab.com/kubu93/buildroot/-/jobs/1247043359 Signed-off-by:
Fabrice Fontaine <fontaine.fabrice@gmail.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Bin Meng authored
Synopsys DesignWare APB UART is seen on the StarFive JH7100 SoC. Its programming interface is compatible with the existing 8250 UART driver. Simply add its compatible string to the driver makes it work with the StarFive JH7100 SoC on a BeagleV board. With this patch, the generic platform firmware can be used out of the box on the BeagleV board. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- May 14, 2021
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Daniel Schaefer authored
spin_lock_check already returned bool in the source file but not in the header. With some toolchains that causes an error, as it should. Because it and related functions all essentially return a bool, we can use this opportunity to change them. Signed-off-by:
Daniel Schaefer <git@danielschaefer.me> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- May 06, 2021
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Bin Meng authored
Now that SiFive HiFive Unleashed board is using the generic platform support in OpenSBI, let's remove the old non-generic one. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Bin Meng authored
The upstream U-Boot/QEMU have been using generic platform for SiFive HiFive Unleashed board for some time. Let's document sifive_fu540 as one of the supported targets for "generic" platform. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Bin Meng authored
Let's sort the platform names in alphabetical order. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Daniel Cederman authored
This patch adds support for the UART used by the NOEL-V processor. Cobham Gaisler's NOEL-V RISC-V processor IP is available under GPL and commercial license and is described in more detail at https://www.gaisler.com/noelv . Signed-off-by:
Daniel Cederman <cederman@gaisler.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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- Apr 29, 2021
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Bin Meng authored
With latest U-Boot upstream (v2021.07 in development), the defconfig name has been changed to sifive_unleashed_defconfig. Update the doc. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- Apr 28, 2021
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Anup Patel authored
We extend the boot-time prints to show various devices provided (or registered) by the platform support. This will help users verify hardware devices available for OpenSBI firmwares. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
Instead of having hsm_start(), hsm_stop() and hsm_suspend() callbacks in platform operations, it will be much simpler for HSM driver to directly register these operations as a device to the sbi_hsm implementation. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
Instead of having system_reset_check() and system_reset() callbacks in platform operations, it will be much simpler for reset driver to directly register these operations as a device to the sbi_system implementation. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
Instead of having ipi_send() and ipi_clear() callbacks in platform operations, it will be much simpler for ipi driver to directly register these operations as a device to sbi_ipi implementation. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
Instead of having timer_value(), timer_event_start(), and timer_event_stop() callbacks in platform operations, it will be much simpler for timer driver to directly register these operations as device to the sbi_timer implementation. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
Instead of having console_putc() and console_getc() callbacks in platform operations, it will be much simpler for console driver to directly register these operations as device to the sbi_console implementation. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Anup Patel authored
We now have sbi_domain_root_add_memregion() which allows platform support to add root domain regions at boot-time so let's remove the domains_root_regions() platform callback which was added for this purpose. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Guo Ren authored
Add description and dts examples for T-HEAD C9xx platforms. Signed-off-by:
Guo Ren <guoren@linux.alibaba.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Guo Ren authored
We could use platform/generic instead, and won't use platform/thead/c910 again. Signed-off-by:
Guo Ren <guoren@linux.alibaba.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Guo Ren authored
Let's have FW_PIC enabled by default so that OpenSBI firmware can by default run from any physical address. Tested with qemu_rv32 & rv64, T-HEAD all hardwares. Suggested-by:
Anup Patel <anup.patel@wdc.com> Signed-off-by:
Guo Ren <guoren@linux.alibaba.com> Tested-by:
Guo Ren <guoren@linux.alibaba.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- Apr 24, 2021
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Anup Patel authored
We should decrement root_memregs_count by one after merging two memregions otherwise new memregion added after a merge will be appended after last sentinel memregion of zero order. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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- Apr 22, 2021
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Guo Ren authored
This driver is for T-HEAD test chip, fpga. It could work with all T-HEAD riscv processors: C9xx series. example1: (Using io-regs for reset) reset: reset-sample { compatible = "thead,reset-sample"; plic-delegate = <0xff 0xd81ffffc>; entry-reg = <0xff 0xff019050>; entry-cnt = <4>; control-reg = <0xff 0xff015004>; control-val = <0x1c>; csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>; }; example2: (Using csr-regs for reset) reset: reset-sample { compatible = "thead,reset-sample"; plic-delegate = <0xff 0xd81ffffc>; using-csr-reset; csr-copy = <0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x3b0 0x3b1 0x3b2 0x3b3 0x3b4 0x3b5 0x3b6 0x3b7 0x3a0>; }; example3: (Only delegate plic enable to S-mode) reset: reset-sample { compatible = "thead,reset-sample"; plic-delegate = <0xff 0xd81ffffc>; }; After this patch, all T-HEAD c9xx would use platform/generic with fw_dynamic as default: CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic FW_PIC=y /usr/bin/make The platform/thead will be deprecated. Signed-off-by:Guo Ren <guoren@linux.alibaba.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Guo Ren authored
Figure out CLINT has_64bit_mmio from DT node and using antonym for compatibility. Signed-off-by:
Guo Ren <guoren@linux.alibaba.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- Apr 13, 2021
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Anup Patel authored
The sbi_domain_memregion_initfw() is no longer used outside sbi_domain.c so let's make it a local function. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
We should copy over all restricted memregions from the root domain to the domains populated from FDT. These restricted root memregions are typically firmware memregion and M-mode only mmio memregions. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
We make the the root domain instance global variable so that platform support and drivers can iterate over the root domain regions. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
The CLINT memory should not be accessed by the supervisor-mode software so let's protect it by adding CLINT memregion to the root domain. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
We should allow platform support to add more root memory regions before domains are finalized. This will help platform support to protect critical M-mode only resources. This patch adds sbi_domain_root_add_memregion() API for above described purpose. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
This patch adds sbi_domain_memregion_init() helper API which can be used by platform support to initialize a domain memory region before adding it to the root domain. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
The domains are boot-time system-level partitions so we should allow platform support to register domains only before hart domain assignments are finalized. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com>
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- Apr 12, 2021
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hasheddan authored
Updates link in platforms documentation to point to the correct OpenPiton document. Signed-off-by:
hasheddan <georgedanielmangum@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- Apr 09, 2021
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Xiang W authored
The unsigned length may be 4 bytes or 8 bytes, amoadd.w only applies to 4 bytes hence this patch. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Christoph Muellner authored
Replace the test-and-set spinlock implementation with ticket locks in order to get fairness (in form of FIFO order). The implementation uses a 32-bit wide struct, which consists of two 16-bit counters (owner and next). This is inspired by similar spinlock implementations on other architectures. This allows that the code works for both, RV32 and RV64. Signed-off-by:
Christoph Muellner <cmuellner@linux.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Christoph Muellner authored
The current implementation of SPIN_LOCK_INIT() provides the spinlock to be initialized as reference. This does not allow a direct initialization of the spinlock object at the creation site. Let's pass the spinlock directly instead (like Linux does as well) and adjust all users of the macro (in fact there is only one user). Signed-off-by:
Christoph Muellner <cmuellner@linux.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Christoph Muellner authored
The __aligned(x) macro is a common wrapper around compiler's aligned attribute, which allow to define the minimum alignement of a data type. Let's add this macro. Signed-off-by:
Christoph Muellner <cmuellner@linux.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- Apr 05, 2021
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Anup Patel authored
The "add sp, a0, zero" instruction in the trap restore path is redundant and can be avoided if TRAP_RESTORE_xyz() assembly macros use a0 as the base register instead of sp. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Xiang W authored
csr_read_allowed/csr_read_allowed requires trap.case to detect the results, but if no exception occurs, the value of trap.case will remain unchanged, which makes the detection results unreliable. Add code to initialize trap.case to 0. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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- Apr 01, 2021
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Xiang W authored
There are two copies of the same abnormal exit code, this patch deletes one Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Bin Meng authored
Current fdt_plic_fixup() only does necessary fix-up against the legacy "riscv,plic0" node. The upstream Linux kernel defines its official DT bindings which uses "sifive,plic-1.0.0" as the compatible string and we should check that first, and if not present fall back to legacy. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Bin Meng authored
At present fdt_plic_fixup() accepts a 'compat' parameter for PLIC compatible string. In preparation to support the new DT bindings, drop this and use "riscv,plic0" directly in fdt_plic_fixup(). Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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Bin Meng authored
Linux kernel commit a2770b57d083 ("dt-bindings: timer: Add CLINT bindings") adds the official DT bindings for CLINT, which uses "sifive,clint0" as the compatible string. "riscv,clint0" is now legacy and has to be kept for backward compatibility of legacy systems. Signed-off-by:Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup.patel@wdc.com>
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