- Sep 24, 2023
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Anup Patel authored
Based on sections 4.c and 4.d in Ch.2 of the Smepmp spec the PMP entries must be programmed as below: 1. Program M-only entries 2. Enable mseccfg.MML 3. Program shared-region entries 4. Program SU-only entries Co-developed-by:
Mayuresh Chitale <mchitale@ventanamicro.com> Signed-off-by:
Mayuresh Chitale <mchitale@ventanamicro.com> Signed-off-by:
Anup Patel <apatel@ventanamicro.com>
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Anup Patel authored
The Smepmp read-only shared region must have pmpcfg.L, pmpcfg.R, pmpcfg.W, and pmpcfg.X bits set so sbi_hart_get_smepmp_flags() must return pmp_flags accordingly. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Signed-off-by:
Mayuresh Chitale <mchitale@ventanamicro.com>
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Anup Patel authored
The mseccfg.MML bit is a sticky bit which remains unchanged once set so no need to clear it in sbi_hart_smepmp_configure(). Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Signed-off-by:
Mayuresh Chitale <mchitale@ventanamicro.com>
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Anup Patel authored
Let us factor-out Smepmp configuaration as separate function so that code is more readable. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Signed-off-by:
Mayuresh Chitale <mchitale@ventanamicro.com>
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Mayuresh Chitale authored
The macros to test permissions must perform an exact match of all the bits in the input with the desired permission bits. Otherwise, the check returns false positives in those cases where only some of the desired permissions are set in the input. Fixes: 6c202c5e ("include: sbi: Add Smepmp specific access flags for PMP entries") Signed-off-by:
Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Anup Patel authored
The sbi_hartmask_for_each_hart() macro is slow and has only one user so let us completely remove the sbi_hartmask_for_each_hart() macro. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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Anup Patel authored
Let us maximize the use of HART index in sbi_domain because hartindex based hartmask access and sbi_scratch lookup is faster. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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Anup Patel authored
The sbi_scratch_last_hartid() macro is not of much use on platforms with really sparse hartids so let us replace use of this macro with other approaches. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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Anup Patel authored
Let us prefer hartindex over hartid in IPI framework which in-turn forces IPI users to also prefer hartindex. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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Anup Patel authored
The sbi_hartid_to_scratch() involves translating hartid to hartindex which is expensive so let's use sbi_hartindex_to_scratch() instead. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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Xiang W authored
Currently, the sbi_hartmask is indexed by hartid which puts a limit on hartid to be less than SBI_HARTMASK_MAX_BITS. We extend the sbi_hartmask implementation to use hartindex and support updating sbi_hartmask using hartid. This removes the limit on hartid and existing code works largely unmodified. Signed-off-by:
Xiang W <wxjstz@126.com> Signed-off-by:
Anup Patel <apatel@ventanamicro.com>
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Anup Patel authored
The hartid to hartindex mapping is now tracked in sbi_scratch so we don't need sbi_platform_hart_index() and sbi_platform_hart_invalid() functions hence let us remove them. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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Anup Patel authored
We introduce HART index and related helper functions in sbi_scratch where HART index is contiguous and each HART index maps to a physical HART id such that 0 <= HART index and HART index < SBI_HARTMASK_MAX_BITS. The HART index to HART id mapping follows the index2id mapping provided by the platform. If the platform does not provide index2id mapping then identity mapping is assumed. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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- Sep 22, 2023
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Greentime Hu authored
We found the mstatus.FS status is not set correctly after the SET_F64_REG() and SET_F32_REG(). We should set mstatus.FS dirty after we emulate the FPU instructions. Co-developed-by:
Roy Lin <roy.lin@sifive.com> Signed-off-by:
Roy Lin <roy.lin@sifive.com> Signed-off-by:
Greentime Hu <greentime.hu@sifive.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Sep 10, 2023
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Xiang W authored
If the system is defined from tlb_fifo_num_entries, the scratch may be too small to hold the fifo, so it is alloc through the heap. Signed-off-by:
Xiang W <wxjstz@126.com> Signed-off-by:
Xing Xiaoguang <xiaoguang.xing@sophgo.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
For some platforms with a particularly high number of harts, if the tlb fifo is too small, it case harts to wait. Platforms should be allowed to specify the size of the tlb fifo. Signed-off-by:
Xiang W <wxjstz@126.com> Signed-off-by:
Xing Xiaoguang <xiaoguang.xing@sophgo.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Inochi Amaoto authored
After the hardware hpm counter is stopped, it should not raise any new interrupt as it is already stopped. So add the hw_counter_disable_irq callback to allow the custom pmu device to control this behavior. Signed-off-by:
Inochi Amaoto <inochiama@outlook.com> Reviewed-by:
Guo Ren <guoren@kernel.org> Reviewed-by:
Anup Patel <anup@brainfault.org> Tested-by:
Samuel Holland <samuel@sholland.org>
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Inochi Amaoto authored
T-HEAD c9xx pmu needs to clear OV bits of MCOUNTEROF in any condition to avoid unnecessary OF interrupts. In addition, the S-mode SCOUNTEROF only have OF bit set when the related bits of MCOUNTERWEN is set, so also configure MCOUNTERWEN to allow kernel to access valid SCOUNTEROF. Signed-off-by:
Haijiao Liu <haijiao.liu@sophgo.com> Co-authored-by:
Inochi Amaoto <inochiama@outlook.com> Signed-off-by:
Inochi Amaoto <inochiama@outlook.com> Reviewed-by:
Anup Patel <anup@brainfault.org> Tested-by:
Samuel Holland <samuel@sholland.org>
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Inochi Amaoto authored
When detecting features of PMU, the hpm counter may be written to some value, this will cause some unexpected behavior in some cases. So ensure the hpm counter is updated before starting the counter and the related interrupt. Signed-off-by:
Haijiao Liu <haijiao.liu@sophgo.com> Co-authored-by:
Inochi Amaoto <inochiama@outlook.com> Signed-off-by:
Inochi Amaoto <inochiama@outlook.com> Reviewed-by:
Anup Patel <anup@brainfault.org> Tested-by:
Samuel Holland <samuel@sholland.org>
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- Sep 06, 2023
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Xiang W authored
The previous definition had the assumption that the machine word length is equal to the word length of LONG. Remove this assumption and add a static check to prevent errors in subsequent modifications. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Inochi Amaoto authored
As the the "Console Putchar" extension is already legacy and may be removed in the furture. So replace it with the SBI v2.0 "DBCN" extension. Signed-off-by:
Inochi Amaoto <inochiama@outlook.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Aug 22, 2023
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Inochi Amaoto authored
After supporting noncontigous hpm event and counters in opensbi, the number of hpm counters can be calculated by the mhpm_mask. So this field is unnecessary and can be removed to save some space. Signed-off-by:
Inochi Amaoto <inochiama@outlook.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Inochi Amaoto authored
Only the CSR mhpmevent 3-9,13-17 of D1 have valid function, so change the mhpm_mask to a valid value to avoid invalid usage. Due to the openc906 pmu code https://github.com/T-head-Semi/openc906/blob/main/C906_RTL_FACTORY/gen_rtl/pmu/rtl/aq_hpcp_top.v Signed-off-by:
Inochi Amaoto <inochiama@outlook.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Andrew Jones authored
grep (at least my version, grep-3.8-3.fc38.x86_64) warns with "grep: warning: stray \ before -". Fix the warning by making the command line input to grep less ambiguous. Signed-off-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Aug 18, 2023
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Kaiwen Xue authored
This adds the support for ISA extension smcntrpmf. When some inhibit flags are set by a lower privilege mode for new CSRs added by smcntrpmf, OpenSBI sets the appropriate values correspondingly. Signed-off-by:
Kaiwen Xue <kaiwenx@andrew.cmu.edu> Signed-off-by:
Kaiwen Xue <kaiwenx@rivosinc.com> Reviewed-by:
Anup Patel <anup@brainfault.org> Reviewed-by:
Atish Patra <atishp@rivosinc.com>
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- Aug 06, 2023
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Mitchell Horne authored
Attempting to build OpenSBI with clang 16 and the following command: $ make LLVM=1 PLATFORM=generic Results in the following error: AS platform/generic/firmware/fw_dynamic.o /tmp/fw_dynamic-d000a6.s:429:9: error: symbol '_fw_start' can not be undefined in a subtraction expression .dword _fw_rw_start - _fw_start Work around this issue by eliminating the __fw_rw_offset variable and performing the offset calculation at run-time instead. This takes advantage of the fact that the a4 register contains the value of _fw_start. Signed-off-by:Mitchell Horne <mhorne@FreeBSD.org> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Kaiwen Xue authored
Cycle and instructions are hardware events instead of firmware ones. Fix the typo in the name of this function. Signed-off-by:
Kaiwen Xue <kaiwenx@andrew.cmu.edu> Signed-off-by:
Kaiwen Xue <kaiwenx@rivosinc.com> Reviewed-by:
Anup patel <anup@brainfault.org>
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Anup Patel authored
Currently, the fdt_parse_isa_extensions() tries to parse the ISA string once for each HART. This ISA string parsing can fail for secondary HARTs if the FDT memory is already overwritten by the supervisor OS. To tackle this issue, we improve the fdt_parse_isa_extensions() implementation to pre-parse ISA string for all HARTs during cold boot. Fixes: d72f5f17 ("lib: utils: Add detection of Smepmp from ISA string in FDT") Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Tested-By:
Mayuresh <Chitale<mchitale@ventanamicro.com>
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Mayuresh Chitale authored
Platforms may implement hpm events/counters non contiguously but the current implementation assumes them to be always contigous. Add a bitmap that captures the hpm events/counters as implemented in the hardware and use it to set the max limit of hardware counters visible to the OS. Counters not implemented in the hardware can't be used by the OS because those wont be described in the DT. Signed-off-by:
Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Inochi Amaoto authored
Nowadays, most of the editor use files or directories begin with dot to store some settings. So let git ignore these files and directories to reduce potential mistakes. Add dot match to ignore any editor file and there are two exceptions: - .gitignore - .clang-format Signed-off-by:
Inochi Amaoto <inochiama@outlook.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Jul 31, 2023
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Anup Patel authored
The functionality of SiFive Test reset driver is easily available through Syscon reset driver so let us remove the SiFive Test driver. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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Anup Patel authored
Let us have common FDT based reset driver for syscon reboot and poweroff. The device tree bindings for syscon reboot and poweroff are already available in the Linux kernel sources. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Anup Patel authored
Let us add a simple FDT based system regmap driver which follows the device tree bindings already defined in the Linux kernel. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Anup Patel authored
We add a simple FDT based regmap framework which is built on top of generic regmap library. The phandle of FDT regmap DT node is treated as unique regmap ID. The FDT based regmap drivers will be probed on-demand from fdt_regmap_get_by_phandle() and fdt_regmap_get() called by the regmap client drivers. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Anup Patel authored
We add generic regmap access library which is independent of hardware description format (FDT or ACPI). The OpenSBI platform support or regmap drivers can register regmap instances which can be discovered by different regmap clients based on the unique ID of regmap instances. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Anup Patel authored
The "driver" pointer in struct i2c_adapter is not used anywhere so let us remove it. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Xiang W authored
Because the CSR names in the spec are mseccfg and mseccfgh. Remove CSR_MSECCFG_LOWER and CSR_MSECCFG_UPPER and directly define CSR_MSECCFG and CSR_MSECCFGH. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Andrew Jones authored
commit 68e66106120f ("SUSP: Add SBI_ERR_DENIED") of the SBI spec adds a new error code, SBI_ERR_DENIED, which is returned when entry criteria has not be meant. Update the system suspend implementation to return this error when it has detected that not all harts are in the STOPPED state. Signed-off-by:Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Heinrich Schuchardt authored
License identifiers should be machine readable. According to the SPDX v2.3.0 specification annex E parentheses are not used in the SPDX identifier field when specifying multiple licenses [1]. [1] https://spdx.github.io/spdx-spec/v2.3/using-SPDX-short-identifiers-in-source-files/ Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Jul 13, 2023
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Himanshu Chauhan authored
With Smepmp enabled, it is necessary for shared memory from S/U mode to be mapped/unmapped before and after read/write of the memory region. This patch maps the debug console shared memory before accessing it. Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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