Commits · development-08dd5f65b06 · github.com / openhwgroup / corev-gcc

Jun 22, 2023

CORE-V: Support CORE-V fast interrupts · 62057880

Craig Blackmore authored Jun 14, 2023

Adds support for __attribute__((interrupt("corev-fast", mode))), where
mode is optional and is one of "machine", "supervisor" or "user".

CORE-V fast interrupt functions behave the same as standard RISC-V
interrupt functions except they do not save caller saved registers
(including ra, which the RISC-V ABI defines as caller saved but gcc
treats as callee saved).

gcc/ChangeLog:

	* config/riscv/riscv.cc (struct machine_function): Replace
	interrupt_mode with interrupt_type.
	(struct riscv_interrupt_type): New.
	(riscv_attribute_table): Alllow two arguments in interrupt
	attribute.
	(riscv_handle_type_attribute): Handle optional corev-fast
	argument.
	(riscv_save_reg_p): Do not save caller saved registers for
	interrupt functions if interrupt_type.save_call_used_p is false.
	(riscv_compute_frame_info): Do not save prologue temporary
	register for interrupt functions if
	interrupt_type.save_call_used_p is false.
	(riscv_expand_epilogue): Replace interrupt_mode with
	interrupt_type.mode.
	(riscv_epilogue_uses): Do not add uses for caller saved
	registers if interrupt_type.save_call_used_p is false.
	(riscv_get_interrupt_type): Construct and return a
	riscv_interrupt_type instead of riscv_privilege_levels.
	(riscv_set_current_function): Set interrupt_type intead of
	interrupt_mode.  Check interrupt_type.mode instead of
	interrupt_type.
	(riscv_merge_decl_attributes): Change riscv_privilege_levels
	to riscv_interrupt_type.  Add check for matching
	save_call_used_p.
	* doc/extend.texi: Document new optional "corev-fast" parameter
	to RISC-V interrupt attribute.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/interrupt-5.c: Update dg-warning text.
	* gcc.target/riscv/cv-interrupt-1.c: New test.
	* gcc.target/riscv/cv-interrupt-2.c: New test.
	* gcc.target/riscv/cv-interrupt-3.c: New test.
	* gcc.target/riscv/cv-interrupt-4.c: New test.
	* gcc.target/riscv/cv-interrupt-5.c: New test.
	* gcc.target/riscv/cv-interrupt-all-f-1.c: New test.
	* gcc.target/riscv/cv-interrupt-all-f-2.c: New test.
	* gcc.target/riscv/cv-interrupt-all-x-1.c: New test.
	* gcc.target/riscv/cv-interrupt-all-x-2.c: New test.
	* gcc.target/riscv/cv-interrupt-all-x-3.c: New test.
	* gcc.target/riscv/cv-interrupt-all-x-4.c: New test.
	* gcc.target/riscv/cv-interrupt-conflict-type.c: New test.
	* gcc.target/riscv/cv-interrupt-debug.c: New test.
	* gcc.target/riscv/cv-interrupt-mmode.c: New test.
	* gcc.target/riscv/cv-interrupt-smode.c: New test.
	* gcc.target/riscv/cv-interrupt-umode.c: New test.

62057880

Update operand order to match spec for bit manip instructions · c8f25c85

Mary Bennett authored Apr 17, 2023

Fix to issue #32.

gcc/config/riscv:
  * corev.md: Changed operand order from rd,rs1,Is3,Is2 to
    rd,rs1,Is2,Is3 for cv.bset, cv.bclr, cv.insert, cv.extractu,
    and cv.extract. This now matches the specification.

gcc/testsuite/gcc.target/riscv:
  * cv-march-xcvbitmanip-compile-bclr.c: Updated test to match spec.
  * cv-march-xcvbitmanip-compile-bset.c: Likewise.
  * cv-march-xcvbitmanip-compile-extract.c: Likewise.
  * cv-march-xcvbitmanip-compile-extractu.c: Likewise.
  * cv-march-xcvbitmanip-compile-insert.c: Likewise.

c8f25c85

CV32E40Pv2 General ALU Builtins Update · f52e91d9

Nandni Jamnadas authored Mar 30, 2023

	* gcc/config/riscv/corev.md: Changes in the output templates
	  to generate correct assemble operands.

f52e91d9

Mar 10, 2023

XCVALU builtins added · 08dd5f65

Helene CHELIN authored Mar 02, 2023



Files Changed:
gcc/common/config/riscv:
 * riscv-common.cc: Added the XCVALU extension.

gcc/doc:
 * extend.texi: Added XCVALU builtin documentation.

gcc/config/riscv:
 * corev.def: Added builtins for the XCVALU extension.
 * corev.md: Likewise.
 * constraints.md: Likewise.
 * predicates.md: Likewise.
 * riscv-builtins.cc: Likewise.
 * riscv-ftypes.def: Likewise.
 * riscv-opts.h: Likewise.

gcc/testsuite/gcc.target/riscv:
 * cv-march-xcvalu-compile-addn.c: Added new tests.
 * cv-march-xcvalu-compile-addnr.c: Likewise.
 * cv-march-xcvalu-compile-addrn.c: Likewise.
 * cv-march-xcvalu-compile-addrnr.c: Likewise.
 * cv-march-xcvalu-compile-addun.c: Likewise.
 * cv-march-xcvalu-compile-addunr.c: Likewise.
 * cv-march-xcvalu-compile-addurn.c: Likewise.
 * cv-march-xcvalu-compile-addurnr.c: Likewise.
 * cv-march-xcvalu-compile-clip.c: Likewise.
 * cv-march-xcvalu-compile-clipr.c: Likewise.
 * cv-march-xcvalu-compile-clipu.c: Likewise.
 * cv-march-xcvalu-compile-clipur.c: Likewise.
 * cv-march-xcvalu-compile-extbs.c: Likewise.
 * cv-march-xcvalu-compile-extbz.c: Likewise.
 * cv-march-xcvalu-compile-exths.c: Likewise.
 * cv-march-xcvalu-compile-exthz.c: Likewise.
 * cv-march-xcvalu-compile-max.c: Likewise.
 * cv-march-xcvalu-compile-maxu.c: Likewise.
 * cv-march-xcvalu-compile-min.c: Likewise.
 * cv-march-xcvalu-compile-minu.c: Likewise.
 * cv-march-xcvalu-compile-slet.c: Likewise.
 * cv-march-xcvalu-compile-sletu.c: Likewise.
 * cv-march-xcvalu-compile-subn.c: Likewise.
 * cv-march-xcvalu-compile-subnr.c: Likewise.
 * cv-march-xcvalu-compile-subrn.c: Likewise.
 * cv-march-xcvalu-compile-subrnr.c: Likewise.
 * cv-march-xcvalu-compile-subun.c: Likewise.
 * cv-march-xcvalu-compile-subunr.c: Likewise.
 * cv-march-xcvalu-compile-suburn.c: Likewise.
 * cv-march-xcvalu-compile-suburnr.c: Likewise.
 * cv-march-xcvalu-fail-compile.c: Likewise.
 * cv-march-xcvalu-fail-compile-addn.c: Likewise.
 * cv-march-xcvalu-fail-compile-addurn.c: Likewise.
 * cv-march-xcvalu-fail-compile-clipu.c: Likewise.
 * cv-march-xcvalu-fail-compile-subun.c: Likewise.
 * cv-march-xcvalu-fail-compile-addrn.c: Likewise.
 * cv-march-xcvalu-fail-compile.c: Likewise.
 * cv-march-xcvalu-fail-compile-subn.c: Likewise.
 * cv-march-xcvalu-fail-compile-suburn.c: Likewise.
 * cv-march-xcvalu-fail-compile-addun.c: Likewise.
 * cv-march-xcvalu-fail-compile-clip.c: Likewise.
 * cv-march-xcvalu-fail-compile-subrn.c: Likewise.

gcc/testsuite/lib:
 * target-supports.exp: Added proc for the XCVALU extension.

Signed-off-by: Helene CHELIN <helene.chelin@embecosm.com>

08dd5f65

Feb 28, 2023

Removed Implicit ISA info for CORE-V · 03a74a26
Nandni Jamnadas authored Feb 27, 2023
```
	* gcc/common/config/riscv/riscv-common.cc: Removed xcv for
	  all sub-extensions.
```
03a74a26

CV32E40Pv2 Event Load Update · bb0de24d

Nandni Jamnadas authored Feb 28, 2023

	Updated Event Load to the builtin specification and documentation:
	https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#listing-of-event-load-word-builtins-xcvelw

	* gcc/config/riscv/corev.def: Updated builtin cv_elw to
	  cv_elw_elw and updated argument from void_ptr to int_ptr.
	* gcc/config/riscv/corev.md: Moved UNSPEC_CV_ELW and event load
	  machine pattern from riscv.md to core.md.
	* gcc/config/riscv/riscv-builtins.cc: Added RISCV_ATYPE_INT_PTR
	  argument for integer pointer.
	* gcc/config/riscv/riscv-ftypes.def: Added macro with return type
	  unsigned integer and argument type integer pointer.
	* gcc/config/riscv/riscv.md: Moved UNSPEC_CV_ELW and event load
	  machine pattern from riscv.md to core.md.
	* gcc/doc/extend.texi: Added CORE-V Event Load documentation.
	* gcc/testsuite/gcc.target/riscv/cv-elw-elw-compile-1.c: Updated
	  test to corresponding argument type.

bb0de24d

Feb 23, 2023

Remove 'xcv' extension · d73317c2

Charlie Keaney authored Feb 22, 2023

The CORE-V ISA Extension Naming specification was recently updated.
One of the consequences of this is that the option previously
called 'xcorev' (but implemented as 'xcv' presently due to the
prefix change) has been removed. However, the compiler does not
presently reflect this change. This patch removes the 'xcv' march
flag option so that the compiler and the CORE-V ISA Extension Naming
specification match.

See here for CORE-V ISA Extension Naming specification:
(https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-isa-extension-naming.md)

	* gcc/common/config/riscv/riscv-common.cc: Remove 'xcv' extension.
	* gcc/config/riscv/riscv-opts.h: Likewise.

d73317c2

Update CORE-V Extension name prefix from 'xcorev' to 'xcv' · 12e9332c

Charlie Keaney authored Feb 22, 2023

The CORE-V ISA Extension Naming specification was recently updated.
One of the changes was to change the CORE-V Extension name prefix from 'xcorev' to 'xcv'.
gcc currently prefixes corev extensions with the old prefix 'xcorev' rather than the new prefix 'xcv'.
gcc must be updated in order to reflect this change.
This patch changes all references to 'xcorev' with 'xcv'.
This also includes references in the test suite.
It also replaces internal variables that referred to the extensions as COREV_[EXTENSION_NAME] to CV_[EXTENSION_NAME].

See here for CORE-V ISA Extension Naming specification:
(https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-isa-extension-naming.md)

	* gcc/common/config/riscv/riscv-common.cc: Update references to corev extension prefix with cv.
	* gcc/config/riscv/corev.def: Likewise.
	* gcc/config/riscv/corev.md: Likewise.
	* gcc/config/riscv/riscv-builtins.cc: Likewise.
	* gcc/config/riscv/riscv-opts.h: Likewise.
	* gcc/config/riscv/riscv.md: Likewise.
	* gcc/config/riscv/riscv.opt: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-elw-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-bclr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-bclr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-bclrr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-bclrr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-bitrev.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-bitrev.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-bset.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-bset.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-bsetr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-bsetr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-clb.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-clb.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-cnt.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-cnt.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-extract.c: Renamed to ...
	* ggc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-extract.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-extractr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-extractr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-extractu.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-extractu.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-extractur.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-extractur.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-ff1.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-ff1.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-fl1.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-fl1.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-insert.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-insert.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-insertr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-insertr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-compile-ror.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-compile-ror.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-bclr.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-bclr.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-bitrev.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-bitrev.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-bset.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-bset.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-extract.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-extract.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-extractu.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-extractu.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevbitmanip-fail-compile-insert.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvbitmanip-fail-compile-insert.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mac.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mac.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-machhsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-machhsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-machhsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-machhsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-machhun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-machhun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-machhurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-machhurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-macsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-macsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-macsrn.: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-macsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-macun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-macun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-macurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-macurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-msu.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-msu.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulhhsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulhhsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulhhsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulhhsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulhhun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulhhun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulhhurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulhhurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-compile-mulurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-compile-mulurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mac.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mac.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-machhsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-machhsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-machhsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-machhsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-machhun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-machhun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-machhurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-machhurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-macsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-macsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-macsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-macsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-macun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-macun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-macurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-macurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-msu.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-msu.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulhhsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulhhsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulhhsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulhhsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulhhun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulhhun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulhhurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulhhurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulsn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulsn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulsrn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulsrn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulun.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulun.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-march-xcorevmac-fail-compile-mulurn.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-march-xcvmac-fail-compile-mulurn.c: ... this.
	* gcc/testsuite/gcc.target/riscv/cv-simd-abs-b-compile-1.c: Update references to corev extension prefix with cv.
	* gcc/testsuite/gcc.target/riscv/cv-simd-abs-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxconj-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extract-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extract-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extractu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extractu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-insert-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-insert-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-pack-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-pack-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-packhi-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-packlo-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle-sci-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle2-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle2-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei0-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei1-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei2-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei3-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-xcorevsimd-march-compile-1.c: Renamed to ...
	* gcc/testsuite/gcc.target/riscv/cv-xcvsimd-march-compile-1.c: ... this.
	* gcc/testsuite/lib/target-supports.exp: Update references to corev extension prefix with cv.

12e9332c

CV32E40Pv2 CORE-V SIMD Update · 0fb06d3d

Nandni Jamnadas authored Feb 22, 2023

	* gcc/config/riscv/constraints.md: Renamed `const_int2_operand`
	  to `const_int2_simd_operand`.
	* gcc/config/riscv/corev.md: Renamed `const_int2_operand`
	  to `const_int2_simd_operand`.
	* gcc/config/riscv/predicates.md: Changing layout of CORE-V
	  Predicates.
	* gcc/doc/extend.texi: Changing layout of CORE-V Built-in
	  Documentation.

0fb06d3d

Feb 22, 2023

CV32E40Pv2 220 CORE-V SIMD Builtins: Documentation · 3ad13ad8
Nandni Jamnadas authored Feb 22, 2023
```
	* gcc/doc/extend.texi: Documentation on 142 SIMD Built-ins
	  for 220 SIMD instructions.
```
3ad13ad8

CV32E40Pv2 220 CORE-V SIMD Builtins: Compilation Tests · 02e102db

Nandni Jamnadas authored Feb 21, 2023

	158 Compilation Tests and 1 MARCH test: cv-xcorevsimd-march-compile-1.c

	* gcc/testsuite/gcc.target/riscv/cv-simd-abs-b-compile-1.c: Created.
	* gcc/testsuite/gcc.target/riscv/cv-simd-abs-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-add-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-and-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avg-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmple-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxconj-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotup-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-dotusp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extract-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extract-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extractu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-extractu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-insert-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-insert-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-max-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-maxu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-min-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-minu-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-or-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-pack-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-pack-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-packhi-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-packlo-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotsp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotup-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sdotusp-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle-sci-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle2-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shuffle2-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei0-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei1-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei2-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-shufflei3-sci-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sll-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sra-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-srl-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-sub-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div2-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div4-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-subrotmj-div8-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-sc-b-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-simd-xor-sc-h-compile-1.c: Likewise.
	* gcc/testsuite/gcc.target/riscv/cv-xcorevsimd-march-compile-1.c: Likewise.

02e102db

CV32E40Pv2 220 CORE-V SIMD Builtins Version 1 · f2bd80c4

Nandni Jamnadas authored Feb 21, 2023

    * gcc/config/riscv/constraints.md: Created
        * 6-bit signed immediate constraint "CV6"
        * 6-bit unsigned immediate constraint "CS6"
        * 1-bit shifting immediate constraint:
          * constant integer value "0" constraint "CF0"
          * constant integer value "1" constraint "CF1"
          * constant integer value "2" constraint "CF2"
          * constant integer value "3" constraint "CF3"

    * gcc/config/riscv/corev.def: Defined 142 SIMD builtins
      for 220 SIMD instructions with RISCV_BUILTIN.

    * gcc/config/riscv/corev.md:
      * Machine description pattern for all 142 SIMD builtins with
        UNSPEC version.
      * Included `define_c_enum "unspec"` for CORE-V specific
        unspec macros.

    * gcc/config/riscv/predicates.md: Created
        * 6-bit signed immediate predicate for constraint "CV6"
        * 6-bit unsigned immediate predicate for constraint "CS6"
        * 4-bit unsigned immediate predicate for constraint
          "CF0,CF1,CF2,CF3"

    * gcc/config/riscv/riscv-builtins.cc: Created SIMD Avaliability
      Predicate, RISCV_FTYPE_NAME2, RISCV_FTYPE_ATYPES2. Added
      corresponding argument types for builtins.

    * gcc/config/riscv/riscv-ftypes.def: Added corresponding
      DEF_RISCV_FTYPE return type and argument types for builtins.

f2bd80c4

CV32E40Pv2 CORE-V SIMD Extension Only · 19b03144

Nandni Jamnadas authored Jan 19, 2023

    * gcc/common/config/riscv/riscv-common.cc: Added XCOREVSIMD
      extensions. Added riscv_xcorev_flags to SIMD extensions.
    * gcc/config/riscv/riscv-opts.h: Added corresponding MASK and
      TARGET macros for XCOREVSIMD.

19b03144

XCOREVBITMANIP builtins added · 42393f5f

Mary Bennett authored Feb 01, 2023



Files Changed:
gcc/common/config/riscv:
 * riscv-common.cc: Added the XCOREVBITMANIP extension.

gcc/config/riscv:
 * constraints.md: Added builtins for the XCOREVBITMANIP extension.
 * corev.def: Likewise.
 * corev.md: Likewise.
 * predicates.md: Likewise.
 * riscv-builtins.cc: Likewise.
 * riscv-ftypes.def: Likewise.
 * riscv-opts.h: Likewise.
 * riscv.md: Likewise.

gcc/doc:
 * extend.texi: Added documentation for the XCOREVBITMANIP
   extension builtins.

gcc/testsuite/gcc.target/riscv:
 * cv-march-xcorevbitmanip-compile-bclr.c: Added new tests.
 * cv-march-xcorevbitmanip-compile-bclrr.c: Likewise.
 * cv-march-xcorevbitmanip-compile-bitrev.c: Likewise.
 * cv-march-xcorevbitmanip-compile-bset.c: Likewise.
 * cv-march-xcorevbitmanip-compile-bsetr.c: Likewise.
 * cv-march-xcorevbitmanip-compile-clb.c: Likewise.
 * cv-march-xcorevbitmanip-compile-cnt.c: Likewise.
 * cv-march-xcorevbitmanip-compile-extract.c: Likewise.
 * cv-march-xcorevbitmanip-compile-extractr.c: Likewise.
 * cv-march-xcorevbitmanip-compile-extractu.c: Likewise.
 * cv-march-xcorevbitmanip-compile-extractur.c: Likewise.
 * cv-march-xcorevbitmanip-compile-ff1.c: Likewise.
 * cv-march-xcorevbitmanip-compile-fl1.c: Likewise.
 * cv-march-xcorevbitmanip-compile-insert.c: Likewise.
 * cv-march-xcorevbitmanip-compile-insertr.c: Likewise.
 * cv-march-xcorevbitmanip-compile-ror.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-bclr.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-bitrev.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-bset.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-extract.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-extractu.c: Likewise.
 * cv-march-xcorevbitmanip-fail-compile-insert.c: Likewise.

gcc/testsuite/lib:
 * target-supports.exp: Added proc for the XCOREVBITMANIP extension.

Signed-off-by: Mary Bennett <mary.bennett@embecosm.com>

42393f5f

Jan 30, 2023

XCOREVMAC builtins added · 0976f97e

Mary Bennett authored Jan 10, 2023



gcc/common/config/riscv:
  * riscv-common.cc: Added XCOREVMAC

gcc/config/riscv:
  * corev.def: Added XCOREVMAC builtins.
  * corev.md: Likewise.
  * riscv-builtins.cc: Likewise.
  * riscv-ftypes.def: Likewise.
  * riscv-opts.h: Likewise.
  * riscv.md: Likewise.

gcc/doc:
  * extend.texi: Added XCOREVMAC builtin documentation.

gcc/testsuits/gcc.target/riscv:
  * cv-march-xcorevmac-compile-mac.c: Added compile tests for new builtins.
  * cv-march-xcorevmac-compile-machhsn.c: Likewise.
  * cv-march-xcorevmac-compile-machhsrn.c: Likewise.
  * cv-march-xcorevmac-compile-machhun.c: Likewise.
  * cv-march-xcorevmac-compile-machhurn.c: Likewise.
  * cv-march-xcorevmac-compile-macsn.c: Likewise.
  * cv-march-xcorevmac-compile-macsrn.c: Likewise.
  * cv-march-xcorevmac-compile-macun.c: Likewise.
  * cv-march-xcorevmac-compile-macurn.c: Likewise.
  * cv-march-xcorevmac-compile-msu.c: Likewise.
  * cv-march-xcorevmac-compile-mulhhsn.c: Likewise.
  * cv-march-xcorevmac-compile-mulhhsrn.c: Likewise.
  * cv-march-xcorevmac-compile-mulhhun.c: Likewise.
  * cv-march-xcorevmac-compile-mulhhurn.c: Likewise.
  * cv-march-xcorevmac-compile-mulsn.c: Likewise.
  * cv-march-xcorevmac-compile-mulsrn.c: Likewise.
  * cv-march-xcorevmac-compile-mulun.c: Likewise.
  * cv-march-xcorevmac-compile-mulurn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mac.c: Likewise.
  * cv-march-xcorevmac-fail-compile-machhsn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-machhsrn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-machhun.c: Likewise.
  * cv-march-xcorevmac-fail-compile-machhurn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-macsn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-macsrn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-macun.c: Likewise.
  * cv-march-xcorevmac-fail-compile-macurn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-msu.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulhhsn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulhhsrn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulhhun.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulhhurn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulsn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulsrn.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulun.c: Likewise.
  * cv-march-xcorevmac-fail-compile-mulurn.c: Likewise.

gcc/testsuite/lib:
  * target-supports.exp: Added XCOREVMAC proc.

Signed-off-by: Mary Bennett <mary.bennett@embecosm.com>

0976f97e

Dec 14, 2022

Event Load Update: Changes to instruction pattern in machine description · a4216b6f

Nandni Jamnadas authored Dec 09, 2022



	* gcc/config/riscv/riscv.md: Changed the use of pointer (P) mode
          to single integer (SI) mode.

Signed-off-by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>

a4216b6f

Dec 07, 2022

CV32E40Pv2 Event Load Builtin · fe183086

Nandni Jamnadas authored Dec 05, 2022



	* gcc/common/config/riscv/riscv-common.cc: Added XCOREV and
	  XCOREVELW extensions. Added riscv_xcorev_flags to extensions.
	* gcc/config/riscv/corev.def: Implemented builtin prototype.
	* gcc/config/riscv/riscv-builtins.cc: Added AVAIL for XCOREVELW.
	  Declared pointer type node for builtin argument type.
	  Included "corev.def" to riscv_builtin_description
	  riscv_builtins[].
	* gcc/config/riscv/riscv-ftypes.def: Added DEF_RISCV_TYPE to
	  return an USI (unsigned integer) and take in a VOID_PTR
	  (void pointer).
	* gcc/config/riscv/riscv-opts.h: Added corresponding MASK and
	  TARGET macros for XCOREV and XCOREVELW.
	* gcc/config/riscv/riscv.md: Added machine description for cv.elw.
	* gcc/config/riscv/riscv.opt: Added Target Variable:
	  riscv_xcorev_flags.
	* gcc/testsuite/gcc.target/riscv/cv-elw-compile-1.c: Created test
	  for cv.elw builtin.

Signed-off-by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>

fe183086

Oct 31, 2022

RISC-V: Suppress build warnings · ae82a1a3

Kito Cheng authored Sep 09, 2022

../../gcc/common/config/riscv/riscv-common.cc: In function 'const char* riscv_multi_lib_check(int, const char**)':
../../gcc/common/config/riscv/riscv-common.cc:1451:11: error: bare apostrophe ''' in format [-Werror=format-diag]
 1451 |       "Can't find suitable multilib set for %<-march=%s%>/%<-mabi=%s%>",
      |           ^
../../gcc/common/config/riscv/riscv-common.cc:1451:7: note: if avoiding the apostrophe is not feasible, enclose it in a pair of '%<' and '%>' directives instead
 1451 |       "Can't find suitable multilib set for %<-march=%s%>/%<-mabi=%s%>",
      |       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../gcc/common/config/riscv/riscv-common.cc: At global scope:
../../gcc/common/config/riscv/riscv-common.cc:1492:1: error: 'int riscv_check_conds(const switchstr*, int, int, const std::vector<std::__cxx11::basic_string<char> >&)' defined but not used [-Werror=unused-function]
 1492 | riscv_check_conds (
      | ^~~~~~~~~~~~~~~~~
../../gcc/common/config/riscv/riscv-common.cc:1374:1: error: 'const char* find_last_appear_switch(const switchstr*, int, const char*)' defined but not used [-Werror=unused-function]
 1374 | find_last_appear_switch (
      | ^~~~~~~~~~~~~~~~~~~~~~~
cc1plus: all warnings being treated as errors
make[3]: *** [Makefile:2442: riscv-common.o] Error 1

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc (RISCV_USE_CUSTOMISED_MULTI_LIB):
	Move forward for cover all all necessary functions for suppress
	unused function warnings.
	(riscv_multi_lib_check): Move forward, and tweak message to suppress
	-Werror=format-diag warning.

ae82a1a3

RISC-V: Implement TARGET_COMPUTE_MULTILIB · c49943cf

Kito Cheng authored Nov 20, 2020

Use TARGET_COMPUTE_MULTILIB to search the multi-lib reuse for riscv*-*-elf*,
according following rules:

 1. Check ABI is same.
 2. Check both has atomic extension or both don't have atomic extension.
    - Because mix soft and hard atomic operation doesn't make sense and
      won't work as expect.
 3. Check current arch is superset of the target multi-lib arch.
    - It might result slower performance or larger code size, but it
      safe to run.
 4. Pick most match multi-lib set if more than one multi-lib are pass
    the above checking.

Example for how to select multi-lib:
  We build code with -march=rv32imaf and -mabi=ilp32, and we have
  following 5 multi-lib set:

    1. rv32ia/ilp32
    2. rv32ima/ilp32
    3. rv32imf/ilp32
    4. rv32imaf/ilp32f
    5. rv32imafd/ilp32

  The first and second multi-lib is safe to like, 3rd multi-lib can't
  re-use becasue it don't have atomic extension, which is mismatch according
  rule 2, and the 4th multi-lib can't re-use too due to the ABI mismatch,
  the last multi-lib can't use since current arch is not superset of the
  arch of multi-lib.

And emit error if not found suitable multi-lib set, the error message
only emit when link with standard libraries.

Example for when error will be emitted:

  $ riscv64-unknown-elf-gcc -print-multi-lib
  .;
  rv32i/ilp32;@march=rv32i@mabi=ilp32
  rv32im/ilp32;@march=rv32im@mabi=ilp32
  rv32iac/ilp32;@march=rv32iac@mabi=ilp32
  rv32imac/ilp32;@march=rv32imac@mabi=ilp32
  rv32imafc/ilp32f;@march=rv32imafc@mabi=ilp32f
  rv64imac/lp64;@march=rv64imac@mabi=lp64

  // No actual linking, so no error emitted.
  $ riscv64-unknown-elf-gcc -print-multi-directory -march=rv32ia -mabi=ilp32
  .

  // Link to default libc and libgcc, so check the multi-lib, and emit
  // error because not found suitable multilib.
  $ riscv64-unknown-elf-gcc -march=rv32ia -mabi=ilp32 ~/hello.c
  riscv64-unknown-elf-gcc: fatal error: can't found suitable multilib set for '-march=rv32ia'/'-mabi=ilp32'
  compilation terminated.

  // No error emitted, because not link to stdlib.
  $ riscv64-unknown-elf-gcc -march=rv32ia -mabi=ilp32 ~/hello.c -nostdlib

  // No error emitted, because compile only.
  $ riscv64-unknown-elf-gcc -march=rv32ia -mabi=ilp32 ~/hello.c -c

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc: Include <vector>.
	(struct riscv_multi_lib_info_t): New.
	(riscv_subset_list::match_score): Ditto.
	(find_last_appear_switch): Ditto.
	(prefixed_with): Ditto.
	(struct multi_lib_info_t): Ditto.
	(riscv_current_arch_str): Ditto.
	(riscv_current_abi_str): Ditto.
	(riscv_multi_lib_info_t::parse): Ditto.
	(riscv_check_cond): Ditto.
	(riscv_check_conds): Ditto.
	(riscv_compute_multilib): Ditto.
	(TARGET_COMPUTE_MULTILIB): Defined.
	* config/riscv/elf.h (LIB_SPEC): Call riscv_multi_lib_check if
	doing link.
	(RISCV_USE_CUSTOMISED_MULTI_LIB): New.
	* config/riscv/riscv.h (riscv_multi_lib_check): New.
	(EXTRA_SPEC_FUNCTIONS): Add riscv_multi_lib_check.
	* config/riscv/riscv-subset.h (riscv_subset_list::match_score): New.

c49943cf

Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result. · a1bcf6e6

Kito Cheng authored Nov 20, 2020

Create a new hook to let target could override the multi-lib result,
the motivation is RISC-V might have very complicated multi-lib re-use
rule*, which is hard to maintain and use current multi-lib scripts,
we even hit the "argument list too long" error when we tried to add more
multi-lib reuse rule.

So I think it would be great to have a target specific way to determine
the multi-lib re-use rule, then we could write those rule in C, instead
of expand every possible case in MULTILIB_REUSE.

* Here is an example for RISC-V multi-lib rules:
https://gist.github.com/kito-cheng/0289cd42d9a756382e5afeb77b42b73b

gcc/ChangeLog:

	* common/common-target.def (compute_multilib): New.
	* common/common-targhooks.h (default_compute_multilib): New.
	* common/common-targhooks.cc (default_compute_multilib): New.
	* doc/tm.texi.in (TARGET_COMPUTE_MULTILIB): New.
	* doc/tm.texi: Regen.
	* gcc.cc: Include common/common-target.h.
	(set_multilib_dir) Call targetm_common.compute_multilib.
	(SWITCH_LIVE): Move to opts.h.
	(SWITCH_FALSE): Ditto.
	(SWITCH_IGNORE): Ditto.
	(SWITCH_IGNORE_PERMANENTLY): Ditto.
	(SWITCH_KEEP_FOR_GCC): Ditto.
	(struct switchstr): Ditto.
	* opts.h (SWITCH_LIVE): Move from gcc.c.
	(SWITCH_FALSE): Ditto.
	(SWITCH_IGNORE): Ditto.
	(SWITCH_IGNORE_PERMANENTLY): Ditto.
	(SWITCH_KEEP_FOR_GCC): Ditto.
	(struct switchstr): Ditto.

a1bcf6e6

Oct 19, 2022

Extend RVC to RVC&ZCA. · e359e052

Jiawei authored Sep 27, 2022

Extend RVC with ZC extension and compress the instructions, since all ZC extension depend on ZCA, just combine RVC with ZCA.

gcc/ChangeLog:

        * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Mix Target.
        * config/riscv/riscv-shorten-memrefs.cc: Ditto.
        * config/riscv/riscv.cc (riscv_compressed_reg_p): Ditto.
        (riscv_rtx_costs): Ditto.
        (riscv_address_cost): Ditto.
        (riscv_first_stack_step): Ditto.
        * config/riscv/riscv.h (FUNCTION_BOUNDARY): Ditto.

e359e052

Sep 07, 2022
- Fix Version Numbers Associated With RISCV Zc extensions. · fdcd4b49
  Charlie Keaney authored Aug 22, 2022
```
	* gcc/ChangeLog: Updated Changelog.
	* gcc/common/config/riscv/riscv-common.cc: Modified version numbers for RISCV Zc.
```
  fdcd4b49
- Add Zc* test for march args being passed. · 5443a0cb
  Charlie Keaney authored Aug 15, 2022
```
	* gcc.target/riscv/zc-zca-arch.c: New test for march args
	being passed from compiler to assembler.
	* gcc.target/riscv/zc-zcb-arch.c: Likewise.
	* gcc.target/riscv/zc-zcb-m-arch.c: Likewise.
	* gcc.target/riscv/zc-zcb-zba-arch.c: Likewise.
	* gcc.target/riscv/zc-zcf-arch.c: Likewise.
	* gcc.target/riscv/zc-zcf-zbb-arch.c: Likewise.
	* gcc.target/riscv/zc-zcmb-arch.c: Likewise.
	* gcc.target/riscv/zc-zcmp-arch.c: Likewise.
	* gcc.target/riscv/zc-zcmpe-arch.c: Likewise.
	* gcc.target/riscv/zc-zcmt-arch.c: Likewise.
```
  5443a0cb
- fix zcmpe's testcase error · ac14767a
  LiaoShihua authored Jun 24, 2022
  
  ac14767a
- fix aligned_size error · baf0b62a
  LiaoShihua authored Jun 23, 2022
  
  baf0b62a
- fix fail case about zcmp and zcmpe extension · e89a1f7c
  yulong authored May 08, 2022
  
  e89a1f7c
- zcmp: simplify push/pop implementation · 03c3e28b
  Lin Sinan authored Apr 24, 2022
  
  03c3e28b
- zcmp: do not handle variable argument case. · ef43ff08
  Lin Sinan authored Apr 23, 2022
  
  ef43ff08
- remove a warning · cc381e02
  Lin Sinan authored Apr 23, 2022
  
  cc381e02
- zcmp: fix non-continous callee saved register bugs · d1a9186f
  Lin Sinan authored Apr 08, 2022
  
  d1a9186f
- zcmpe: add zcmpe testcases · 437854a9
  Lin Sinan authored Mar 29, 2022
  
  437854a9
- zcmpe: add support for zcmpe · 68c76e4a
  Lin Sinan authored Mar 31, 2022
  
  68c76e4a
- zcmp: add push/pop testcases · 19ba82ce
  Lin Sinan authored Jan 06, 2022
  
  19ba82ce
- zcmp: add pop/popret/popretz · 84f31ba6
  Lin Sinan authored Mar 17, 2022
  
  84f31ba6
- zcmp: add cm.push · 28c85862
  Lin Sinan authored Dec 18, 2021
  
  28c85862
- Minimal support of ZC extension · 01822ecd
  jiawei authored Mar 15, 2022
  
  01822ecd
Apr 22, 2022

Merge pull request #7 from mablinov/dev-rebase-2 · 4738f09f
Maxim Blinov authored Apr 22, 2022
```
Rebase development branch on latest upstream master
```
4738f09f

Update README for CORE-V · 8e4ee030

Jeremy Bennett authored Sep 14, 2020



Files changed:

	* README: Add CORE-V preamble.

Signed-off-by: Jeremy Bennett <jeremy.bennett@embecosm.com>

8e4ee030

Daily bump. · c1a9cf67
GCC Administrator authored Apr 22, 2022

c1a9cf67

rs6000/testsuite: xfail bswap-brw.c · 748d46cd

Segher Boessenkool authored Apr 21, 2022

This testcase does not generate anywhere near optimal code for 32-bit
code.  For p10 it actually now fails this testcase, after the previous
patch.  Let's xfail it.

2022-04-21  Segher Boessenkool  <segher@kernel.crashing.org>

gcc/testsuite/
	PR target/103197
	PR target/102146
	* gcc.target/powerpc/bswap-brw.c: Add xfail on scan-assembler for -m32.

748d46cd