- Jan 17, 2020
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StevenWanYu authored
Remove unused link components in unittest according to post commit comments.
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Michael Liao authored
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Krzysztof Parzyszek authored
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Fedor Sergeev authored
Introduce parsing, add a few instances of parameter use into GVN-PRE tests. Reviewers: skatkov, asbirlea Reviewed By: skatkov Tags: #llvm Differential Revision: https://reviews.llvm.org/D72752
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Kazu Hirata authored
This reverts commit 2d258ed9. This revision fixes the Windows build and adds a testcase for it, namely thread-two-bbs3.ll. My original patch improperly copied EH pads on Windows. This patch disregards jump threading opportunities having to do with EH pads. [JumpThreading] Thread jumps through two basic blocks Summary: This patch teaches JumpThreading.cpp to thread through two basic blocks like: bb3: %var = phi i32* [ null, %bb1 ], [ @a, %bb2 ] %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %bb4, label ... bb4: %cmp = icmp eq i32* %var, null br i1 %cmp, label bb5, label bb6 by duplicating basic blocks like bb3 above. Once we duplicate bb3 as bb3.dup and redirect edge bb2->bb3 to bb2->bb3.dup, we have: bb3: %var = phi i32* [ @a, %bb2 ] %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %bb4, label ... bb3.dup: %var = phi i32* [ null, %bb1 ] %tobool = icmp eq i32 %cond, 0 br i1 %tobool, label %bb4, label ... bb4: %cmp = icmp eq i32* %var, null br i1 %cmp, label bb5, label bb6 Then the existing code in JumpThreading.cpp can thread edge bb3.dup->bb4 through bb4 and eventually create bb3.dup->bb5. Reviewers: wmi Subscribers: hiraditya, jfb, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70247
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Krzysztof Parzyszek authored
In addition to that, use target features to validate intrinsic availability on a given target.
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Fangrui Song authored
`{clang,gcc} -nostdlib -r a.c` passes --dynamic-linker to the linker, and the expected behavior is to ignore it. If .interp is kept in the relocatable object file, a final link will get PT_INTERP even if --dynamic-linker is not specified. glibc ld.so expects to see PT_DYNAMIC and the executable will likely fail to run. Ignore --dynamic-linker in -r mode as well as -shared. -
StevenWanYu authored
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Joachim Protze authored
Fix the memory leak pointed out in https://reviews.llvm.org/D70412. And a second one due to double-allocation. Reviewed by: Hahnfeld Differential revision: https://reviews.llvm.org/D72779
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Eric Fiselier authored
We need to mark string::npos with _LIBCPP_FUNC_VIS on the first in-class declaration, otherwise it might get ignored
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Jonas Devlieghere authored
Cover more cases handled by the formatter.
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Matt Arsenault authored
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StevenWanYu authored
Only run this test on powerpc tragets, because other platforms might not have powerpc registered.
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Matt Arsenault authored
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Matt Arsenault authored
Clamping the scalar is much better than lowering with superwide shifts for types > s64.
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Matt Arsenault authored
This was assuming the narrow target was the source type. Respect the requested type when these don't match by using intermediate merges. This avoids producing very wide, illegal shift expansions.
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Matt Arsenault authored
Also rename a few things. Handling a different requested type will require this to become much more complex.
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Krzysztof Parzyszek authored
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Craig Topper authored
[LegalizeDAG][Mips] Add an assert to protect a uint_to_fp implementation from double rounding. Add a i32->f32 uint_to_fp implementation that avoids this code. The algorithm here only works if the sint_to_fp doesn't do any rounding. Otherwise it can round before the offset fixup is applied. Add an assert to protect this. To avoid breaking the one test in tree that tested this code with a set of types that fail the assert, I've enabled i32->f32 to use the i64->f32 algorithm. This only occurs when f64 isn't a legal type. If f64 is legal then we do i32->f64->f32 instead. Differential Revision: https://reviews.llvm.org/D72794
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Kadir Cetinkaya authored
Summary: Fixes https://github.com/clangd/clangd/issues/249 Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72498
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Kadir Cetinkaya authored
Summary: This got forgotten during the process. Reviewers: sammccall, usaxena95 Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72840
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Matt Arsenault authored
Also generate check lines so this isn't just testing the meaningless block name.
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Matt Arsenault authored
Unify MMO flag handling with SelectionDAG like with loads and stores.
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Matt Arsenault authored
This was dropping the invariant metadata on dead argument loads, so they weren't deleted. Atomics still need to be fixed the same way. Also, apparently store was never preserving dereferencable which should also be fixed.
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Matt Arsenault authored
Allow using srcvalue for discarding pattern inputs.
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Matt Arsenault authored
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Matt Arsenault authored
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Adrian Prantl authored
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Krzysztof Parzyszek authored
This affects the following instructions: Tag: M4_mpyrr_addr Syntax: Ry32 = add(Ru32,mpyi(Ry32,Rs32)) Tag: M4_mpyri_addr_u2 Syntax: Rd32 = add(Ru32,mpyi(#u6:2,Rs32)) Tag: M4_mpyri_addr Syntax: Rd32 = add(Ru32,mpyi(Rs32,#u6)) Tag: M4_mpyri_addi Syntax: Rd32 = add(#u6,mpyi(Rs32,#U6)) Tag: M4_mpyrr_addi Syntax: Rd32 = add(#u6,mpyi(Rs32,Rt32)) Tag: S4_addaddi Syntax: Rd32 = add(Rs32,add(Ru32,#s6)) Tag: S4_subaddi Syntax: Rd32 = add(Rs32,sub(#s6,Ru32)) Tag: S4_or_andix Syntax: Rx32 = or(Ru32,and(Rx32,#s10)) Tag: S4_andi_asl_ri Syntax: Rx32 = and(#u8,asl(Rx32,#U5)) Tag: S4_ori_asl_ri Syntax: Rx32 = or(#u8,asl(Rx32,#U5)) Tag: S4_addi_asl_ri Syntax: Rx32 = add(#u8,asl(Rx32,#U5)) Tag: S4_subi_asl_ri Syntax: Rx32 = sub(#u8,asl(Rx32,#U5)) Tag: S4_andi_lsr_ri Syntax: Rx32 = and(#u8,lsr(Rx32,#U5)) Tag: S4_ori_lsr_ri Syntax: Rx32 = or(#u8,lsr(Rx32,#U5)) Tag: S4_addi_lsr_ri Syntax: Rx32 = add(#u8,lsr(Rx32,#U5)) Tag: S4_subi_lsr_ri Syntax: Rx32 = sub(#u8,lsr(Rx32,#U5))
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Fangrui Song authored
ThunkSection contains 4-byte instructions on all targets that use thunks. Thunks should not be used in any performance sensitive places, and locality/cache line/instruction fetching arguments should not apply. We use 16 bytes as preferred function alignments for modern PowerPC cores. In any case, 8 is not optimal. Differential Revision: https://reviews.llvm.org/D72819
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Arkady Shlykov authored
This reverts commit 3f3017e1 because there's a failure on peel-loop-nests.ll with LLVM_ENABLE_EXPENSIVE_CHECKS on. Differential Revision: https://reviews.llvm.org/D70304
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Nico Weber authored
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Nico Weber authored
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stevewan authored
Summary: The `llc` tool currently defaults to Static relocation model and generates non-relocatable code for 32-bit Power. This is not desirable on AIX where we always generate Position Independent Code (PIC). This patch makes PIC the default relocation model for AIX. Reviewers: daltenty, hubert.reinterpretcast, DiggerLin, Xiangling_L, sfertile Reviewed By: hubert.reinterpretcast Subscribers: mgorny, wuzish, nemanjai, hiraditya, kbarton, jsji, shchenz, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72479
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Ulrich Weigand authored
Use floating-point instead of integer zero constants to avoid creating implicit conversions, which currently cause suboptimal code to be generated with -ffp-exception-behavior=strict. NFC otherwise.
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Pavel Labath authored
With the changes in 15a6df52, the test is failing in some configurations. Reverting while I investigate
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Nico Weber authored
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Derek Schuff authored
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Paolo Severini authored
Add plugin class SymbolVendorWasm, with the logic to manage debug symbols for Wasm modules. Reviewers: clayborg, labath, aprantl, sbc100, teemperor Reviewed By: labath Tags: #lldb Differential Revision: https://reviews.llvm.org/D72650
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Fedor Sergeev authored
There are a few global (cl::opt) controls that enable optional behavior in GVN. Introduce GVNOptions that provide corresponding per-pass instance controls. That will allow to use GVN multiple times in pipeline each time with different settings. Reviewers: asbirlea, rnk, reames, skatkov, fhahn Reviewed By: fhahn Tags: #llvm Differential Revision: https://reviews.llvm.org/D72732
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