Running iwyu-diff on LLVM codebase since 70306542 detected a few
regressions, fixing them.

Differential Revision: https://reviews.llvm.org/D126417

when we move instruction over the guard we must clear nuw/nsw flags
but we do not.

This simplifies quite a few cases where we manually duplicate the
escaping logic.

This allows for more easily interacting with lit files that utilize
the test dialect.

Differential Revision: https://reviews.llvm.org/D126427

In this patch we change test cases from using "CHECK" to using
"CHECK-NEXT", which is to ensure the order of loops output by
loop cache analysis is correct. After D124725 we fixed the
non-deterministic output order hence we did not use "CHECK-DAG"
anymore, and now we should really use "CHECK-NEXT" to make sure
the loops in the output loop vector follow the right order.

Reviewed By: bmahjour, #loopoptwg

Differential Revision: https://reviews.llvm.org/D124984

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D126268

This patch break foldBitCastBitwiseLogic limite the destination
must have an integer element type, and eliminate one bitcast by
doing the logic op in the type of the input that has an integer
element type.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D126184

This patch tries to solve the incoordination between the direct and intermediate  cast caused by D123975.
This patch replaces ISD::FP_EXTEND and ISD::FP_ROUND with RVV VL op in the lowering of FP scalable vector direct cast to unify with the intermediate cast.
And it also changes the FP widenning pattern with the VL op.

Differential Revision: https://reviews.llvm.org/D125364

Even though MASM files typically have the .asm extension, there are some
use cases [0] where they have the .S extension. MSVC ml assembles such
files with no problems, so llvm-ml should as well.

Additionally, fix the implementation of the /Ta flag and add a test for
it.

[0]: https://crrev.com/c/3668287

Reviewed By: epastor

Differential Revision: https://reviews.llvm.org/D126425

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125950

Reviewed By: benshi001, asb

Differential Revision: https://reviews.llvm.org/D126185

The CreateEntry() function in name resolution needs to allow for the name
of an alternate entry point already having been declared in the outer scope
as the homonymous specific procedure of a generic interface; e.g.,

  interface foo
    module procedure foo
  end interface
  subroutine bar
    entry foo
  end subroutine

Differential Revision: https://reviews.llvm.org/D126436

The f18 standard defines several intrinsic modules containing definitions
and declarations for various constants, types, and procedures.  This PR adds
declarations for missing procedures in these modules.

Support complex operations sqrt, expm1, and tanh.

Add tests.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D126393

Add a test.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D126409

Skip all watchpoint hit-count/ignore-count tests for multithreaded
API tests for now on arm64 Darwin.

On AArch64, insns that trigger a WP are rolled back and we are
notified.  lldb needs to disable the WP, insn step, re-enable it,
then report it to the user.  lldb only does this full step action
for the "selected thread", and so when a program stops with
multiple threads hitting a stop reason, some of them watchpoints,
any non-selected-thread will not be completed in this way.  But
all threads with the initial watchpoint exception will have their
hit-count/ignore-counts updated.  When we resume execution, the
other threads sitting at the instruction will again execute &
trigger the WP exceptoin again, repeating until we've gone through
all of the threads.

This bug is being tracked in llvm.org/pr49433 and inside apple
in rdar://93863107

All the other tests here use underscores, so we should rename this file
to be consistent.

Otherwise mac builds are broken, e.g. http://45.33.8.238/macm1/36056/step_4.txt

../../llvm/lib/Support/Unix/Process.inc:35:10: fatal error: 'malloc.h' file not found
 #include <malloc.h>

A recent change fixed the processing of BIND(C,NAME=expr) character
expressions so that they are evaluated as constants in the scope of
the subprogram.  However, when the character name expression results
in an empty value after trimming, the compiler emits a warning message,
and this message is now causing a crash due to a lack of statement
context.  To fix, extend the deferred processing of the BIND(C,NAME="")
so that a basic statement context exists.

Differential Revision: https://reviews.llvm.org/D126416

SLP should build ScatterVectorize nodes only if they actually end up
with masked gather rather than with scalarization. In the second
scenario better to build a gather node.

Differential Revision: https://reviews.llvm.org/D126379

We could implement retrieving the revision here, but we may avoid
"Just the same but only different revision hash string".

Extend the Frame struct to hold the symbol name if requested
when a RawMemProfReader object is constructed. This change updates the
tests and removes the need to pass --debug to obtain the mapping from
GUID to symbol names.

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D126344

Need to use all ReductionOps when propagating flags for the reduction
ops, otherwise transformation is not correct. Plus, need to drop nuw/nsw
flags.

Differential Revision: https://reviews.llvm.org/D126371

When constructing the `Environment`, the `this` pointee is established
for a `CXXMethodDecl` by looking at its parent. However, inside of
lambdas, a `CXXThisExpr` refers to the captured `this` coming from the
enclosing member function.

When establishing the `this` pointee for a function, we check whether
the function is a lambda, and check for an enclosing member function
to establish the `this` pointee storage location.

Differential Revision: https://reviews.llvm.org/D126413

Support for unions is incomplete (per 99f7d55e) and the `this` pointee
storage location is not set for unions. The assert in
`VisitCXXThisExpr` is then guaranteed to trigger when analyzing member
functions of a union.

This commit changes the assert to an early-return. Any expression may
be undefined, and so having a value for the `CXXThisExpr` is not a
postcondition of the transfer function.

Differential Revision: https://reviews.llvm.org/D126405

If you are using an old enough glibc which doesn't have mallinfo2, set
`llvm_have_mallinfo2 = false`.

At this point it's likely that most people using the gn build are
compiling against a recent enough glibc (glibc 2.33 which was released
in Feb 2021).

Reviewed By: peterwaller-arm

Differential Revision: https://reviews.llvm.org/D126415

MCSymbolizer::tryAddingSymbolicOperand() overloaded the Size parameter
to specify either the instruction size or the operand size depending on
the architecture. However, for proper symbolic disassembly on X86, we
need to know both sizes, as an instruction can have two operands, and
the instruction size cannot be reliably calculated based on the operand
offset and its size. Hence, split Size into OpSize and InstSize.

For X86, the new interface allows to fix a couple of issues:
  * Correctly adjust the value of PC-relative operands.
  * Set operand size to zero when the operand is specified implicitly.

Differential Revision: https://reviews.llvm.org/D126101

Reviewed By: ayermolo

Differential Revision: https://reviews.llvm.org/D126086

This commit modifies the AsmPrinter to avoid emitting any zero-sized symbols to
the .debug_aranges table, by rounding their size up to 1. Entries with zero
length violate the DWARF 5 spec, which states:

> Each descriptor is a triple consisting of a segment selector, the beginning
> address within that segment of a range of text or data covered by some entry
> owned by the corresponding compilation unit, followed by the non-zero length
> of that range.

In practice, these zero-sized entries produce annoying warnings in lld and
cause GNU binutils to truncate the table when parsing it.

Other parts of LLVM, such as DWARFDebugARanges in the DebugInfo module
(specifically the appendRange method), already avoid emitting zero-sized
symbols to .debug_aranges, but not comprehensively in the AsmPrinter. In fact,
the AsmPrinter does try to avoid emitting such zero-sized symbols when labels
aren't involved, but doesn't when the symbol to emitted is a difference of two
labels; this patch extends that logic to handle the case in which the symbol is
defined via labels.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D126257

The new driver uses an augmented linker wrapper to perform the device
linking phase, but to the user looks like a regular linker invocation.
Contrary to the old driver, the new driver contains all the information
necessary to produce a linked device image in the host object itself.
Currently, we infer the usage of the device linker by the user
specifying an offloading toolchain, e.g. (--offload-arch=...) or
(-fopenmp-targets=...), but this shouldn't be strictly necessary.
This patch introduces a new option `--offload-link` to tell
 the driver to use the offloading linker instead. So a compilation flow
 can now look like this,

```
clang foo.cu --offload-new-driver -fgpu-rdc --offload-arch=sm_70 -c
clang foo.o --offload-link -lcudart
```

I was considering if this could be merged into the `-fuse-ld` option,
but because the device linker wraps over the users linker it would
conflict with that. In the future it's possible to merge this into `lld`
completely or `gold` via a plugin and we would use this option to
enable the device linking feature. Let me know what you think for this.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D126398

There were two copies of AlwaysCopyAnalysisState. (Must have been a merge conflict mistake...)

Differential Revision: https://reviews.llvm.org/D126414

NativePDB often assumes that all debug info are available.
This is one step to make it more pervasive.

Differential Revision: https://reviews.llvm.org/D125844

MachineCode Support for FLAT type instructions

Contributors:
Sebastian Neubauer <sebastian.neubauer@amd.com>

Patch 12/N for upstreaming of AMDGPU gfx11 architecture.

Depends on D125989

Reviewed By: rampitec, #amdgpu

Differential Revision: https://reviews.llvm.org/D125992

On Ubuntu 18.04 with GCC 7.5 Intel trace code fails to build due to
failure to convert from
lldb_private::process_linux::IntelPTPerThreadProcessTraceUP to
Expected<lldb_private::process_linux::IntelPTPerThreadProcessTraceUP>.
This commit explicitely marks those unique_ptr values as being moved
which fixes the conversion error.

Reviewed By: wallace

Differential Revision: https://reviews.llvm.org/D126402

The concept specialization expression should start at the location of
the  nested qualifiers when it has nested qualifiers.
This ensures that libclang reports correct source ranges that include
all subexpressions when visiting the expression.

Differential Revision: https://reviews.llvm.org/D126332

If we don't specify the result index while matching operand with the
result of certain operation, it's supposed to match all the results of
the operation with the operand. For registered op, it's easy to do that
by either indexing with number or name. For unregistered op, this commit
enables the numeric result indexing for this use case.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D126330