This patch implements the builtins in Clang
and the LLVM-IR intrinsic for the following:

// Variants are also available for:
// _s8, _s16, _u16, _s32, _u32, _s64, _u64,
// _f16, _f32, _f64uint8x16_t svaddqv[_u8](svbool_t pg, svuint8_t zn);

// Variants are also available for:
// _s8, _u16, _s16, _u32, _s32, _u64, _s64
uint8x16_t svandqv[_u8](svbool_t pg, svuint8_t zn); uint8x16_t
sveorqv[_u8](svbool_t pg, svuint8_t zn); uint8x16_t svorqv[_u8](svbool_t
pg, svuint8_t zn);

// Variants are also available for:
// _s8, _u16, _s16, _u32, _s32, _u64, _s64;
uint8x16_t svmaxqv[_u8](svbool_t pg, svuint8_t zn); uint8x16_t
svminqv[_u8](svbool_t pg, svuint8_t zn);

// Variants are also available for _f32, _f64
float16x8_t svmaxnmqv[_f16](svbool_t pg, svfloat16_t zn); float16x8_t
svminnmqv[_f16](svbool_t pg, svfloat16_t zn);

According to the PR#257[1]

The reduction instruction uses scalable vectors as input and fixed
vectors as output, therefore we changed SVEEmitter to emit fixed vector
types in case the neon header(arm_neon.h) is not present.

[1]https://github.com/ARM-software/acle/pull/257

Co-author: Dinar Temirbulatov <dinar.temirbulatov@arm.com>

Add empty AMDGPUGlobalISelDivergenceLowering pass. This pass will
implement
- selection of divergent i1 phis as lane mask phis, requires lane mask
merging in some cases
- lower uses of divergent i1 values outside of the cycle using lane mask
merging
- lowering of all cases of temporal divergence:
- lower uses of uniform i1 values outside of the cycle using lane mask
merging
- lower uses of uniform non-i1 values outside of the cycle using a copy
to vgpr inside of the cycle

Add very detailed set of regression tests for cases mentioned above.

patch 1 from: https://github.com/llvm/llvm-project/pull/73337

This is necessary for visualization of optimization remarks.

m_Specific can only be used if the previous check suceeded. Found by
msan.

The specialization was non-conforming because it was missing a bunch of
member functions. Those were missing probably just as an oversight
coupled with a bit of laziness -- the rule that user-defined
specializations need to match the base template is usually OK to take
with a grain of salt, but not when the code is supposed to be portable,
which our test suite aims to be.

Fixes #74214

This patch refactors `checkCondition` to handle min/max intrinsic calls
in #75306.

This patch tracks li instructions that set AVL operands and does DCE
after emitting VSETVLIs.

Even though constexpr implicitly makes functions inline, we try not to
rely on this implicit effect in the code base. We are mostly consistent
about using `inline` on non-template free-functions to make it clear
that we don't have an ODR violation.

This patch simply fixes a few places where we didn't explicitly use
inline on non-template free functions, presumably because they were
constexpr.

Fixes #75227

PR 75095 introduced some changes to lld that broke some dwarf tests that
were being incorrectly linked as a PIE. Add flags to disable any PIC/PIE
compilation, so the linker can succeed and the tests can run as
intended.

This is the 1st step for D40776, to help us find missing and duplicated
tests.

As part of RemoveDIs, we need instruction insertion to be done with
iterators rather than instruction pointers, so that we can communicate
some debug-info facts about the position. This patch is an entirely
mechanical replacement of Instruction * with BasicBlock::iterator, plus
using insertBefore to insert some instructions because we don't have
iterator-taking constructors yet.

Sadly it's not NFC because it causes dbg.value intrinsics / their
DPValue equivalents to shift location.

Co-authored-by: Vang Thao <Vang.Thao@amd.com>

Following the same path already used for ArmStreaming and
ArmLocallyStreaming.

This should correspond to clang's __arm_streaming_compatible attribute.

This reverts commit a2945784.

Causes an assertion failure in llvm/test/DebugInfo/COFF/lexicalblock.ll.

Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>

Remove dead code

Co-authored-by: Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>

Depends on #74099, #73500.

This patch completes the support for EBCDIC I/O support on z/OS using the autoconversion functions.

As part of the RemoveDIs project, transitioning to non-instruction debug
info, all debug intrinsic handling code needs to be duplicated to handle
DPValues.

--try-experimental-debuginfo-iterators enables the new debug mode in
tests if the CMake option has been enabled.

`getInsertPtAfterFramePtr` now returns an iterator so we don't lose
debug-info-communicating bits.

---

Depends on #73500, #74090, #74091.

They're duplicated with

llvm/test/MC/X86/avx512vp2intersect-32-intel.s
llvm/test/MC/X86/avx512vp2intersect-64-intel.s

Deletes slots that have lifetime markers and the lifetime ranges are
empty.

This is a follow-up on [PR
75218](https://github.com/llvm/llvm-project/pull/75218) that avoids
reconstructing a fused loc in the `FlattenFusedLocationRecursively`
helper when there has been no change.

This reverts commit 2684281d.

Due to being flaky on Arm and AArch64 buildbots.

These are intrinsics are only used ephemerally and be should be given a
zero cost.

[reland][libc][NFC] Implement `FPBits` in terms of `FloatProperties` to reduce clutter (#75196) (#75318)

Also make type naming consistent by using `UIntType` instead of
`intU_t`.
This patch is a reland of #75196 but does not include the "use `FPBits`
instead of `FPBits_t`, `FPB`" part. This needs more work.

Note that all the patches that implement support for declare-style
DPValues have tests that are "rotten green" test without this
patch (i.e., they pass at the moment without testing what we
want them to test). See the Pull Request for more detail on this.

Pass MemoryLocation as one argument, instead of passing all its
parts separately.

... for a potential constant expression. They are not defined now, but
might be defined later when the function is actually called.