This reverts commit eaf6117f (D155520).
There's an ASAN build failure that needs investigation.

This patch adds support for `fread` on the GPU via the RPC mechanism.
Here we simply pass the size of the read to the server and then copy it
back to the client via the RPC channel. This should allow us to do the
basic operations on files now. This will obviously be slow for large
sizes due ot the number of RPC calls involved, this could be optimized
further by having a special RPC call that can initiate a memcpy between
the two pointers.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D155121

The expected number for the max ptrdiff value was expected to be exactly
4294967296 (2**32) for 32 bit systems, when it should be
4294967295 (2**32 - 1). This also adds a second test to check for this
case on non-32 bit systems.

Reviewed By: lntue, mikhail.ramalho

Differential Revision: https://reviews.llvm.org/D156257

If a function contains inline function ranges whose address ranges are not contained in the parent scope, then emit an error message and omit them from the final GSYM. Prior to this we would only test if an inline function's address range was within the concrete function's ranges. If we ran into a case where the inline range was within the function's ranges, but not within one of the parent inline function's ranges, then we would fail to produce a GSYM file and exit with an error.

The current code will emit full details on invalid inline ranges as they are being parsed and will omit any bad ranges from the final GSYM file.

Differential Revision: https://reviews.llvm.org/D155254

The if-clause on 'target teams loop' should only accept "target" as a
directive name modifier. Any other directive name should generate an
error.

Differential Revision: https://reviews.llvm.org/D156352

https://reviews.llvm.org/D153983 introduced a new .td file with
attributes and enums. This patch adds the corresponding rules to the
BUILD file in order to fix the bazel build.

Reviewed By: ingomueller-net

Differential Revision: https://reviews.llvm.org/D156355

This patch adds mix-in classes for the Python bindings of
`EmptyTensorToAllocTensorOp` and `OneShotBufferizeOp`. For both classes,
the mix-in add overloads to the `__init__` functions that allow to
construct them without providing the return type, which is defaulted to
the only allowed type and `AnyOpType`, respectively.

Note that the mix-in do not expose the
`function_boundary_type_conversion` attribute. The attribute has a
custom type from the bufferization dialect that is currently not exposed
in the Python bindings. Handling of that attribute can be added easily
to the mix-in class when the need arises.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D155799

Summary:
These fail tests, disbale them until we can figure out how to get them
passing.

For Pseudos that end in _MASK or should be forceMasked,
which means that in the case that the instruction should be
mask undisturbed the destination register must be read to
determine the undisturbed values. This patch adds a SchedRead
that gets passed to MASK pseudos to represent this extra read that
must occur.

A future patch should do something similiar for when a pseudo is TU,
since those instructions must also read their destination to preserve
undisturbed-ness.

Differential Revision: https://reviews.llvm.org/D155654

`inverse.ballot` checks if a cc bit is set for the current
lane. Therefore, it is not convergent.

Reviewed By: sameerds

Differential Revision: https://reviews.llvm.org/D156088

Recommit only the tests that look good this time.

Correct X86 strictfp tests to follow the rules documented in the LangRef:
https://llvm.org/docs/LangRef.html#constrained-floating-point-intrinsics

Mostly these tests just needed the strictfp attribute on function
definitions. After D154991 the constrained intrinsics have the
strictfp attribute by default so they don't need it here, but other
functions do.

Test changes verified with D146845.

This patch introduces per kernel environment. Previously, flags such as execution mode are set through global variables with name like `__kernel_name_exec_mode`. They are accessible on the host by reading the corresponding global variable, but not from the device. Besides, some assumptions, such as no nested parallelism, are not per kernel basis, preventing us applying per kernel optimization in the device runtime.

This is a combination and refinement of patch series D116908, D116909, and D116910.

Depend on D155886.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D142569

hasPredecessorHelper method, that is used by DAGCombiner to combine to pre-indexed and post-indexed load/stores, is a major source of slowdown while compiling a large function with MSan enabled on Arm. This patch caps the DFS-graph traversal for this method to 8192 which cuts compile time by 50% (4m -> 2m compile time) at the cost of less overall nodes combined.

Here's the summary of pre-index DAG nodes created and time it took to compile the pathological case with different MaxDepth limit:
1. With MaxDepth = 0 (unlimited): 1800, took 4m
2. With MaxDepth = 32k, 560, took 2m31s
3. With MaxDepth = 8k, 139, took 2m.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D154885

When we build the Clang module compilation command (e.g., when
a user requests import of a module via `expression @import Foundation`),
LLDB will try to determine which SDK directory to use as the `sysroot`.
However, it currently does so by simply enumerating the `SDKs` directory
and picking the last one that's appropriate for module compilation
(see `PlatformDarwin::GetSDKDirectoryForModules`). That means if we have
multiple platform SDKs installed (e.g., a public and internal one), we
may pick the wrong one by chance.

On Darwin platforms we emit the SDK path that a object
file was compiled against into DWARF (using `DW_AT_LLVM_sysroot`
and `DW_AT_APPLE_sdk`). For Swift debugging, we already parse the SDK
path from debug-info if we can.

This patch mimicks the Swift behaviour for non-Swift languages. I.e.,
if we can get the SDK path from debug-info, do so. Otherwise, fall back
to the old heuristic.

rdar://110407148

Differential Revision: https://reviews.llvm.org/D156020

This patch adds optional and variadic operands and results
to IRDL. These are added using the `irdl.variadicity` attribute,
which has to be attached to every `irdl.operands` and `irdl.results`
operations.

For instance:
```mlir
irdl.operands(%0, single %1, optional %2, variadic %3)
```
has 4 operand definitions. The first two are single operands,
the second one is optional, and the last one is variadic.

Note that this patch only adds the variadicities to the definition,
but does not consider them when loading a dialect at runtime. This
will be done in the next patch.

Reviewed By: Mogball, unterumarmung

Differential Revision: https://reviews.llvm.org/D153983

[clang-tidy] Update unchecked-optiona-access-check to use convenience function for diagnosing `FunctionDecl`s.

Also changes code in the underlying model to fit the type expected by the convenience function.

Differential Revision: https://reviews.llvm.org/D156255

The convenience function captures running the analysis and then collecting
diagnostics based on a `Diagnoser` object. This pattern is valuable to
clang-tidy checks which analyze a function at a time, though it could be more
generally useful for analysis clients.

Differential Revision: https://reviews.llvm.org/D156254

This removes selectSETCC and adds isel patterns for seteq/setne
conditions.

This removes the duplication of selectSETCC between lowering and
isel. This also gets some cases in xaluo.ll that we missed previously.

Reviewed By: wangpc

Differential Revision: https://reviews.llvm.org/D156250

This patch adds the skeleton and the basic lowering for OpenACC declare
construct when located in the module declaration. This patch just lower the
create clause with or without modifier. Other clause and global descrutor
lowering will come in follow up patches to keep this one small enough for
review.

Reviewed By: razvanlupusoru

Differential Revision: https://reviews.llvm.org/D156266

Reviewed By: labrinea

Differential Revision: https://reviews.llvm.org/D156260

Updated AggressiveInstCombine pass documentation because now AggressiveInstCombine can modify CFG.
Introduced in D154725.

Differential Revision: https://reviews.llvm.org/D156134

Previously when a packed struct, containing vector data types such as
uint16x8_t, is passed as a function argument, the alignment of the
struct used by the function caller and the alignment used by the callee
to load the argument from stack does not match.

This patch implements section 6.8.2, stage C.4 of the Procedure Call
Standard for the Arm 64-bit Architecture (AAPCS64): "If the argument is
an HFA, an HVA, a Quad-precision Floating-point or short vector type
then the NSAA is rounded up to the next multiple of 8 if its natural
alignment is ≤ 8 or the next multiple of 16 if its natural alignment
is ≥ 16." This ensures the alignments of the packed structs used as
function arguments are the same as described in the AAPCS64 for both
the caller and callee.

Reference:
AAPCS64 (https://github.com/ARM-software/abi-aa/blob/latest-release/aapcs64/aapcs64.rst)

Reviewed By: olista01, rjmccall, tmatheson

Differential Revision: https://reviews.llvm.org/D146242

Adding precommit tests to better demonstrate the effects of D146242.

Reviewed By: pratlucas

Differential Revision: https://reviews.llvm.org/D152932

Regenerate some test checks in  preparation for a patch that
fixes https://github.com/llvm/llvm-project/issues/53218.

Improve ((x1 ^ y1) | (x2 ^ y2)) == 0 transform to also support sub ((x1 - y1) | (x2 - y2)) == 0.
Depends D155703.

Differential Revision: https://reviews.llvm.org/D155704

Precommit tests for D155704.

Differential Revision: https://reviews.llvm.org/D155703

Summary:
The RPC server used the size field which meant we didn't get the correct
return value for partial reads. We fix that here.

TypeLocBuilder frees resources in the destructor but doesn't have
user-written copy c'tor or assignment operator, so copying it using
default ones can cause double free.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D156222

In [1], a few new insns are proposed to expand BPF ISA to
  . fixing the limitation of existing insn (e.g., 16bit jmp offset)
  . adding new insns which may improve code quality
    (sign_ext_ld, sign_ext_mov, st)
  . feature complete (sdiv, smod)
  . better user experience (bswap)

This patch implemented insn encoding for
  . sign-extended load
  . sign-extended mov
  . sdiv/smod
  . bswap insns
  . unconditional jump with 32bit offset

The new bswap insns are generated under cpu=v4 for __builtin_bswap.
For cpu=v3 or earlier, for __builtin_bswap, be or le insns are generated
which is not intuitive for the user.

To support 32-bit branch offset, a 32-bit ja (JMPL) insn is implemented.
For conditional branch which is beyond 16-bit offset, llvm will do
some transformation 'cond_jmp' -> 'cond_jmp + jmpl' to simulate 32bit
conditional jmp. See BPFMIPeephole.cpp for details. The algorithm is
hueristic based. I have tested bpf selftest pyperf600 with unroll account
600 which can indeed generate 32-bit jump insn, e.g.,
        13:       06 00 00 00 9b cd 00 00 gotol +0xcd9b <LBB0_6619>

Eduard is working on to add 'st' insn to cpu=v4.

A list of llc flags:
  disable-ldsx, disable-movsx, disable-bswap,
  disable-sdiv-smod, disable-gotol
can be used to disable a particular insn for cpu v4.
For example, user can do:
  llc -march=bpf -mcpu=v4 -disable-movsx t.ll
to enable cpu v4 without movsx insns.

References:
  [1] https://lore.kernel.org/bpf/4bfe98be-5333-1c7e-2f6d-42486c8ec039@meta.com/

Differential Revision: https://reviews.llvm.org/D144829

It seems the ranges start with 0 in most cases.

Reviewed By: dblaikie, gchatelet

Differential Revision: https://reviews.llvm.org/D156135

Add missing SSE2-SSSE3 common prefix to vector-trunc-ssat.ll

We always concat the lower subvectors back together, so do it in the helper.

- Add `FunctionSet` type alias.
- Use any_of
- Use ErrorOr handling pattern

Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D156043

Creates rocdl.lane_id op with llvm conversion to:

  __device__ static unsigned int __lane_id() {
      return  __builtin_amdgcn_mbcnt_hi(
                 -1, __builtin_amdgcn_mbcnt_lo(-1, 0));
  }

Reviewed By: krzysz00

Differential Revision: https://reviews.llvm.org/D154666

Summary:
A previous patch missed adding these to all the definitions.

This reverts commit b0093e13 due to a miscompile
under MSan. See https://reviews.llvm.org/D152407#4533478 for more details.

Reviewed By: asmok-g

Differential Revision: https://reviews.llvm.org/D156328

Initially the .rodata section came before .text, hence sharing its
segment with the program header sitting at a small offset, pushing the
output file size to ~72GiB (the file was sparse though, so not much is
really written). This breaks on 32-bit platforms and is irrelevant to
the feature being tested, so re-order the two sections so .text gets
processed first, and both sections get their own segment.

This addresses the issue found by the clang-armv8-lld-2stage builder:
    https://lab.llvm.org/buildbot/#/builders/178/builds/5340

Reviewed By: SixWeining, xry111

Differential Revision: https://reviews.llvm.org/D156293